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White Rabbit Switch - Software
Commit d8f1dc9f authored by Adam Wujek's avatar Adam Wujek 💬
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Merge commit 'adam-update_kernel_3.16.37' 

Signed-off-by: Adam Wujek's avatarAdam Wujek <adam.wujek@cern.ch>
parents 4744f847 ac693f95
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Showing with 2274 additions and 1173 deletions
build/download-info
View file @ d8f1dc9f
......@@ -15,8 +15,8 @@ barebox-2014.04.0.tar.bz2 e1f089fc24cc7f24478e663c0e3b91d9 \
http://www.barebox.org/download/barebox-2014.04.0.tar.bz2
# kernel
linux-2.6.39.tar.bz2 1aab7a741abe08d42e8eccf20de61e05 \
http://www.kernel.org/pub/linux/kernel/v2.6/linux-2.6.39.tar.bz2
linux-3.16.37.tar.xz fc4e8c469cf852a128e160f2910c1f21 \
https://www.kernel.org/pub/linux/kernel/v3.x/linux-3.16.37.tar.xz
# our gateware binaries
wrs-gw-v4.2-20150826.tar.gz 807117326f6d5b1b53ebc95ca093fc44 \
......
build/scripts/wrs_build_kernel
View file @ d8f1dc9f
#!/bin/bash
KERVER=2.6.39
# check variables, like all scripts herein do
WRS_SCRIPT_NAME=$(basename $0)
if [ -z "$WRS_BASE_DIR" ]; then
......@@ -13,8 +11,9 @@ fi
wrs_check_vars WRS_OUTPUT_DIR WRS_DOWNLOAD_DIR CROSS_COMPILE
wrs_echo "--- Linux kernel for switch"
tarname="linux-${KERVER}.tar.bz2"
patchdir="${WRS_BASE_DIR}/../patches/kernel/v${KERVER}"
tarname="linux-${KVER}.tar.xz"
patchdir="${WRS_BASE_DIR}/../patches/kernel/v${KVER}"
wrs_download $tarname
mkdir -p $WRS_OUTPUT_DIR/build || wrs_die "mkdir build"
......@@ -22,9 +21,10 @@ mkdir -p $WRS_OUTPUT_DIR/images || wrs_die "mkdir images"
# go to the build dir and compile it, using our configuration
cd $WRS_OUTPUT_DIR/build
dirname="linux-${KERVER}"
dirname="linux-${KVER}"
rm -rf $dirname
tar xjf ${WRS_DOWNLOAD_DIR}/$tarname || wrs_die "untar $tarname"
# xz archive, so use "J" for tar
tar xJf ${WRS_DOWNLOAD_DIR}/$tarname || wrs_die "untar $tarname"
# apply patches
cd $dirname
......@@ -34,7 +34,7 @@ done
# copy the config and replace "-j" level. First remove it in case it's left in
CFG="${patchdir}/linux-config-wrswitch"
CFG=$WRS_BASE_DIR/../configs/wrs_linux_defconfig
if [ "x$WRS_KERNEL_CONFIG" != "x" ]; then
if [ -f $WRS_KERNEL_CONFIG ]; then
CFG=$WRS_KERNEL_CONFIG
......@@ -50,7 +50,7 @@ make oldconfig || wrs_die "kernel config"
make $WRS_MAKE_J zImage modules || wrs_die "kernel compilation"
mkdir -p $WRS_OUTPUT_DIR/images/lib/modules/$KERVER/kernel
mkdir -p $WRS_OUTPUT_DIR/images/lib/modules/$KVER/kernel
cp $(find . -name '*.ko') $WRS_OUTPUT_DIR/images/lib/modules/$KERVER/kernel
cp $(find . -name '*.ko') $WRS_OUTPUT_DIR/images/lib/modules/$KVER/kernel
cp arch/$ARCH/boot/zImage $WRS_OUTPUT_DIR/images
build/scripts/wrs_build_modules
View file @ d8f1dc9f
......@@ -16,7 +16,7 @@ mkdir -p $WRS_OUTPUT_DIR/build || wrs_die "mkdir build"
mkdir -p $WRS_OUTPUT_DIR/images || wrs_die "mkdir images"
# check that the kernel has been compiled (or at least configured)
export LINUX="$WRS_OUTPUT_DIR/build/linux-2.6.39"
export LINUX="$WRS_OUTPUT_DIR/build/linux-$KVER"
test -f $LINUX/.config || wrs_die "no kernel in $LINUX"
cd $WRS_BASE_DIR/../kernel
make $WRS_MAKE_J || wrs_die "white rabbit kernel modules"
......
build/scripts/wrs_build_ptp
View file @ d8f1dc9f
......@@ -21,7 +21,7 @@ make clean
# we need LINUX and CROSS_COMPILE. The latter is there for sure
if [ "x$LINUX" == "x" ]; then
export LINUX="$WRS_OUTPUT_DIR/build/linux-2.6.39"
export LINUX="$WRS_OUTPUT_DIR/build/linux-$KVER"
fi
......
build/scripts/wrs_build_userspace
View file @ d8f1dc9f
......@@ -17,7 +17,7 @@ installdir="$WRS_OUTPUT_DIR/images/wr"
# This time build is done in-place, but the output is a tree in images/wr.
# Some of the makefiles inside use
export LINUX="$WRS_OUTPUT_DIR/build/linux-2.6.39"
export LINUX="$WRS_OUTPUT_DIR/build/linux-$KVER"
cd $sourcedir
make clean || wrs_die "Error cleaning user space"
......
build/wrs_build-all
View file @ d8f1dc9f
......@@ -37,6 +37,7 @@ export PATH="$PATH:/usr/sbin"
WRS_TOOLS="git gcc g++ ar as m4 msgfmt md5sum make"
WRS_TOOLS="$WRS_TOOLS awk unzip patch bison flex ncursesw5-config"
WRS_TOOLS="$WRS_TOOLS fakeroot makeinfo"
WRS_TOOLS="$WRS_TOOLS xz"
wrs_check_tools $WRS_TOOLS
......@@ -48,6 +49,9 @@ fi
export WRS_SCRIPTS_DIR=${WRS_BASE_DIR}/scripts
# Export Linux kernel version in use
export KVER="3.16.37"
# Export Buildroot version in use
export BRVER="2016.02"
......
configs/buildroot/wrs_release_br2_config
View file @ d8f1dc9f
......@@ -3,8 +3,6 @@
# Buildroot 2016.02 Configuration
#
BR2_HAVE_DOT_CONFIG=y
BR2_HOST_GCC_AT_LEAST_4_7=y
BR2_HOST_GCC_AT_LEAST_4_8=y
#
# Target options
......@@ -153,9 +151,36 @@ BR2_TOOLCHAIN_BUILDROOT_VENDOR="buildroot"
# BR2_KERNEL_HEADERS_3_18 is not set
# BR2_KERNEL_HEADERS_4_1 is not set
# BR2_KERNEL_HEADERS_4_3 is not set
BR2_KERNEL_HEADERS_4_4=y
# BR2_KERNEL_HEADERS_VERSION is not set
BR2_DEFAULT_KERNEL_HEADERS="4.4.3"
# BR2_KERNEL_HEADERS_4_4 is not set
BR2_KERNEL_HEADERS_VERSION=y
BR2_DEFAULT_KERNEL_VERSION="3.16.37"
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_4 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_3 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_2 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_1 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_0 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_19 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_18 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_17 is not set
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_16=y
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_15 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_14 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_13 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_12 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_11 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_10 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_9 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_8 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_7 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_6 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_5 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_4 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_3 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_2 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_1 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_0 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_REALLY_OLD is not set
BR2_DEFAULT_KERNEL_HEADERS="3.16.37"
BR2_TOOLCHAIN_BUILDROOT_UCLIBC=y
# BR2_TOOLCHAIN_BUILDROOT_GLIBC is not set
# BR2_TOOLCHAIN_BUILDROOT_MUSL is not set
......@@ -239,15 +264,7 @@ BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_13=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_14=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_15=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_16=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_17=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_18=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_19=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_0=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_1=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_2=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_3=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_4=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST="4.4"
BR2_TOOLCHAIN_HEADERS_AT_LEAST="3.16"
BR2_TOOLCHAIN_GCC_AT_LEAST_4_3=y
BR2_TOOLCHAIN_GCC_AT_LEAST_4_4=y
BR2_TOOLCHAIN_GCC_AT_LEAST_4_5=y
......
patches/kernel/v2.6.39/linux-config-wrswitch → configs/wrs_linux_defconfig
View file @ d8f1dc9f
#
# Automatically generated make config: don't edit
# Linux/arm 2.6.39 Kernel Configuration
# Fri Nov 21 09:48:02 2014
# Automatically generated file; DO NOT EDIT.
# Linux/arm 3.16.37 Kernel Configuration
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_GENERIC_GPIO=y
# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_KTIME_SCALAR=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_VECTORS_BASE=0xffff0000
# CONFIG_ARM_PATCH_PHYS_VIRT is not set
CONFIG_ARM_PATCH_PHYS_VIRT=y
CONFIG_GENERIC_BUG=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_CONSTRUCTORS=y
CONFIG_HAVE_IRQ_WORK=y
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_EXTABLE_SORT=y
#
# General setup
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_CROSS_COMPILE=""
CONFIG_LOCALVERSION="-wr-switch"
# CONFIG_COMPILE_TEST is not set
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KERNEL_LZ4=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_LZMA is not set
# CONFIG_KERNEL_XZ is not set
# CONFIG_KERNEL_LZO is not set
# CONFIG_KERNEL_LZ4 is not set
CONFIG_DEFAULT_HOSTNAME="(none)"
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_CROSS_MEMORY_ATTACH=y
# CONFIG_FHANDLE is not set
# CONFIG_TASKSTATS is not set
CONFIG_USELIB=y
# CONFIG_AUDIT is not set
CONFIG_HAVE_GENERIC_HARDIRQS=y
#
# IRQ subsystem
#
CONFIG_GENERIC_HARDIRQS=y
CONFIG_HAVE_SPARSE_IRQ=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_IRQ_SHOW=y
# CONFIG_SPARSE_IRQ is not set
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_IRQ_DOMAIN=y
# CONFIG_IRQ_DOMAIN_DEBUG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_SPARSE_IRQ=y
CONFIG_KTIME_SCALAR=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
#
# Timers subsystem
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ_COMMON=y
# CONFIG_HZ_PERIODIC is not set
CONFIG_NO_HZ_IDLE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
#
# CPU/Task time and stats accounting
#
CONFIG_TICK_CPU_ACCOUNTING=y
# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
# CONFIG_IRQ_TIME_ACCOUNTING is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
#
# RCU Subsystem
#
CONFIG_TINY_RCU=y
# CONFIG_PREEMPT_RCU is not set
# CONFIG_RCU_TRACE is not set
# CONFIG_RCU_STALL_COMMON is not set
# CONFIG_TREE_RCU_TRACE is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_GENERIC_SCHED_CLOCK=y
# CONFIG_CGROUPS is not set
# CONFIG_CHECKPOINT_RESTORE is not set
CONFIG_NAMESPACES=y
CONFIG_UTS_NS=y
CONFIG_IPC_NS=y
......@@ -87,16 +112,18 @@ CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
CONFIG_RD_XZ=y
CONFIG_RD_LZO=y
CONFIG_RD_LZ4=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_HAVE_UID16=y
# CONFIG_EXPERT is not set
CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
# CONFIG_SGETMASK_SYSCALL is not set
CONFIG_SYSFS_SYSCALL=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_KALLSYMS_ALL=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
......@@ -116,23 +143,50 @@ CONFIG_PERF_USE_VMALLOC=y
# Kernel Performance Events And Counters
#
# CONFIG_PERF_EVENTS is not set
# CONFIG_PERF_COUNTERS is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_COMPAT_BRK=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SYSTEM_TRUSTED_KEYRING is not set
# CONFIG_PROFILING is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
# CONFIG_JUMP_LABEL is not set
# CONFIG_UPROBES is not set
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_HAVE_CC_STACKPROTECTOR=y
# CONFIG_CC_STACKPROTECTOR is not set
CONFIG_CC_STACKPROTECTOR_NONE=y
# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
# CONFIG_CC_STACKPROTECTOR_STRONG is not set
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OLD_SIGACTION=y
#
# GCOV-based kernel profiling
#
# CONFIG_GCOV_KERNEL is not set
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
......@@ -143,10 +197,20 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_MODULE_SIG is not set
CONFIG_BLOCK=y
CONFIG_LBDAF=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_BSGLIB is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
# CONFIG_BLK_CMDLINE_PARSER is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
CONFIG_EFI_PARTITION=y
#
# IO Schedulers
......@@ -156,116 +220,93 @@ CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_CFQ is not set
CONFIG_DEFAULT_NOOP=y
CONFIG_DEFAULT_IOSCHED="noop"
# CONFIG_INLINE_SPIN_TRYLOCK is not set
# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
# CONFIG_INLINE_SPIN_LOCK is not set
# CONFIG_INLINE_SPIN_LOCK_BH is not set
# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
CONFIG_INLINE_SPIN_UNLOCK=y
# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
# CONFIG_INLINE_READ_TRYLOCK is not set
# CONFIG_INLINE_READ_LOCK is not set
# CONFIG_INLINE_READ_LOCK_BH is not set
# CONFIG_INLINE_READ_LOCK_IRQ is not set
# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
CONFIG_INLINE_READ_UNLOCK=y
# CONFIG_INLINE_READ_UNLOCK_BH is not set
CONFIG_INLINE_READ_UNLOCK_IRQ=y
# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
# CONFIG_INLINE_WRITE_TRYLOCK is not set
# CONFIG_INLINE_WRITE_LOCK is not set
# CONFIG_INLINE_WRITE_LOCK_BH is not set
# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
CONFIG_INLINE_WRITE_UNLOCK=y
# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
# CONFIG_MUTEX_SPIN_ON_OWNER is not set
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
# CONFIG_FREEZER is not set
#
# System Type
#
CONFIG_MMU=y
# CONFIG_ARCH_MULTIPLATFORM is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_VEXPRESS is not set
CONFIG_ARCH_AT91=y
# CONFIG_ARCH_BCMRING is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CNS3XXX is not set
# CONFIG_ARCH_GEMINI is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_MXC is not set
# CONFIG_ARCH_MXS is not set
# CONFIG_ARCH_STMP3XXX is not set
# CONFIG_ARCH_NETX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_IOP13XX is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_DOVE is not set
# CONFIG_ARCH_KIRKWOOD is not set
# CONFIG_ARCH_LOKI is not set
# CONFIG_ARCH_LPC32XX is not set
# CONFIG_ARCH_MV78XX0 is not set
# CONFIG_ARCH_ORION5X is not set
# CONFIG_ARCH_MMP is not set
# CONFIG_ARCH_KS8695 is not set
# CONFIG_ARCH_NS9XXX is not set
# CONFIG_ARCH_W90X900 is not set
# CONFIG_ARCH_NUC93X is not set
# CONFIG_ARCH_TEGRA is not set
# CONFIG_ARCH_PNX4008 is not set
# CONFIG_ARCH_LPC32XX is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_MSM is not set
# CONFIG_ARCH_SHMOBILE is not set
# CONFIG_ARCH_SHMOBILE_LEGACY is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_S3C24XX is not set
# CONFIG_ARCH_S3C64XX is not set
# CONFIG_ARCH_S5P64X0 is not set
# CONFIG_ARCH_S5P6442 is not set
# CONFIG_ARCH_S5PC100 is not set
# CONFIG_ARCH_S5PV210 is not set
# CONFIG_ARCH_EXYNOS4 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_TCC_926 is not set
# CONFIG_ARCH_U300 is not set
# CONFIG_ARCH_U8500 is not set
# CONFIG_ARCH_NOMADIK is not set
# CONFIG_ARCH_DAVINCI is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_PLAT_SPEAR is not set
# CONFIG_ARCH_VT8500 is not set
CONFIG_HAVE_NAND_ATMEL_BUSWIDTH_16=y
CONFIG_HAVE_AT91_USART3=y
# CONFIG_ARCH_OMAP1 is not set
CONFIG_HAVE_AT91_UTMI=y
CONFIG_HAVE_AT91_USB_CLK=y
CONFIG_HAVE_AT91_DBGU1=y
CONFIG_AT91_USE_OLD_CLK=y
CONFIG_AT91_PMC_UNIT=y
# CONFIG_COMMON_CLK_AT91 is not set
CONFIG_OLD_CLK_AT91=y
CONFIG_AT91_SAM9_ALT_RESET=y
CONFIG_AT91_SAM9G45_RESET=y
CONFIG_AT91_SAM9_TIME=y
CONFIG_SOC_AT91SAM9=y
#
# Atmel AT91 System-on-Chip
#
CONFIG_SOC_SAM_V4_V5=y
# CONFIG_SOC_SAM_V7 is not set
#
# Atmel AT91 Processor
#
# CONFIG_SOC_AT91RM9200 is not set
# CONFIG_SOC_AT91SAM9260 is not set
# CONFIG_SOC_AT91SAM9261 is not set
# CONFIG_SOC_AT91SAM9263 is not set
# CONFIG_SOC_AT91SAM9RL is not set
CONFIG_SOC_AT91SAM9G45=y
# CONFIG_SOC_AT91SAM9X5 is not set
# CONFIG_SOC_AT91SAM9N12 is not set
#
# Atmel Non-DT world
#
# CONFIG_ARCH_AT91_NONE is not set
# CONFIG_ARCH_AT91RM9200 is not set
# CONFIG_ARCH_AT91SAM9260 is not set
# CONFIG_ARCH_AT91SAM9261 is not set
# CONFIG_ARCH_AT91SAM9G10 is not set
# CONFIG_ARCH_AT91SAM9263 is not set
# CONFIG_ARCH_AT91SAM9RL is not set
# CONFIG_ARCH_AT91SAM9G20 is not set
CONFIG_ARCH_AT91SAM9G45=y
# CONFIG_ARCH_AT91CAP9 is not set
# CONFIG_ARCH_AT572D940HF is not set
# CONFIG_ARCH_AT91X40 is not set
CONFIG_AT91_PMC_UNIT=y
#
# AT91SAM9G45 Board Type
......@@ -275,22 +316,17 @@ CONFIG_MACH_AT91SAM9M10G45EK=y
#
# AT91 Board Options
#
CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16=y
#
# AT91 Feature Selections
# Generic Board Type
#
# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
CONFIG_AT91_TIMER_HZ=1000
CONFIG_AT91_EARLY_DBGU=y
# CONFIG_AT91_EARLY_USART0 is not set
# CONFIG_AT91_EARLY_USART1 is not set
# CONFIG_AT91_EARLY_USART2 is not set
# CONFIG_AT91_EARLY_USART3 is not set
# CONFIG_MACH_AT91SAM9_DT is not set
#
# System MMU
# AT91 Feature Selections
#
CONFIG_AT91_TIMER_HZ=1000
# CONFIG_PLAT_SPEAR is not set
#
# Processor Type
......@@ -309,78 +345,101 @@ CONFIG_CPU_USE_DOMAINS=y
#
# Processor Features
#
# CONFIG_ARM_THUMB is not set
# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
CONFIG_ARM_THUMB=y
# CONFIG_CPU_ICACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_KUSER_HELPERS=y
# CONFIG_CACHE_L2X0 is not set
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_MULTI_IRQ_HANDLER=y
#
# Bus support
#
# CONFIG_PCI_SYSCALL is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set
#
# Kernel Features
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_VMSPLIT_3G=y
# CONFIG_VMSPLIT_2G is not set
# CONFIG_VMSPLIT_1G is not set
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_ARCH_NR_GPIO=0
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
CONFIG_HZ_FIXED=1000
CONFIG_HZ=1000
CONFIG_SCHED_HRTICK=y
CONFIG_AEABI=y
CONFIG_OABI_COMPAT=y
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
CONFIG_HAVE_ARCH_PFN_VALID=y
# CONFIG_HIGHMEM is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_NO_BOOTMEM=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=999999
# CONFIG_COMPACTION is not set
CONFIG_COMPACTION=y
CONFIG_MIGRATION=y
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
# CONFIG_KSM is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_NEED_PER_CPU_KM=y
# CONFIG_CLEANCACHE is not set
# CONFIG_CMA is not set
# CONFIG_ZBUD is not set
# CONFIG_ZSMALLOC is not set
CONFIG_FORCE_MAX_ZONEORDER=11
# CONFIG_LEDS is not set
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_UACCESS_WITH_MEMCPY is not set
CONFIG_UACCESS_WITH_MEMCPY=y
# CONFIG_SECCOMP is not set
# CONFIG_CC_STACKPROTECTOR is not set
# CONFIG_DEPRECATED_PARAM_STRUCT is not set
CONFIG_SWIOTLB=y
CONFIG_IOMMU_HELPER=y
#
# Boot options
#
# CONFIG_USE_OF is not set
CONFIG_ATAGS=y
# CONFIG_DEPRECATED_PARAM_STRUCT is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x71100000,25165824 root=/dev/ram0 rw"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
# CONFIG_CMDLINE_EXTEND is not set
# CONFIG_CMDLINE_FORCE is not set
# CONFIG_XIP_KERNEL is not set
# CONFIG_KEXEC is not set
# CONFIG_CRASH_DUMP is not set
# CONFIG_AUTO_ZRELADDR is not set
CONFIG_AUTO_ZRELADDR=y
#
# CPU Power Management
#
#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
#
# CPU Idle
#
# CONFIG_CPU_IDLE is not set
# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
#
# Floating point emulation
......@@ -398,10 +457,12 @@ CONFIG_FPE_NWFPE=y
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_HAVE_AOUT=y
# CONFIG_BINFMT_AOUT is not set
CONFIG_BINFMT_SCRIPT=y
# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
CONFIG_COREDUMP=y
#
# Power management options
......@@ -409,24 +470,30 @@ CONFIG_HAVE_AOUT=y
# CONFIG_SUSPEND is not set
# CONFIG_PM_RUNTIME is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_ARM_CPU_SUSPEND is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_DIAG is not set
CONFIG_UNIX=y
# CONFIG_UNIX_DIAG is not set
# CONFIG_XFRM_USER is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE_DEMUX is not set
# CONFIG_ARPD is not set
# CONFIG_NET_IP_TUNNEL is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
......@@ -436,7 +503,7 @@ CONFIG_IP_PNP_RARP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
CONFIG_INET_LRO=y
# CONFIG_INET_DIAG is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
......@@ -444,6 +511,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NET_PTP_CLASSIFY is not set
# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
......@@ -455,10 +523,12 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
CONFIG_STP=y
CONFIG_GARP=y
CONFIG_BRIDGE=y
# CONFIG_BRIDGE_IGMP_SNOOPING is not set
# CONFIG_NET_DSA is not set
CONFIG_BRIDGE_IGMP_SNOOPING=y
# CONFIG_BRIDGE_VLAN_FILTERING is not set
CONFIG_HAVE_NET_DSA=y
CONFIG_VLAN_8021Q=y
CONFIG_VLAN_8021Q_GVRP=y
# CONFIG_VLAN_8021Q_MVRP is not set
# CONFIG_DECNET is not set
CONFIG_LLC=y
# CONFIG_LLC2 is not set
......@@ -466,14 +536,21 @@ CONFIG_LLC=y
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_PHONET is not set
# CONFIG_IEEE802154 is not set
# CONFIG_NET_SCHED is not set
# CONFIG_DCB is not set
CONFIG_DNS_RESOLVER=y
# CONFIG_BATMAN_ADV is not set
# CONFIG_OPENVSWITCH is not set
# CONFIG_VSOCKETS is not set
# CONFIG_NETLINK_MMAP is not set
# CONFIG_NETLINK_DIAG is not set
# CONFIG_NET_MPLS_GSO is not set
# CONFIG_HSR is not set
CONFIG_NET_RX_BUSY_POLL=y
CONFIG_BQL=y
# CONFIG_BPF_JIT is not set
#
# Network testing
......@@ -490,6 +567,8 @@ CONFIG_DNS_RESOLVER=y
# CONFIG_NET_9P is not set
# CONFIG_CAIF is not set
# CONFIG_CEPH_LIB is not set
# CONFIG_NFC is not set
CONFIG_HAVE_BPF_JIT=y
#
# Device Drivers
......@@ -498,21 +577,28 @@ CONFIG_DNS_RESOLVER=y
#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_DEVTMPFS is not set
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_FW_LOADER=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_EXTRA_FIRMWARE=""
CONFIG_FW_LOADER_USER_HELPER=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_GENERIC_CPU_DEVICES is not set
# CONFIG_DMA_SHARED_BUFFER is not set
#
# Bus devices
#
# CONFIG_BRCMSTB_GISB_ARB is not set
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_TESTS is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_AFS_PARTS is not set
......@@ -521,7 +607,6 @@ CONFIG_MTD_CMDLINE_PARTS=y
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
......@@ -563,7 +648,6 @@ CONFIG_MTD_CFI_I2=y
CONFIG_MTD_DATAFLASH=y
# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
# CONFIG_MTD_DATAFLASH_OTP is not set
# CONFIG_MTD_M25P80 is not set
# CONFIG_MTD_SST25L is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
......@@ -573,119 +657,185 @@ CONFIG_MTD_DATAFLASH=y
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
# CONFIG_MTD_DOCG3 is not set
CONFIG_MTD_NAND_ECC=y
# CONFIG_MTD_NAND_ECC_SMC is not set
CONFIG_MTD_NAND=y
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
# CONFIG_MTD_NAND_ECC_BCH is not set
# CONFIG_MTD_SM_COMMON is not set
# CONFIG_MTD_NAND_MUSEUM_IDS is not set
# CONFIG_MTD_NAND_DENALI is not set
# CONFIG_MTD_NAND_GPIO is not set
CONFIG_MTD_NAND_IDS=y
# CONFIG_MTD_NAND_DISKONCHIP is not set
# CONFIG_MTD_NAND_DOCG4 is not set
CONFIG_MTD_NAND_ATMEL=y
# CONFIG_MTD_NAND_ATMEL_ECC_HW is not set
CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
# CONFIG_MTD_NAND_ATMEL_ECC_NONE is not set
# CONFIG_MTD_NAND_NANDSIM is not set
# CONFIG_MTD_NAND_PLATFORM is not set
# CONFIG_MTD_ONENAND is not set
#
# LPDDR flash memory drivers
# LPDDR & LPDDR2 PCM memory drivers
#
# CONFIG_MTD_LPDDR is not set
# CONFIG_MTD_LPDDR2_NVM is not set
# CONFIG_MTD_SPI_NOR is not set
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MTD_UBI_BEB_RESERVE=1
CONFIG_MTD_UBI_BEB_LIMIT=20
# CONFIG_MTD_UBI_FASTMAP is not set
CONFIG_MTD_UBI_GLUEBI=y
# CONFIG_MTD_UBI_DEBUG is not set
# CONFIG_MTD_UBI_BLOCK is not set
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
#
# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
#
# CONFIG_BLK_DEV_DRBD is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_COUNT=4
CONFIG_BLK_DEV_RAM_SIZE=8192
# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_MG_DISK is not set
# CONFIG_BLK_DEV_RBD is not set
#
# Misc devices
#
# CONFIG_SENSORS_LIS3LV02D is not set
# CONFIG_MISC_DEVICES is not set
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
# CONFIG_AD525X_DPOT is not set
# CONFIG_ATMEL_PWM is not set
# CONFIG_ATMEL_TCLIB is not set
# CONFIG_DUMMY_IRQ is not set
# CONFIG_ATMEL_SSC is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_TI_DAC7512 is not set
# CONFIG_BMP085_SPI is not set
# CONFIG_LATTICE_ECP3_CONFIG is not set
# CONFIG_SRAM is not set
# CONFIG_C2PORT is not set
#
# EEPROM support
#
# CONFIG_EEPROM_AT25 is not set
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_EEPROM_93XX46 is not set
#
# Texas Instruments shared transport line discipline
#
# CONFIG_TI_ST is not set
# CONFIG_SENSORS_LIS3_SPI is not set
#
# Altera FPGA firmware download module
#
#
# Intel MIC Host Driver
#
#
# Intel MIC Card Driver
#
# CONFIG_ECHO is not set
#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
# CONFIG_SCSI_TGT is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_DMA is not set
# CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
CONFIG_SCSI_MULTI_LUN=y
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
CONFIG_SCSI_WAIT_SCAN=m
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
# CONFIG_SCSI_SRP_ATTRS is not set
CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
# CONFIG_ISCSI_BOOT_SYSFS is not set
# CONFIG_LIBFC is not set
# CONFIG_LIBFCOE is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_DH is not set
# CONFIG_SCSI_OSD_INITIATOR is not set
# CONFIG_ATA is not set
# CONFIG_MD is not set
# CONFIG_TARGET_CORE is not set
CONFIG_HAVE_NET_MACB=y
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
CONFIG_MII=y
CONFIG_NET_CORE=y
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
# CONFIG_DUMMY is not set
# CONFIG_EQUALIZER is not set
CONFIG_TUN=y
# CONFIG_NET_TEAM is not set
# CONFIG_MACVLAN is not set
# CONFIG_VXLAN is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_TUN is not set
# CONFIG_VETH is not set
CONFIG_MII=y
# CONFIG_NLMON is not set
#
# CAIF transport drivers
#
#
# Distributed Switch Architecture drivers
#
# CONFIG_NET_DSA_MV88E6XXX is not set
# CONFIG_NET_DSA_MV88E6060 is not set
# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
# CONFIG_NET_DSA_MV88E6131 is not set
# CONFIG_NET_DSA_MV88E6123_61_65 is not set
CONFIG_ETHERNET=y
# CONFIG_ALTERA_TSE is not set
CONFIG_NET_VENDOR_ARC=y
CONFIG_NET_CADENCE=y
CONFIG_MACB=y
CONFIG_NET_VENDOR_BROADCOM=y
# CONFIG_B44 is not set
# CONFIG_NET_CALXEDA_XGMAC is not set
CONFIG_NET_VENDOR_CIRRUS=y
# CONFIG_CS89x0 is not set
CONFIG_DM9000=y
# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set
# CONFIG_DNET is not set
CONFIG_NET_VENDOR_FARADAY=y
# CONFIG_FTMAC100 is not set
# CONFIG_FTGMAC100 is not set
CONFIG_NET_VENDOR_HISILICON=y
# CONFIG_HIX5HD2_GMAC is not set
CONFIG_NET_VENDOR_INTEL=y
CONFIG_NET_VENDOR_I825XX=y
CONFIG_NET_VENDOR_MARVELL=y
# CONFIG_MVMDIO is not set
CONFIG_NET_VENDOR_MICREL=y
# CONFIG_KS8851 is not set
# CONFIG_KS8851_MLL is not set
CONFIG_NET_VENDOR_MICROCHIP=y
# CONFIG_ENC28J60 is not set
CONFIG_NET_VENDOR_NATSEMI=y
CONFIG_NET_VENDOR_8390=y
# CONFIG_AX88796 is not set
# CONFIG_ETHOC is not set
# CONFIG_SH_ETH is not set
CONFIG_NET_VENDOR_SAMSUNG=y
# CONFIG_SXGBE_ETH is not set
CONFIG_NET_VENDOR_SEEQ=y
CONFIG_NET_VENDOR_SMSC=y
# CONFIG_SMC91X is not set
# CONFIG_SMC911X is not set
# CONFIG_SMSC911X is not set
CONFIG_NET_VENDOR_STMICRO=y
# CONFIG_STMMAC_ETH is not set
CONFIG_NET_VENDOR_VIA=y
CONFIG_NET_VENDOR_WIZNET=y
# CONFIG_WIZNET_W5100 is not set
# CONFIG_WIZNET_W5300 is not set
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
# CONFIG_AT803X_PHY is not set
# CONFIG_AMD_PHY is not set
# CONFIG_MARVELL_PHY is not set
# CONFIG_DAVICOM_PHY is not set
# CONFIG_QSEMI_PHY is not set
......@@ -694,7 +844,8 @@ CONFIG_PHYLIB=y
# CONFIG_VITESSE_PHY is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BCM63XX_PHY is not set
# CONFIG_BCM7XXX_PHY is not set
# CONFIG_BCM87XX_PHY is not set
# CONFIG_ICPLUS_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_NATIONAL_PHY is not set
......@@ -703,47 +854,16 @@ CONFIG_PHYLIB=y
# CONFIG_MICREL_PHY is not set
# CONFIG_FIXED_PHY is not set
# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
CONFIG_MACB=y
# CONFIG_AX88796 is not set
# CONFIG_SMC91X is not set
# CONFIG_DM9000 is not set
# CONFIG_ENC28J60 is not set
# CONFIG_ETHOC is not set
# CONFIG_SMC911X is not set
# CONFIG_SMSC911X is not set
# CONFIG_DNET is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
# CONFIG_B44 is not set
# CONFIG_KS8851 is not set
# CONFIG_KS8851_MLL is not set
# CONFIG_FTMAC100 is not set
CONFIG_NETDEV_1000=y
# CONFIG_STMMAC_ETH is not set
CONFIG_NETDEV_10000=y
# CONFIG_MICREL_KS8995MA is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_WLAN is not set
#
# Enable WiMAX (Networking options) to see the WiMAX drivers
#
# CONFIG_WAN is not set
#
# CAIF transport drivers
#
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_ISDN is not set
# CONFIG_PHONE is not set
#
# Input device support
......@@ -752,14 +872,12 @@ CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
# CONFIG_INPUT_SPARSEKMAP is not set
# CONFIG_INPUT_MATRIXKMAP is not set
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
......@@ -783,6 +901,7 @@ CONFIG_INPUT_EVDEV=y
#
# Character devices
#
CONFIG_TTY=y
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
......@@ -794,6 +913,7 @@ CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_N_GSM is not set
# CONFIG_TRACE_SINK is not set
CONFIG_DEVKMEM=y
#
......@@ -804,26 +924,31 @@ CONFIG_DEVKMEM=y
#
# Non-8250 serial port support
#
# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_SERIAL_ATMEL_PDC=y
# CONFIG_SERIAL_ATMEL_TTYAT is not set
# CONFIG_SERIAL_MAX3100 is not set
# CONFIG_SERIAL_MAX3107 is not set
# CONFIG_SERIAL_MAX310X is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_TIMBERDALE is not set
# CONFIG_SERIAL_SCCNXP is not set
# CONFIG_SERIAL_ALTERA_JTAGUART is not set
# CONFIG_SERIAL_ALTERA_UART is not set
# CONFIG_SERIAL_IFX6X60 is not set
# CONFIG_SERIAL_ARC is not set
# CONFIG_SERIAL_FSL_LPUART is not set
# CONFIG_SERIAL_ST_ASC is not set
CONFIG_SERIAL_MCTRL_GPIO=y
# CONFIG_HVC_DCC is not set
# CONFIG_IPMI_HANDLER is not set
CONFIG_HW_RANDOM=y
# CONFIG_HW_RANDOM_TIMERIOMEM is not set
# CONFIG_HW_RANDOM_ATMEL is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_RAMOOPS is not set
# CONFIG_I2C is not set
CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
......@@ -835,6 +960,7 @@ CONFIG_SPI_MASTER=y
# CONFIG_SPI_ALTERA is not set
CONFIG_SPI_ATMEL=y
# CONFIG_SPI_BITBANG is not set
# CONFIG_SPI_CADENCE is not set
# CONFIG_SPI_GPIO is not set
# CONFIG_SPI_OC_TINY is not set
# CONFIG_SPI_PXA2XX_PCI is not set
......@@ -846,6 +972,8 @@ CONFIG_SPI_ATMEL=y
#
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set
# CONFIG_SPMI is not set
# CONFIG_HSI is not set
#
# PPS support
......@@ -855,16 +983,35 @@ CONFIG_SPI_ATMEL=y
#
# PPS generators support
#
#
# PTP clock support
#
# CONFIG_PTP_1588_CLOCK is not set
#
# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
#
CONFIG_PINCTRL=y
#
# Pin controllers
#
CONFIG_PINMUX=y
CONFIG_PINCONF=y
CONFIG_DEBUG_PINCTRL=y
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVRES=y
# CONFIG_DEBUG_GPIO is not set
CONFIG_GPIO_SYSFS=y
#
# Memory mapped GPIO expanders:
# Memory mapped GPIO drivers:
#
# CONFIG_GPIO_BASIC_MMIO is not set
# CONFIG_GPIO_IT8761E is not set
# CONFIG_GPIO_GENERIC_PLATFORM is not set
# CONFIG_GPIO_SCH311X is not set
#
# I2C GPIO expanders:
......@@ -878,19 +1025,26 @@ CONFIG_GPIO_SYSFS=y
# SPI GPIO expanders:
#
# CONFIG_GPIO_MAX7301 is not set
# CONFIG_GPIO_MCP23S08 is not set
# CONFIG_GPIO_MC33880 is not set
# CONFIG_GPIO_74X164 is not set
#
# AC97 GPIO expanders:
#
#
# LPC GPIO expanders:
#
#
# MODULbus GPIO expanders:
#
#
# USB GPIO expanders:
#
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_POWER_AVS is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_WATCHDOG is not set
......@@ -900,20 +1054,38 @@ CONFIG_SSB_POSSIBLE=y
# Sonics Silicon Backplane
#
# CONFIG_SSB is not set
CONFIG_MFD_SUPPORT=y
CONFIG_BCMA_POSSIBLE=y
#
# Broadcom specific AMBA
#
# CONFIG_BCMA is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_CROS_EC is not set
# CONFIG_MFD_ASIC3 is not set
# CONFIG_MFD_DA9052_SPI is not set
# CONFIG_MFD_MC13XXX_SPI is not set
# CONFIG_HTC_EGPIO is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_EZX_PCAP is not set
# CONFIG_MFD_PM8921_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_ABX500_CORE is not set
# CONFIG_MFD_SYSCON is not set
# CONFIG_MFD_TI_AM335X_TSCADC is not set
# CONFIG_MFD_TPS65912 is not set
# CONFIG_MFD_TPS65912_SPI is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_T7L66XB is not set
# CONFIG_MFD_TC6387XB is not set
# CONFIG_MFD_TC6393XB is not set
# CONFIG_MFD_ARIZONA_SPI is not set
# CONFIG_MFD_WM831X_SPI is not set
# CONFIG_MFD_MC13XXX is not set
# CONFIG_ABX500_CORE is not set
# CONFIG_EZX_PCAP is not set
# CONFIG_REGULATOR is not set
# CONFIG_MEDIA_SUPPORT is not set
......@@ -921,85 +1093,101 @@ CONFIG_MFD_SUPPORT=y
# Graphics support
#
CONFIG_HAVE_FB_ATMEL=y
#
# Direct Rendering Manager
#
# CONFIG_DRM is not set
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
# Frame buffer Devices
#
# CONFIG_DISPLAY_SUPPORT is not set
# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_VGASTATE is not set
#
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
# CONFIG_SOUND is not set
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
# CONFIG_HIDRAW is not set
# CONFIG_HID_PID is not set
#
# Special HID drivers
# HID support
#
# CONFIG_HID is not set
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_COMMON=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_USB is not set
# CONFIG_USB_MUSB_HDRC is not set
# CONFIG_USB_DWC3 is not set
# CONFIG_USB_CHIPIDEA is not set
#
# USB port drivers
#
#
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
# USB Physical Layer drivers
#
# CONFIG_USB_PHY is not set
# CONFIG_NOP_USB_XCEIV is not set
# CONFIG_AM335X_PHY_USB is not set
# CONFIG_SAMSUNG_USB2PHY is not set
# CONFIG_SAMSUNG_USB3PHY is not set
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_USB_ULPI is not set
CONFIG_USB_GADGET=y
# CONFIG_USB_GADGET_DEBUG is not set
CONFIG_USB_GADGET_DEBUG_FILES=y
# CONFIG_USB_GADGET_DEBUG_FILES is not set
# CONFIG_USB_GADGET_DEBUG_FS is not set
CONFIG_USB_GADGET_VBUS_DRAW=2
CONFIG_USB_GADGET_SELECTED=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
#
# USB Peripheral Controller
#
# CONFIG_USB_AT91 is not set
CONFIG_USB_ATMEL_USBA=y
# CONFIG_USB_GADGET_FUSB300 is not set
# CONFIG_USB_GADGET_R8A66597 is not set
# CONFIG_USB_GADGET_PXA_U2O is not set
# CONFIG_USB_GADGET_M66592 is not set
CONFIG_USB_GADGET_DUALSPEED=y
CONFIG_USB_ZERO=m
CONFIG_USB_ETH=m
CONFIG_USB_ETH_RNDIS=y
# CONFIG_USB_ETH_EEM is not set
# CONFIG_USB_FUSB300 is not set
# CONFIG_USB_FOTG210_UDC is not set
# CONFIG_USB_GR_UDC is not set
# CONFIG_USB_R8A66597 is not set
# CONFIG_USB_PXA27X is not set
# CONFIG_USB_MV_UDC is not set
# CONFIG_USB_MV_U3D is not set
# CONFIG_USB_M66592 is not set
# CONFIG_USB_NET2272 is not set
CONFIG_USB_LIBCOMPOSITE=m
CONFIG_USB_F_ACM=m
CONFIG_USB_U_SERIAL=m
CONFIG_USB_F_SERIAL=m
CONFIG_USB_F_OBEX=m
# CONFIG_USB_CONFIGFS is not set
# CONFIG_USB_ZERO is not set
# CONFIG_USB_ETH is not set
# CONFIG_USB_G_NCM is not set
# CONFIG_USB_GADGETFS is not set
# CONFIG_USB_FUNCTIONFS is not set
CONFIG_USB_FILE_STORAGE=m
# CONFIG_USB_FILE_STORAGE_TEST is not set
CONFIG_USB_MASS_STORAGE=m
# CONFIG_USB_MASS_STORAGE is not set
CONFIG_USB_G_SERIAL=m
# CONFIG_USB_G_PRINTER is not set
CONFIG_USB_CDC_COMPOSITE=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_MULTI_RNDIS=y
# CONFIG_USB_G_MULTI_CDC is not set
# CONFIG_USB_CDC_COMPOSITE is not set
# CONFIG_USB_G_ACM_MS is not set
# CONFIG_USB_G_MULTI is not set
# CONFIG_USB_G_HID is not set
# CONFIG_USB_G_DBGP is not set
#
# OTG and related infrastructure
#
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_USB_ULPI is not set
# CONFIG_NOP_USB_XCEIV is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_NFC_DEVICES is not set
# CONFIG_ACCESSIBILITY is not set
# CONFIG_EDAC is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_SYSTOHC=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
......@@ -1015,14 +1203,19 @@ CONFIG_RTC_INTF_DEV=y
#
# SPI RTC drivers
#
# CONFIG_RTC_DRV_M41T93 is not set
# CONFIG_RTC_DRV_M41T94 is not set
# CONFIG_RTC_DRV_DS1305 is not set
# CONFIG_RTC_DRV_DS1343 is not set
# CONFIG_RTC_DRV_DS1347 is not set
# CONFIG_RTC_DRV_DS1390 is not set
# CONFIG_RTC_DRV_MAX6902 is not set
# CONFIG_RTC_DRV_R9701 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_DS3234 is not set
# CONFIG_RTC_DRV_PCF2123 is not set
# CONFIG_RTC_DRV_RX4581 is not set
# CONFIG_RTC_DRV_MCP795 is not set
#
# Platform RTC drivers
......@@ -1040,29 +1233,87 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_RP5C01 is not set
# CONFIG_RTC_DRV_V3020 is not set
# CONFIG_RTC_DRV_DS2404 is not set
#
# on-CPU RTC drivers
#
# CONFIG_RTC_DRV_AT91RM9200 is not set
# CONFIG_RTC_DRV_AT91SAM9 is not set
# CONFIG_RTC_DRV_MOXART is not set
# CONFIG_RTC_DRV_XGENE is not set
#
# HID Sensor RTC drivers
#
# CONFIG_DMADEVICES is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
# CONFIG_VIRT_DRIVERS is not set
#
# Virtio drivers
#
# CONFIG_VIRTIO_MMIO is not set
#
# Microsoft Hyper-V guest support
#
# CONFIG_STAGING is not set
#
# SOC (System On Chip) specific Drivers
#
CONFIG_CLKDEV_LOOKUP=y
#
# Hardware Spinlock drivers
#
# CONFIG_SH_TIMER_CMT is not set
# CONFIG_SH_TIMER_MTU2 is not set
# CONFIG_SH_TIMER_TMU is not set
# CONFIG_EM_TIMER_STI is not set
# CONFIG_CLKSRC_VERSATILE is not set
# CONFIG_MAILBOX is not set
# CONFIG_IOMMU_SUPPORT is not set
#
# Remoteproc drivers
#
# CONFIG_STE_MODEM_RPROC is not set
#
# Rpmsg drivers
#
# CONFIG_PM_DEVFREQ is not set
# CONFIG_EXTCON is not set
# CONFIG_MEMORY is not set
# CONFIG_IIO is not set
# CONFIG_PWM is not set
# CONFIG_IPACK_BUS is not set
# CONFIG_RESET_CONTROLLER is not set
# CONFIG_FMC is not set
#
# PHY Subsystem
#
# CONFIG_GENERIC_PHY is not set
# CONFIG_BCM_KONA_USB2_PHY is not set
# CONFIG_PHY_SAMSUNG_USB2 is not set
# CONFIG_POWERCAP is not set
# CONFIG_MCB is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
CONFIG_FS_POSIX_ACL=y
......@@ -1090,11 +1341,8 @@ CONFIG_INOTIFY_USER=y
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
# CONFIG_MSDOS_FS is not set
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
......@@ -1103,11 +1351,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
CONFIG_PROC_FS=y
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_KERNFS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLB_PAGE is not set
# CONFIG_CONFIGFS_FS is not set
CONFIG_CONFIGFS_FS=y
CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
......@@ -1129,33 +1379,35 @@ CONFIG_JFFS2_ZLIB=y
CONFIG_JFFS2_RTIME=y
# CONFIG_JFFS2_RUBIN is not set
CONFIG_UBIFS_FS=y
# CONFIG_UBIFS_FS_XATTR is not set
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS_ZLIB=y
# CONFIG_UBIFS_FS_DEBUG is not set
# CONFIG_LOGFS is not set
CONFIG_CRAMFS=y
# CONFIG_CRAMFS is not set
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX6FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_PSTORE is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_F2FS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V2=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NFS_SWAP=y
# CONFIG_NFS_V4_1 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFS_USE_LEGACY_DNS is not set
CONFIG_NFS_USE_KERNEL_DNS=y
# CONFIG_NFS_USE_NEW_IDMAPPER is not set
CONFIG_NFS_DEBUG=y
# CONFIG_NFSD is not set
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
......@@ -1163,17 +1415,13 @@ CONFIG_NFS_ACL_SUPPORT=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_SUNRPC_SWAP=y
CONFIG_SUNRPC_DEBUG=y
# CONFIG_CEPH_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
......@@ -1213,90 +1461,160 @@ CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_MAC_ROMAN is not set
# CONFIG_NLS_MAC_CELTIC is not set
# CONFIG_NLS_MAC_CENTEURO is not set
# CONFIG_NLS_MAC_CROATIAN is not set
# CONFIG_NLS_MAC_CYRILLIC is not set
# CONFIG_NLS_MAC_GAELIC is not set
# CONFIG_NLS_MAC_GREEK is not set
# CONFIG_NLS_MAC_ICELAND is not set
# CONFIG_NLS_MAC_INUIT is not set
# CONFIG_NLS_MAC_ROMANIAN is not set
# CONFIG_NLS_MAC_TURKISH is not set
# CONFIG_NLS_UTF8 is not set
# CONFIG_DLM is not set
#
# Kernel hacking
#
#
# printk and dmesg options
#
# CONFIG_PRINTK_TIME is not set
CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
CONFIG_DEFAULT_MESSAGE_LOGLEVEL=7
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_DYNAMIC_DEBUG is not set
#
# Compile-time checks and compiler options
#
# CONFIG_DEBUG_INFO is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
CONFIG_STRIP_ASM_SYMS=y
# CONFIG_READABLE_ASM is not set
CONFIG_UNUSED_SYMBOLS=y
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_SECTION_MISMATCH is not set
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
# CONFIG_MAGIC_SYSRQ is not set
CONFIG_DEBUG_KERNEL=y
#
# Memory Debugging
#
# CONFIG_DEBUG_PAGEALLOC is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
CONFIG_HAVE_DEBUG_KMEMLEAK=y
# CONFIG_DEBUG_KMEMLEAK is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_VM is not set
CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_DEBUG_SHIRQ is not set
#
# Debug Lockups and Hangs
#
# CONFIG_LOCKUP_DETECTOR is not set
# CONFIG_HARDLOCKUP_DETECTOR is not set
# CONFIG_DETECT_HUNG_TASK is not set
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
CONFIG_SCHEDSTATS=y
# CONFIG_TIMER_STATS is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_KMEMLEAK is not set
#
# Lock Debugging (spinlocks, mutexes, etc...)
#
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_PROVE_LOCKING is not set
# CONFIG_SPARSE_RCU_POINTER is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_ATOMIC_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_LOCK_TORTURE_TEST is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_WRITECOUNT is not set
CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_DEBUG_LIST is not set
# CONFIG_TEST_LIST_SORT is not set
# CONFIG_DEBUG_PI_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_DEBUG_CREDENTIALS is not set
CONFIG_FRAME_POINTER=y
# CONFIG_BOOT_PRINTK_DELAY is not set
#
# RCU Debugging
#
# CONFIG_SPARSE_RCU_POINTER is not set
# CONFIG_TORTURE_TEST is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_RCU_TRACE is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
# CONFIG_SYSCTL_SYSCALL_CHECK is not set
# CONFIG_DEBUG_PAGEALLOC is not set
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_TRACING_SUPPORT=y
# CONFIG_FTRACE is not set
# CONFIG_DMA_API_DEBUG is not set
#
# Runtime Testing
#
# CONFIG_LKDTM is not set
# CONFIG_TEST_LIST_SORT is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_RBTREE_TEST is not set
# CONFIG_INTERVAL_TREE_TEST is not set
# CONFIG_PERCPU_TEST is not set
# CONFIG_ATOMIC64_SELFTEST is not set
# CONFIG_TEST_STRING_HELPERS is not set
# CONFIG_TEST_KSTRTOX is not set
# CONFIG_DMA_API_DEBUG is not set
# CONFIG_TEST_MODULE is not set
# CONFIG_TEST_USER_COPY is not set
# CONFIG_TEST_BPF is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_TEST_KSTRTOX is not set
# CONFIG_ARM_PTDUMP is not set
# CONFIG_STRICT_DEVMEM is not set
# CONFIG_ARM_UNWIND is not set
CONFIG_ARM_UNWIND=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_STACK_USAGE is not set
CONFIG_DEBUG_LL=y
# CONFIG_EARLY_PRINTK is not set
CONFIG_AT91_DEBUG_LL_DBGU1=y
# CONFIG_DEBUG_LL_UART_NONE is not set
# CONFIG_DEBUG_ICEDCC is not set
# CONFIG_OC_ETM is not set
# CONFIG_DEBUG_SEMIHOSTING is not set
# CONFIG_DEBUG_LL_UART_8250 is not set
# CONFIG_DEBUG_LL_UART_PL01X is not set
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
# CONFIG_DEBUG_UART_PL01X is not set
# CONFIG_DEBUG_UART_8250 is not set
CONFIG_UNCOMPRESS_INCLUDE="mach/uncompress.h"
CONFIG_EARLY_PRINTK=y
# CONFIG_DEBUG_SET_MODULE_RONX is not set
#
# Security options
#
CONFIG_KEYS=y
# CONFIG_PERSISTENT_KEYRINGS is not set
# CONFIG_BIG_KEYS is not set
# CONFIG_ENCRYPTED_KEYS is not set
# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
# CONFIG_SECURITY_DMESG_RESTRICT is not set
# CONFIG_SECURITY is not set
......@@ -1322,6 +1640,7 @@ CONFIG_CRYPTO_PCOMP=y
CONFIG_CRYPTO_PCOMP2=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_USER is not set
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CRYPTO_NULL=y
......@@ -1351,6 +1670,7 @@ CONFIG_CRYPTO_CTR=y
#
# Hash modes
#
# CONFIG_CRYPTO_CMAC is not set
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_VMAC is not set
......@@ -1359,6 +1679,8 @@ CONFIG_CRYPTO_CTR=y
# Digest
#
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_CRC32 is not set
# CONFIG_CRYPTO_CRCT10DIF is not set
# CONFIG_CRYPTO_GHASH is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
......@@ -1368,6 +1690,7 @@ CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
CONFIG_CRYPTO_SHA1=y
# CONFIG_CRYPTO_SHA1_ARM is not set
CONFIG_CRYPTO_SHA256=y
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_TGR192 is not set
......@@ -1377,6 +1700,7 @@ CONFIG_CRYPTO_SHA256=y
# Ciphers
#
CONFIG_CRYPTO_AES=y
# CONFIG_CRYPTO_AES_ARM is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_BLOWFISH is not set
......@@ -1398,6 +1722,8 @@ CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_ZLIB=y
CONFIG_CRYPTO_LZO=y
# CONFIG_CRYPTO_LZ4 is not set
# CONFIG_CRYPTO_LZ4HC is not set
#
# Random Number Generation
......@@ -1406,24 +1732,39 @@ CONFIG_CRYPTO_ANSI_CPRNG=m
# CONFIG_CRYPTO_USER_API_HASH is not set
# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
# CONFIG_CRYPTO_HW is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set
# CONFIG_BINARY_PRINTF is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_NET_UTILS=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_IO=y
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
# CONFIG_CRC_CCITT is not set
CONFIG_CRC16=y
# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC32_SELFTEST is not set
CONFIG_CRC32_SLICEBY8=y
# CONFIG_CRC32_SLICEBY4 is not set
# CONFIG_CRC32_SARWATE is not set
# CONFIG_CRC32_BIT is not set
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
# CONFIG_CRC8 is not set
# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set
# CONFIG_RANDOM32_SELFTEST is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_LZ4_DECOMPRESS=y
CONFIG_XZ_DEC=y
CONFIG_XZ_DEC_X86=y
CONFIG_XZ_DEC_POWERPC=y
......@@ -1438,9 +1779,17 @@ CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_XZ=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_LZ4=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAS_DMA=y
CONFIG_DQL=y
CONFIG_NLATTR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
# CONFIG_AVERAGE is not set
# CONFIG_CORDIC is not set
# CONFIG_DDR is not set
CONFIG_OID_REGISTRY=y
# CONFIG_VIRTUALIZATION is not set
doc/startup-guide/wrs-startup_guide.md
View file @ d8f1dc9f
......@@ -727,7 +727,7 @@ Specification
| **I/O** | 32bit Async Bridge with FPGA\ |
| | 100Base-T Ethernet |
+--------------------+-------------------------------------------------+
| **OS** | Linux (Kernel v2.6.39) |
| **OS** | Linux (Kernel v3.16.37) |
+--------------------+-------------------------------------------------+
......
doc/wrs-developer-manual.in
View file @ d8f1dc9f
......@@ -363,7 +363,7 @@ The messages of a download run are like the following ones:
2016-06-02 17:10:46: --- Downloading base packages
2016-06-02 17:10:50: Retrieved at91bootstrap-3-3.0.tar.gz from upstream
2016-06-02 17:10:51: Retrieved barebox-2014.04.0.tar.bz2 from upstream
2016-06-02 17:11:21: Retrieved linux-2.6.39.tar.bz2 from upstream
2016-06-02 17:11:21: Retrieved linux-3.16.37.tar.xz from upstream
2016-06-02 17:11:22: Retrieved wrs-gw-v4.2-20150826.tar.gz from upstream
2016-06-02 17:11:27: Retrieved buildroot-2016.02.tar.bz2 from upstream
@end smallexample
......@@ -736,31 +736,26 @@ in two lines with a local variable to fit the page with in documentation):
@node The Linux Kernel
@subsection The Linux Kernel
The kernel is currently version 2.6.39, compiled from an uncompressed
The kernel is currently version 3.16.37, compiled from an uncompressed
tar file (so not within a @i{git} repository). The upstream
vanilla kernel is downloaded, then
local patches are applied (they come from a @i{git}
repository, but they are currently applied with a simple @i{patch}
command).
The relevant patches are available in @i{patches/kernel/v2.6.39},
The relevant patches are available in @i{patches/kernel/v3.16.37},
and are currently the following ones:
@example
0001-wrs3-changes-to-g45ek.patch
0002-initramfs-stop-after-one-cpio-archive.patch
0003-at91-NR_IRQS-increase-by-64-to-fit-custom-muxes.patch
0004-irq-export-symbols-for-external-irq-controller.patch
0005-Change-Vbus-pin.patch
0006-arm-fiq-allow-modules-to-exploit-the-fiq-mechanism.patch
0007-mtd-nand-sam9g45-can-hwecc-like-9263.patch
0008-wrs3-use-correct-nand-partitioning.patch
0009-at91-udc-force-full-speed.patch
0010-sam9m10g45ek-for-wrs-new-partitioning.patch
0011-sam9m10g45ek-for-wrs-final-partitions-for-V4.1.patch
0012-sam9m10g45ek-for-wrs-more-relaxed-nand-timings.patch
0013-mtd_dataflash-Read-EDI-JEDEC-to-support-AT45DB641E.patch
0014-sam9m10g45ek-for-wrs-provide-bootcount-using-scratch.patch
0001-initramfs-stop-after-one-cpio-archive.patch
0002-arm-fiq-allow-modules-to-exploit-the-fiq-mechanism.patch
0003-mtd_dataflash-Read-EDI-bytes-in-JEDEC-to-support-AT4.patch
0004-wr-switch-sam9m10g45ek-enable-FPGA-access-from-EBI1-.patch
0005-wr-switch-sam9m10g45ek-change-USB-vbus_pin-from-PB19.patch
0006-wr-switch-sam9m10g45ek-store-device-partitioning.patch
0007-wr-switch-sam9m10g45ek-more-relaxed-nand-timings.patch
0008-wr-switch-sam9m10g45ek-provide-bootcount-using-scrat.patch
0009-wr-switch-at91-udc-force-full-speed.patch
@end example
The configuration we use to build the kernel is not a patch but a plain
......@@ -797,7 +792,7 @@ Currently, the package includes the following modules:
@itemize @bullet
@item @i{wr_vic.ko}: the interrupt controller for in-FPGA devices.
@item @i{htvic.ko}: the interrupt controller for in-FPGA devices.
@item @i{wr-nic.ko}: the network ``card'' driver for WR ports.
@item @i{wr_rtu.ko}: the routing-table interface between the
switching core and the associated user-space daemon.
......@@ -812,6 +807,8 @@ This is considered acceptable, because system time is only
used for logging.
@item @i{wrs_devices.ko}: a dummy module that register our platform devices.
@end itemize
@c --------------------------------------------------------------------------
......
doc/wrs-todo.in
View file @ d8f1dc9f
......@@ -141,13 +141,6 @@ waiting for the boot loader to be sent to RAM from USB.
@itemize @bullet
@item 2.6.39 is pretty old nowadays. We should move to a recent kernel.
Unfortunately this means writing the ``device tree'' crap for our board,
as everything nowadays is device-tree-based. Which in my opinion has
been designed by our competitors, to kill us slowly and painfully.
In addition, our patches must be ported forward. A patch-set for 3.14
is currently work in progress.
@item The @i{wr-nic} driver is very similar to what we run for the SPEC,
we went forward in merging it with the one in @i{spec-sw} but a few
lines are still different. Unifying will allow using a driver
......
kernel/Makefile
View file @ d8f1dc9f
DIRS = wr_vic wr_nic wr_rtu wr_pstats wr_clocksource
DIRS = coht_vic wr_nic wr_rtu wr_pstats wr_clocksource wrs_devices
# We may "LINUX ?= /usr/src/linux-wrswitch", but it's better to leave it empty
......
kernel/coht_vic/Kbuild 0 → 100644
View file @ d8f1dc9f
ccflags-y += -Werror
obj-m := htvic.o
kernel/coht_vic/Makefile 0 → 100644
View file @ d8f1dc9f
export ARCH ?= arm
export CROSS_COMPILE ?= $(CROSS_COMPILE_ARM)
all: modules
modules:
$(MAKE) -C $(LINUX) M=$(shell /bin/pwd)
clean:
$(MAKE) -C $(LINUX) M=$(shell /bin/pwd) clean
gtags:
gtags --statistics
.PHONY: all clean gtags
kernel/coht_vic/htvic.c 0 → 100644
View file @ d8f1dc9f
/*
* Driver for the HT-VIC IRQ controller
*
* Copyright (c) 2016 CERN
* Author: Federico Vaga <federico.vaga@cern.ch>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/version.h>
#include <linux/irqdomain.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
#include <linux/irqchip/chained_irq.h>
#else
static inline void chained_irq_enter(struct irq_chip *chip,
struct irq_desc *desc)
{
/* FastEOI controllers require no action on entry. */
if (chip->irq_eoi)
return;
if (chip->irq_mask_ack) {
chip->irq_mask_ack(&desc->irq_data);
} else {
chip->irq_mask(&desc->irq_data);
if (chip->irq_ack)
chip->irq_ack(&desc->irq_data);
}
}
static inline void chained_irq_exit(struct irq_chip *chip,
struct irq_desc *desc)
{
if (chip->irq_eoi)
chip->irq_eoi(&desc->irq_data);
else
chip->irq_unmask(&desc->irq_data);
}
#endif
#include "htvic.h"
struct memory_ops memop = {
.read = NULL,
.write = NULL,
};
/**
* End of interrupt for the VIC. In case of level interrupt,
* there is no way to delegate this to the kernel
*/
static void htvic_eoi(struct irq_data *d)
{
struct htvic_device *vic = irq_data_get_irq_chip_data(d);
/*
* Any write operation acknowledges the pending interrupt.
* Then, VIC advances to another pending interrupt(s) or
* releases the master interrupt output.
*/
htvic_iowrite(vic, 1, vic->kernel_va + VIC_REG_EOIR);
}
static void htvic_mask_disable_reg(struct irq_data *d)
{
struct htvic_device *htvic = irq_data_get_irq_chip_data(d);
htvic_iowrite(htvic, 1 << d->hwirq,
htvic->kernel_va + VIC_REG_IDR);
}
static void htvic_unmask_enable_reg(struct irq_data *d)
{
struct htvic_device *htvic = irq_data_get_irq_chip_data(d);
htvic_iowrite(htvic, 1 << d->hwirq,
htvic->kernel_va + VIC_REG_IER);
}
static void htvic_irq_ack(struct irq_data *d)
{
}
/**
*
*/
static unsigned int htvic_irq_startup(struct irq_data *d)
{
struct htvic_device *vic = irq_data_get_irq_chip_data(d);
int ret;
ret = try_module_get(vic->pdev->dev.driver->owner);
if (ret == 0) { /* 0 fail, 1 success */
dev_err(&vic->pdev->dev,
"Cannot pin the \"%s\" driver. Something really wrong is going on\n",
vic->pdev->dev.driver->name);
return 1;
}
htvic_unmask_enable_reg(d);
return 0;
}
/**
* Executed when a driver does `free_irq()`.
*/
static void htvic_irq_shutdown(struct irq_data *d)
{
struct htvic_device *vic = irq_data_get_irq_chip_data(d);
htvic_mask_disable_reg(d);
module_put(vic->pdev->dev.driver->owner);
}
static struct irq_chip htvic_chip = {
.name = "HT-VIC",
.irq_startup = htvic_irq_startup,
.irq_shutdown = htvic_irq_shutdown,
.irq_ack = htvic_irq_ack,
.irq_eoi = htvic_eoi,
.irq_mask_ack = htvic_mask_disable_reg,
.irq_mask = htvic_mask_disable_reg,
.irq_unmask = htvic_unmask_enable_reg,
};
/**
* It match a given device with the irq_domain. `struct device_node *` is just
* a convention. actually it can be anything (I do not understand why kernel
* people did not use `void *`)
*
* In our case here we expect a string because we identify this domain by
* name
*/
static int htvic_irq_domain_match(struct irq_domain *d, struct device_node *node)
{
char *name = (char *)node;
if (strcmp(d->name, name) == 0)
return 1;
return 0;
}
/**
* Given the hardware IRQ and the Linux IRQ number (virtirq), configure the
* Linux IRQ number in order to handle properly the incoming interrupts
* on the hardware IRQ line.
*/
static int htvic_irq_domain_map(struct irq_domain *h,
unsigned int virtirq,
irq_hw_number_t hwirq)
{
struct htvic_device *htvic = h->host_data;
struct irq_desc *desc = irq_to_desc(virtirq);
#if 0
struct resource *r = platform_get_resource(htvic->pdev,
IORESOURCE_IRQ, 0);
#endif
irq_set_chip(virtirq, &htvic_chip);
irq_set_handler(virtirq, handle_simple_irq);
/*
* It MUST be no-thread because the VIC EOI must occur AFTER
* the device handler ack its signal. Any whay the interrupt from
* the carrier is already threaded
*/
desc->status_use_accessors |= IRQ_NOTHREAD;
/* The VIC is only level, it emulates edge */
#if 0
if (r->flags & (IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE)) {
__irq_set_handler(virtirq, handle_edge_irq, 0, NULL);
} else {
dev_err(&htvic->pdev->dev,
"Invalid IRQ resource, it must be explicit if it is edge or level\n");
return -EINVAL;
}
#endif
irq_set_chip_data(virtirq, htvic);
irq_set_handler_data(virtirq, htvic);
return 0;
}
static struct irq_domain_ops htvic_irq_domain_ops = {
.match = htvic_irq_domain_match,
.map = htvic_irq_domain_map,
};
/**
* Handle cascade IRQ coming from the platform and re-route it properly.
* When the platform receives an interrupt it will call than this function
* which then will call the proper handler
*/
static void htvic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
{
struct htvic_device *htvic = irq_get_handler_data(irq);
struct irq_chip *chip = irq_get_chip(irq);
unsigned int cascade_irq, /* i = 0, */ vect;
/* unsigned long status; */
chained_irq_enter(chip, desc);
do {
vect = htvic_ioread(htvic, htvic->kernel_va + VIC_REG_VAR) & 0xFF;
if (vect >= VIC_MAX_VECTORS)
goto out;
cascade_irq = irq_find_mapping(htvic->domain, vect);
generic_handle_irq(cascade_irq);
/**
* ATTENTION here the ack is actually an EOI.The kernel
* does not export the handle_edge_eoi_irq() handler which
* is the one we need here. The kernel offers us the
* handle_edge_irq() which use only the ack() function.
* So what actually we need to to is to call the ack
* function but not the eoi function.
*/
htvic_eoi(irq_get_irq_data(cascade_irq));
} while(htvic_ioread(htvic, htvic->kernel_va + VIC_REG_RISR));
out:
chained_irq_exit(chip, desc);
}
/**
* Mapping of HTVIC irqs to Linux irqs using linear IRQ domain
*/
static int htvic_irq_mapping(struct htvic_device *htvic)
{
struct irq_desc *desc;
int i, irq;
htvic->domain = irq_domain_add_linear(NULL, VIC_MAX_VECTORS,
&htvic_irq_domain_ops, htvic);
if (!htvic->domain)
return -ENOMEM;
htvic->domain->name = kasprintf(GFP_KERNEL, "%s",
dev_name(&htvic->pdev->dev));
/* Create the mapping between HW irq and virtual IRQ number */
for (i = 0; i < VIC_MAX_VECTORS; ++i) {
htvic->hwid[i] = htvic_ioread(htvic, htvic->kernel_va +
VIC_IVT_RAM_BASE + 4 * i);
htvic_iowrite(htvic, i,
htvic->kernel_va + VIC_IVT_RAM_BASE + 4 * i);
irq = irq_create_mapping(htvic->domain, i);
if (irq <= 0)
goto out;
}
irq = platform_get_irq(htvic->pdev, 0);
desc = irq_to_desc(irq);
htvic->platform_handle_irq = desc->handle_irq;
htvic->platform_handler_data = desc->irq_data.handler_data;
if (irq_set_handler_data(irq, htvic) != 0)
BUG();
irq_set_chained_handler(irq, htvic_handle_cascade_irq);
return 0;
out:
irq_domain_remove(htvic->domain);
return -EPERM;
}
/**
* Check if the platform is providing all the necessary information
* for the HTVIC to work properly.
*
* The HTVIC needs the following informations:
* - a Linux IRQ number where it should attach itself
* - a virtual address where to find the component
*/
static int htvic_validation(struct platform_device *pdev)
{
struct resource *r;
r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!r) {
dev_err(&pdev->dev, "Carrier IRQ number is missing\n");
return -EINVAL;
}
if (!(r->flags & (IORESOURCE_IRQ_HIGHEDGE |
IORESOURCE_IRQ_LOWEDGE |
IORESOURCE_IRQ_HIGHLEVEL |
IORESOURCE_IRQ_LOWLEVEL))) {
dev_err(&pdev->dev,
"Edge/Level High/Low information missing\n");
return -EINVAL;
}
r = platform_get_resource(pdev, IORESOURCE_MEM, HTVIC_MEM_BASE);
if (!r) {
dev_err(&pdev->dev, "VIC base address is missing\n");
return -EINVAL;
}
return 0;
}
/**
* It acks any pending interrupt in order to avoid to bring the HTVIC
* to a stable status (possibly)
*/
static inline void htvic_ack_pending(struct htvic_device *htvic)
{
while (htvic_ioread(htvic, htvic->kernel_va + VIC_REG_RISR))
htvic_iowrite(htvic, 1, htvic->kernel_va + VIC_REG_EOIR);
}
/**
* Create a new instance for this driver.
*/
static int htvic_probe(struct platform_device *pdev)
{
struct htvic_device *htvic;
const struct resource *r;
uint32_t ctl;
int ret;
/*
* TODO theoretically speaking all the confguration should come
* from a platform_data structure. Since we do not have it yet,
* we proceed this way
*/
switch(pdev->id_entry->driver_data) {
case HTVIC_VER_SPEC:
case HTVIC_VER_WRSWI:
memop.read = __htvic_ioread32;
memop.write = __htvic_iowrite32;
break;
case HTVIC_VER_SVEC:
memop.read = __htvic_ioread32be;
memop.write = __htvic_iowrite32be;
break;
default:
ret = -EINVAL;
goto out_memop;
}
ret = htvic_validation(pdev);
if (ret)
return ret;
htvic = kzalloc(sizeof(struct htvic_device), GFP_KERNEL);
if (!htvic)
return -ENOMEM;
dev_set_drvdata(&pdev->dev, htvic);
htvic->pdev = pdev;
r = platform_get_resource(pdev, IORESOURCE_MEM, HTVIC_MEM_BASE);
htvic->kernel_va = ioremap(r->start, resource_size(r));
/* Disable the VIC during the configuration */
htvic_iowrite(htvic, 0, htvic->kernel_va + VIC_REG_CTL);
/* Disable also all interrupt lines */
htvic_iowrite(htvic, ~0, htvic->kernel_va + VIC_REG_IDR);
/* Ack any pending interrupt */
htvic_ack_pending(htvic);
ret = htvic_irq_mapping(htvic);
if (ret)
goto out_map;
/* VIC configuration */
ctl = 0;
ctl |= VIC_CTL_ENABLE;
switch (pdev->id_entry->driver_data) {
case HTVIC_VER_SPEC:
ctl |= VIC_CTL_POL;
ctl |= VIC_CTL_EMU_EDGE;
ctl |= VIC_CTL_EMU_LEN_W(250);
break;
case HTVIC_VER_SVEC:
ctl |= VIC_CTL_POL;
ctl |= VIC_CTL_EMU_EDGE;
ctl |= VIC_CTL_EMU_LEN_W(1000);
break;
case HTVIC_VER_WRSWI:
break;
default:
goto out_ctl;
}
htvic_iowrite(htvic, ctl, htvic->kernel_va + VIC_REG_CTL);
return 0;
out_ctl:
out_map:
kfree(htvic);
out_memop:
return ret;
}
/**
* Copied from kernel 3.6 since it's not exported
* And modified a bit because other helpers are not exported
*/
void __htvic_irq_shutdown(struct irq_desc *desc)
{
/* irq_state_set_disabled(desc); */
desc->irq_data.state_use_accessors |= IRQD_IRQ_DISABLED;
desc->depth = 1;
if (desc->irq_data.chip->irq_shutdown)
desc->irq_data.chip->irq_shutdown(&desc->irq_data);
else if (desc->irq_data.chip->irq_disable)
desc->irq_data.chip->irq_disable(&desc->irq_data);
else
desc->irq_data.chip->irq_mask(&desc->irq_data);
/* irq_state_set_masked(desc); */
desc->irq_data.state_use_accessors |= IRQD_IRQ_MASKED;
}
/**
* Unload the htvic driver from the platform
*/
static int htvic_remove(struct platform_device *pdev)
{
struct htvic_device *htvic = dev_get_drvdata(&pdev->dev);
struct irq_desc *desc = irq_to_desc(platform_get_irq(htvic->pdev, 0));
int i;
/*
* Disable all interrupts to prevent spurious interrupt
* Disable also the HTVIC component for the very same reason,
* but this way on next instance even if we enable the VIC
* no interrupt will come unless configured.
*/
htvic_iowrite(htvic, ~0, htvic->kernel_va + VIC_REG_IDR);
htvic_iowrite(htvic, 0, htvic->kernel_va + VIC_REG_CTL);
/*
* Restore HTVIC vector table with it's original content
* Release Linux IRQ number
*/
for (i = 0; i < VIC_MAX_VECTORS; i++) {
htvic_iowrite(htvic, htvic->hwid[i], htvic->kernel_va + VIC_IVT_RAM_BASE + 4 * i);
irq_dispose_mapping(irq_find_mapping(htvic->domain, i));
}
/*
* Restore the platform IRQ status by undoing what
* irq_set_chained_handler() does in the kernel. I have to do it
* manually here because it was not thought that an IRQ controller
* may appear later in time.
*/
__htvic_irq_shutdown(desc); /* free_irq() */
irq_set_handler(desc->irq_data.irq, htvic->platform_handle_irq);
irq_set_handler_data(desc->irq_data.irq, htvic->platform_handler_data);
irq_modify_status(desc->irq_data.irq,
IRQ_NOPROBE | IRQ_NOREQUEST | IRQ_NOTHREAD,
0);
/*
* Clear the memory and restore flags when needed
*/
kfree(htvic->domain->name);
irq_domain_remove(htvic->domain);
kfree(htvic);
return 0;
}
/**
* List of supported platform
*/
static const struct platform_device_id htvic_id_table[] = {
{ /* SPEC compatible */
.name = "htvic-spec",
.driver_data = HTVIC_VER_SPEC,
}, { /* SVEC compatible */
.name = "htvic-svec",
.driver_data = HTVIC_VER_SVEC,
}, {
.name = "htvic-wr-swi",
.driver_data = HTVIC_VER_WRSWI,
},
{},
};
static struct platform_driver htvic_driver = {
.driver = {
.name = "htvic",
.owner = THIS_MODULE,
},
.id_table = htvic_id_table,
.probe = htvic_probe,
.remove = htvic_remove,
};
module_platform_driver(htvic_driver);
MODULE_AUTHOR("Federico Vaga <federico.vaga@cern.ch>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("CERN BECOHT VHDL Vector Interrupt Controller - HTVIC");
kernel/coht_vic/htvic.h 0 → 100644
View file @ d8f1dc9f
/*
* Copyright (c) 2016 CERN
* Author: Federico Vaga <federico.vaga@cern.ch>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __HTVIC_H__
#define __HTVIC_H__
#include "htvic_regs.h"
#define VIC_MAX_VECTORS 32
#define VIC_SDB_VENDOR 0xce42
#define VIC_SDB_DEVICE 0x0013
#define VIC_IRQ_BASE_NUMBER 0
enum htvic_versions {
HTVIC_VER_SPEC = 0,
HTVIC_VER_SVEC,
HTVIC_VER_WRSWI,
};
enum htvic_mem_resources {
HTVIC_MEM_BASE = 0,
};
struct htvic_data {
uint32_t is_edge; /* 1 edge, 0 level */
uint32_t is_raising; /* 1 raising, 0 falling */
uint32_t pulse_len;
};
struct htvic_device {
struct platform_device *pdev;
struct irq_domain *domain;
unsigned int hwid[VIC_MAX_VECTORS]; /**> original ID from FPGA */
struct htvic_data *data;
void __iomem *kernel_va;
irq_flow_handler_t platform_handle_irq;
void *platform_handler_data;
};
struct memory_ops {
u32 (*read)(void *addr);
void (*write)(u32 value, void *addr);
};
extern struct memory_ops memop;
static inline u32 htvic_ioread(struct htvic_device *htvic, void __iomem *addr)
{
return memop.read(addr);
}
static inline void htvic_iowrite(struct htvic_device *htvic,
u32 value, void __iomem *addr)
{
return memop.write(value, addr);
}
static inline u32 __htvic_ioread32(void *addr)
{
return ioread32(addr);
}
static inline u32 __htvic_ioread32be(void *addr)
{
return ioread32be(addr);
}
static inline void __htvic_iowrite32(u32 value,void __iomem *addr)
{
iowrite32(value, addr);
}
static inline void __htvic_iowrite32be(u32 value, void __iomem *addr)
{
iowrite32be(value, addr);
}
#endif
kernel/coht_vic/htvic_regs.h 0 → 100644
View file @ d8f1dc9f
/*
Register definitions for slave core: Vectored Interrupt Controller (VIC)
* File : here.h
* Author : auto-generated by wbgen2 from wb_slave_vic.wb
* Created : Thu Jul 14 15:43:13 2016
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wb_slave_vic.wb
DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!
*/
#ifndef __WBGEN2_REGDEFS_WB_SLAVE_VIC_WB
#define __WBGEN2_REGDEFS_WB_SLAVE_VIC_WB
#ifdef __KERNEL__
#include <linux/types.h>
#else
#include <inttypes.h>
#endif
#if defined( __GNUC__)
#define PACKED __attribute__ ((packed))
#else
#error "Unsupported compiler?"
#endif
#ifndef __WBGEN2_MACROS_DEFINED__
#define __WBGEN2_MACROS_DEFINED__
#define WBGEN2_GEN_MASK(offset, size) (((1<<(size))-1) << (offset))
#define WBGEN2_GEN_WRITE(value, offset, size) (((value) & ((1<<(size))-1)) << (offset))
#define WBGEN2_GEN_READ(reg, offset, size) (((reg) >> (offset)) & ((1<<(size))-1))
#define WBGEN2_SIGN_EXTEND(value, bits) (((value) & (1<<bits) ? ~((1<<(bits))-1): 0 ) | (value))
#endif
/* definitions for register: VIC Control Register */
/* definitions for field: VIC Enable in reg: VIC Control Register */
#define VIC_CTL_ENABLE WBGEN2_GEN_MASK(0, 1)
/* definitions for field: VIC output polarity in reg: VIC Control Register */
#define VIC_CTL_POL WBGEN2_GEN_MASK(1, 1)
/* definitions for field: Emulate Edge sensitive output in reg: VIC Control Register */
#define VIC_CTL_EMU_EDGE WBGEN2_GEN_MASK(2, 1)
/* definitions for field: Emulated Edge pulse timer in reg: VIC Control Register */
#define VIC_CTL_EMU_LEN_MASK WBGEN2_GEN_MASK(3, 16)
#define VIC_CTL_EMU_LEN_SHIFT 3
#define VIC_CTL_EMU_LEN_W(value) WBGEN2_GEN_WRITE(value, 3, 16)
#define VIC_CTL_EMU_LEN_R(reg) WBGEN2_GEN_READ(reg, 3, 16)
/* definitions for register: Raw Interrupt Status Register */
/* definitions for register: Interrupt Enable Register */
/* definitions for register: Interrupt Disable Register */
/* definitions for register: Interrupt Mask Register */
/* definitions for register: Vector Address Register */
/* definitions for register: Software Interrupt Register */
/* definitions for register: End Of Interrupt Acknowledge Register */
/* definitions for RAM: Interrupt Vector Table */
#define VIC_IVT_RAM_BASE 0x00000080 /* base address */
#define VIC_IVT_RAM_BYTES 0x00000080 /* size in bytes */
#define VIC_IVT_RAM_WORDS 0x00000020 /* size in 32-bit words, 32-bit aligned */
/* [0x0]: REG VIC Control Register */
#define VIC_REG_CTL 0x00000000
/* [0x4]: REG Raw Interrupt Status Register */
#define VIC_REG_RISR 0x00000004
/* [0x8]: REG Interrupt Enable Register */
#define VIC_REG_IER 0x00000008
/* [0xc]: REG Interrupt Disable Register */
#define VIC_REG_IDR 0x0000000c
/* [0x10]: REG Interrupt Mask Register */
#define VIC_REG_IMR 0x00000010
/* [0x14]: REG Vector Address Register */
#define VIC_REG_VAR 0x00000014
/* [0x18]: REG Software Interrupt Register */
#define VIC_REG_SWIR 0x00000018
/* [0x1c]: REG End Of Interrupt Acknowledge Register */
#define VIC_REG_EOIR 0x0000001c
#endif
kernel/wr_clocksource/wr_clocksource.c
View file @ d8f1dc9f
......@@ -109,7 +109,7 @@ static void wrcs_timer_fn(unsigned long unused)
return;
}
clocksource_register(&wrcs_cs);
clocksource_register_hz(&wrcs_cs, WRCS_FREQUENCY);
wrcs_is_registered = 1;
/* And don't restart the timer */
}
......@@ -122,8 +122,6 @@ static int wrcs_init(void)
return -EIO;
}
clocksource_calc_mult_shift(&wrcs_cs, WRCS_FREQUENCY, 1);
/* Fire the timer */
mod_timer(&wrcs_timer, jiffies + HZ);
return 0;
......
kernel/wr_nic/device.c
View file @ d8f1dc9f
......@@ -20,10 +20,19 @@
#include <linux/spinlock.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/irqdomain.h>
#include "wr-nic.h"
#include "nic-mem.h"
/**
* IRQ domain to be used. This is static here but in general it should be
* a module parameter or somehow configurable. For the time being we keep
* it hard-coded here.
*/
static const char *irqdomain_name = "htvic-wr-swi.0";
#if WR_IS_NODE /* Our platform_data is different in node vs switch */
#include "../spec-nic.h"
static inline struct wrn_dev *wrn_from_pdev(struct platform_device *pdev)
......@@ -42,7 +51,15 @@ static inline struct wrn_dev *wrn_from_pdev(struct platform_device *pdev)
static int wrn_remove(struct platform_device *pdev)
{
struct wrn_dev *wrn = wrn_from_pdev(pdev);
int i;
int i, irq;
struct irq_domain *irqdomain;
irqdomain = irq_find_host((struct device_node *)irqdomain_name);
if (!irqdomain) {
dev_err(&pdev->dev, "The IRQ domain %s does not exist\n",
irqdomain_name);
return -EINVAL;
}
if (WR_IS_SWITCH) {
spin_lock(&wrn->lock);
......@@ -71,8 +88,10 @@ static int wrn_remove(struct platform_device *pdev)
/* Unregister all interrupts that were registered */
for (i = 0; wrn->irq_registered; i++) {
static int irqs[] = WRN_IRQ_NUMBERS;
if (wrn->irq_registered & (1 << i))
free_irq(irqs[i], wrn);
if (wrn->irq_registered & (1 << i)) {
irq = irq_find_mapping(irqdomain, irqs[i]);
free_irq(irq, wrn);
}
wrn->irq_registered &= ~(1 << i);
}
return 0;
......@@ -113,12 +132,20 @@ static int wrn_probe(struct platform_device *pdev)
struct net_device *netdev;
struct wrn_ep *ep;
struct wrn_dev *wrn = wrn_from_pdev(pdev);
int i, err = 0;
int i, err = 0, irq;
/* Lazily: irqs are not in the resource list */
static int irqs[] = WRN_IRQ_NUMBERS;
static char *irq_names[] = WRN_IRQ_NAMES;
static irq_handler_t irq_handlers[] = WRN_IRQ_HANDLERS;
struct irq_domain *irqdomain;
irqdomain = irq_find_host((struct device_node *)irqdomain_name);
if (!irqdomain) {
dev_err(&pdev->dev, "The IRQ domain %s does not exist\n",
irqdomain_name);
return -EINVAL;
}
/* No need to lock_irq: we only protect count and continue unlocked */
if (WR_IS_SWITCH) {
......@@ -148,7 +175,8 @@ static int wrn_probe(struct platform_device *pdev)
if (WR_IS_SWITCH) {
/* Register the interrupt handlers (not shared) */
for (i = 0; i < ARRAY_SIZE(irq_names); i++) {
err = request_irq(irqs[i], irq_handlers[i],
irq = irq_find_mapping(irqdomain, irqs[i]);
err = request_irq(irq, irq_handlers[i],
IRQF_TRIGGER_LOW, irq_names[i], wrn);
if (err)
goto out;
......
kernel/wr_nic/nic-hardware.h
View file @ d8f1dc9f
......@@ -20,7 +20,7 @@
#define NSEC_PER_TICK (NSEC_PER_SEC / REFCLK_FREQ)
/* The interrupt is one of those managed by our WRVIC device */
#define WRN_IRQ_BASE 192
#define WRN_IRQ_BASE 0
#define WRN_IRQ_NIC (WRN_IRQ_BASE + 0)
#define WRN_IRQ_TSTAMP (WRN_IRQ_BASE + 1)
//#define WRN_IRQ_PPSG (WRN_IRQ_BASE + )
......
kernel/wr_pstats/wr_pstats.c
View file @ d8f1dc9f
......@@ -28,6 +28,13 @@
#include <linux/spinlock.h>
#include <linux/moduleparam.h>
#include <linux/netdevice.h>
#include <linux/irqdomain.h>
/*
* Ugly trick to be able to use headers that have been moved out
* from mach/ directory
*/
#include <mach/../../at91_aic.h>
#include "../wbgen-regs/pstats-regs.h"
#include "wr_pstats.h"
......@@ -35,6 +42,13 @@
#define pstats_readl(device, r) __raw_readl(&device.regs->r)
#define pstats_writel(val, device, r) __raw_writel(val, &device.regs->r)
/**
* IRQ domain to be used. This is static here but in general it should be
* a module parameter or somehow configurable. For the time being we keep
* it hard-coded here.
*/
static const char *irqdomain_name = "htvic-wr-swi.0";
static int pstats_nports = PSTATS_DEFAULT_NPORTS;
static uint32_t portmsk;
static unsigned int firmware_version; /* FPGA firmware version */
......@@ -436,8 +450,16 @@ static struct ctl_table_header *pstats_header;
static int __init pstats_init(void)
{
int i, err = 0;
int i, err = 0, irq;
unsigned int data;
struct irq_domain *irqdomain;
irqdomain = irq_find_host((struct device_node *)irqdomain_name);
if (!irqdomain) {
pr_err("pstat: The IRQ domain %s does not exist\n",
irqdomain_name);
return -EINVAL;
}
if (pstats_nports > PSTATS_MAX_NPORTS) {
printk(KERN_ERR "%s: Too many ports for pstats %u,"
......@@ -525,7 +547,8 @@ static int __init pstats_init(void)
/*request pstats IRQ*/
pstats_irq_disable(PSTATS_ALL_MSK);
err = request_irq(WRVIC_BASE_IRQ+WR_PSTATS_IRQ, pstats_irq_handler,
irq = irq_find_mapping(irqdomain, WR_PSTATS_IRQ);
err = request_irq(irq, pstats_irq_handler,
IRQF_SHARED, "wr_pstats", &pstats_dev);
if (err) {
printk(KERN_ERR "%s: cannot request interrupt\n",
......@@ -553,8 +576,19 @@ err_exit:
static void __exit pstats_exit(void)
{
int irq;
struct irq_domain *irqdomain;
pstats_irq_disable(PSTATS_ALL_MSK);
free_irq(WRVIC_BASE_IRQ+WR_PSTATS_IRQ, &pstats_dev);
irqdomain = irq_find_host((struct device_node *)irqdomain_name);
if (!irqdomain) {
pr_err("pstat: The IRQ domain %s does not exist\n",
irqdomain_name);
} else {
irq = irq_find_mapping(irqdomain, WR_PSTATS_IRQ);
free_irq(irq, &pstats_dev);
}
wr_nic_pstats_callback = NULL;
......
kernel/wr_rtu/wr_rtu.c
View file @ d8f1dc9f
......@@ -39,6 +39,13 @@
#include <linux/wait.h>
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/irqdomain.h>
/*
* Ugly trick to be able to use headers that have been moved out
* from mach/ directory
*/
#include <mach/../../at91_aic.h>
#include "../wbgen-regs/rtu-regs.h"
#include "wr_rtu.h"
......@@ -64,6 +71,13 @@ static struct RTU_WB __iomem *regs;
#define wr_rtu_readl(r) __raw_readl(&regs->r);
#define wr_rtu_writel(val, r) __raw_writel(val, &regs->r);
/**
* IRQ domain to be used. This is static here but in general it should be
* a module parameter or somehow configurable. For the time being we keep
* it hard-coded here.
*/
static const char *irqdomain_name = "htvic-wr-swi.0";
static void wr_rtu_enable_irq(void)
{
wr_rtu_writel(RTU_EIC_IER_NEMPTY, EIC_IER);
......@@ -153,6 +167,15 @@ static struct miscdevice wr_rtu_misc = {
static int __init wr_rtu_init(void)
{
int err;
int irq;
struct irq_domain *irqdomain;
irqdomain = irq_find_host((struct device_node *)irqdomain_name);
if (!irqdomain) {
pr_err("pstat: The IRQ domain %s does not exist\n",
irqdomain_name);
return -EINVAL;
}
// register misc device
err = misc_register(&wr_rtu_misc);
......@@ -176,9 +199,8 @@ static int __init wr_rtu_init(void)
// register interrupt handler
wr_rtu_disable_irq();
err = request_irq(
WRVIC_BASE_IRQ + WR_RTU_IRQ,
wr_rtu_interrupt,
irq = irq_find_mapping(irqdomain, WR_RTU_IRQ);
err = request_irq(irq, wr_rtu_interrupt,
IRQF_SHARED,
"wr-rtu",
(void*)regs
......@@ -203,10 +225,20 @@ static int __init wr_rtu_init(void)
static void __exit wr_rtu_exit(void)
{
int irq;
struct irq_domain *irqdomain;
// disable RTU interrupts
wr_rtu_disable_irq();
// Unregister IRQ handler
free_irq(WRVIC_BASE_IRQ + WR_RTU_IRQ, (void*)regs);
irqdomain = irq_find_host((struct device_node *)irqdomain_name);
if (!irqdomain) {
pr_err("pstat: The IRQ domain %s does not exist\n",
irqdomain_name);
} else {
irq = irq_find_mapping(irqdomain, WR_RTU_IRQ);
free_irq(irq, (void*)regs);
}
// Unmap RTU memory
iounmap(regs);
// Unregister misc device driver
......
kernel/wr_vic/Makefile deleted 100644 → 0
View file @ 4744f847
obj-m := wr_vic.o
export ARCH ?= arm
export CROSS_COMPILE ?= $(CROSS_COMPILE_ARM)
all modules:
$(MAKE) CONFIG_DEBUG_SECTION_MISMATCH=y \
-C $(LINUX) SUBDIRS=$(shell /bin/pwd) modules
# We might "$(MAKE) -C $(LINUX)" but "make clean" with no LINUX defined
# is sometimes useful to have
clean:
rm -f *.mod.c *.o *.ko .*cmd Module.symvers modules.order
rm -rf .tmp_versions
kernel/wr_vic/README.vic deleted 100644 → 0
View file @ 4744f847
White Rabbit MCH Vectored Interrupt Controller driver
------
This driver adds support for the Interrupt Controller in the main FPGA
of White Rabbit MCH. The VIC multiplexes 32 source interrupts into
single interrupt CPU interrupt line (AT91SAM9263_ID_IRQ0).
The implementation has been redone as an irq_chip structure,
to integrate in the official kernel API. When porting to the next
kernel version it will be moved to the kernel patch-set; currently
is is a module we should load before the minic.
There are two patches for 2.6.35, though. One increases the
number of available interrupts, as the default in 2.6.35 doesn't
allow for external multiplexers to fit. The other exports two symbols
that are only available for stuff in the kernel proper. We'll remove that
patch when moving our wrvic in 2.6.36 proper.
kernel/wr_vic/wr_vic.c deleted 100644 → 0
View file @ 4744f847
/*
* VIC controller, as implemented in FPGA in the White Rabbit switch
*
* Copyright (c) 2009, 2010 CERN
* Author: Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
* Author: Alessandro Rubini <rubini@gnudd.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
//#include <linux/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#define DRV_NAME "wr_vic"
#define PFX DRV_NAME ": "
#define WRVIC_NR_IRQS 32 /* We have 32 possible interrupt sources */
/* The following stanza comes from <mach/irq.h>: */
/*
* IRQ interrupt symbols are the AT91xxx_ID_* symbols
* for IRQs handled directly through the AIC, or else the AT91_PIN_*
* symbols in gpio.h for ones handled indirectly as GPIOs.
* We make provision for 5 banks of GPIO.
#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
*/
/* Therefore, we must have a bigger NR_IRQS and can't work otherwise */
#if NR_IRQS < (NR_AIC_IRQS + (5 * 32) + WRVIC_NR_IRQS)
#error "Please fix the kernel to allow for WR-VIC interrupts"
#endif
#define WRVIC_BASE_IRQ (NR_AIC_IRQS + (5 * 32)) /* top of GPIO interrupts */
/*
* What follows is header-like material, but we need no header for
* external modules. Thus all defines are kept here to avoid confusion.
*/
#define FPGA_BASE_WRVIC 0x10050000
#define FPGA_SIZE_WRVIC 0x00001000
struct wrvic_regs {
u32 reg_ctl; /* [0x00]: WRVIC Control Register */
u32 reg_risr; /* [0x04]: Raw Interrupt Status Register */
u32 reg_ier; /* [0x08]: Interrupt Enable Register */
u32 reg_idr; /* [0x0c]: Interrupt Disable Register */
u32 reg_imr; /* [0x10]: Interrupt Mask Register */
u32 reg_var; /* [0x14]: Vector Address Register */
u32 reg_swtrig; /* [0x18]: Software-trigger of IRQ */
u32 reg_eoir; /* [0x1c]: End Of Irq Ack Register */
u32 unused1[((0x80-0x20)/4)];
u32 vector[WRVIC_NR_IRQS];
};
static struct wrvic_regs __iomem *wrvic_regs;
int enabled_irqs[WRVIC_NR_IRQS];
#define WRVIC_CTL_ENABLE (1<<0)
#define WRVIC_CTL_POL (1<<1)
#define WRVIC_SPURIOUS_IRQ 0x12345678 /* A diagnostic help */
#define wrvic_readl(r) __raw_readl(&wrvic_regs->r);
#define wrvic_writel(val, r) __raw_writel(val, &wrvic_regs->r);
static void wrvic_handler(unsigned int irq, struct irq_desc *desc);
/* We only have two methods: unmask (enable) and mask (disable) */
static void wrvic_irq_unmask(struct irq_data *d)
{
int irq = d->irq - WRVIC_BASE_IRQ;
wrvic_writel(irq, vector[irq]);
wrvic_writel(1 << irq, reg_ier);
enabled_irqs[irq] = 1;
irq_set_irq_type(AT91SAM9G45_ID_IRQ0, IRQF_TRIGGER_LOW); /* FIXME: needed? */
/* Enable. "CTL_POL" is 0 which means active low (falling) */
wrvic_writel(WRVIC_CTL_ENABLE, reg_ctl);
}
static void wrvic_irq_mask(struct irq_data *d)
{
int irq = d->irq;
int i;
irq -= WRVIC_BASE_IRQ;
wrvic_writel( 1 << irq, reg_idr);
wrvic_writel(WRVIC_SPURIOUS_IRQ, vector[irq]);
enabled_irqs[irq] = 0;
/* FIXME: find a better way to detect we have no more */
for(i=0;i<WRVIC_NR_IRQS;i++)
if(enabled_irqs[i])
return;
printk("wr-vic: No enabled interrupts left, disabling master IRQ.\n");
irq_set_chained_handler(AT91SAM9G45_ID_IRQ0, handle_bad_irq);
}
static struct irq_chip wrvic_irqchip = {
.name = "WR-VIC",
.irq_mask = wrvic_irq_mask,
.irq_unmask = wrvic_irq_unmask,
};
static void wrvic_handler(unsigned int irq, struct irq_desc *desc)
{
u32 pending = wrvic_readl(reg_var);
if (pending == WRVIC_SPURIOUS_IRQ) {
printk(KERN_ERR PFX "spurious interrupt\n");
wrvic_writel(0, reg_eoir); /* clear pending flag */
return;
}
generic_handle_irq(WRVIC_BASE_IRQ + pending);
wrvic_writel(0, reg_eoir); /* clear pending flag */
}
int __init wrvic_init(void)
{
int i;
wrvic_regs = ioremap(FPGA_BASE_WRVIC, FPGA_SIZE_WRVIC);
if (!wrvic_regs)
return -ENOMEM;
/* First, prime the WRVIC with "invalid" vectors and disable all irq */
for (i = 0; i < WRVIC_NR_IRQS; i++)
{
wrvic_writel(WRVIC_SPURIOUS_IRQ, vector[i]);
enabled_irqs[i] = 0;
}
wrvic_writel(~0, reg_idr);
for(i = WRVIC_BASE_IRQ; i <= WRVIC_BASE_IRQ + WRVIC_NR_IRQS; i++) {
irq_set_chip_and_handler(i, &wrvic_irqchip, handle_level_irq);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
}
irq_set_chained_handler(AT91SAM9G45_ID_IRQ0, wrvic_handler);
irq_set_irq_type(AT91SAM9G45_ID_IRQ0, IRQF_TRIGGER_LOW);
/* Enable. "CTL_POL" is 0 which means active low (falling) */
wrvic_writel(WRVIC_CTL_ENABLE, reg_ctl);
return 0;
}
module_init(wrvic_init);
/* no exit is expected */
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("White Rabbit Vectored Interrupt Controller");
kernel/wrs_devices/Kbuild 0 → 100644
View file @ d8f1dc9f
ccflags-y += -Werror
obj-m := wrs_devices.o
kernel/wrs_devices/Makefile 0 → 100644
View file @ d8f1dc9f
LINUX ?= /lib/modules/$(shell uname -r)/build
export ARCH ?= arm
export CROSS_COMPILE ?= $(CROSS_COMPILE_ARM)
all: modules
modules:
$(MAKE) -C $(LINUX) M=$(shell /bin/pwd)
clean:
$(MAKE) -C $(LINUX) M=$(shell /bin/pwd) clean
gtags:
gtags --statistics
.PHONY: all clean gtags
kernel/wrs_devices/wrs_devices.c 0 → 100644
View file @ d8f1dc9f
/**
* Copyright CERN (c) 2016
* Federico Vaga <federico.vaga@cern.ch>
* License GPL v2
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <mach/at91sam9g45.h>
/*
* Ugly trick to be able to use headers that have been moved out
* from mach/ directory
*/
#include <mach/../../at91_aic.h>
#define WR_IS_NODE 0
#define WR_IS_SWITCH 1
#include "../wr_nic/nic-hardware.h" /* Magic numbers: please fix them as needed */
#define FPGA_BASE_WRVIC 0x10050000
#define FPGA_SIZE_WRVIC 0x00001000
static struct resource wrs_vic_resources[] = {
[0] = {
.start = FPGA_BASE_WRVIC,
.end = FPGA_BASE_WRVIC + FPGA_SIZE_WRVIC - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_IRQ0,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_IRQ0,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
/* FIXME is it really HIGHLEVEL ? */
},
};
static struct platform_device wrs_vic_device = {
.name = "htvic-wr-swi",
.id = 0,
.resource = wrs_vic_resources,
.num_resources = ARRAY_SIZE(wrs_vic_resources),
};
#if 0
static struct resource wrs_nic_recources[] = {
/* Memory */
{
.name = "wrs-mem-nic",
.start = FPGA_BASE_NIC,
.end = FPGA_BASE_NIC + FPGA_SIZE_NIC - 1,
.flags = IORESOURCE_MEM,
}, {
.name = "wrs-mem-ep",
.start = FPGA_BASE_EP,
.end = FPGA_BASE_EP + FPGA_SIZE_EP - 1,
.flags = IORESOURCE_MEM,
}, {
.name = "wrs-mem-ts",
.start = FPGA_BASE_TS,
.end = FPGA_BASE_TS + FPGA_SIZE_TS - 1,
.flags = IORESOURCE_MEM,
}, {
.name = "wrs-mem-ppsg",
.start = FPGA_BASE_PPSG,
.end = FPGA_BASE_PPSG + FPGA_SIZE_PPSG - 1,
.flags = IORESOURCE_MEM,
},
/* IRQ from HTVIC */
{
.name = "wr-nic-irq",
.start = 0,
.end = 0,
.flags = IORESOURCE_IRQ,
}, {
.name = "wr-tstamp",
.start = 1,
.end = 1,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device wrs_nic_device = {
.name = "wrs-nic",
.id = 0,
.resource = wrs_nic_recources,
.num_resources = ARRAY_SIZE(wrs_nic_recources),
};
#endif
static int wrs_devices_init(void)
{
int err;
err = platform_device_register(&wrs_vic_device);
if (err)
return err;
#if 0 /* perhaps we enable it in the future */
err = platform_device_register(&wrs_nic_device);
if (err)
return err;
#endif
return 0;
}
static void wrs_devices_exit(void)
{
#if 0
platform_device_unregister(&wrs_nic_device);
#endif
platform_device_unregister(&wrs_vic_device);
}
module_init(wrs_devices_init);
module_exit(wrs_devices_exit);
MODULE_LICENSE("GPL");
patches/kernel/v2.6.39/0001-wrs3-changes-to-g45ek.patch deleted 100644 → 0
View file @ 4744f847
From 95648bc0194a8a284b87b5555314f53e166a46f9 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Wed, 14 Sep 2011 11:23:29 +0200
Subject: [PATCH] wrs3 changes to g45ek
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 36 +++++++++++++++++++++++++++++++
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 6c999db..d0e1e67 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -420,6 +420,42 @@ static void __init ek_board_init(void)
/* LEDs */
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));
+
+ { /* Configure the EBI1 pins for the wr switch */
+ int i;
+
+ /* PC16..31: periphA as EBI1_D16..31 */
+ for (i = AT91_PIN_PC16; i <= AT91_PIN_PC31; i++)
+ at91_set_A_periph(i, 0);
+ /* PC2 and PC3 too: EBI1_A19 EBI1_A20 */
+ at91_set_A_periph(AT91_PIN_PC2, 0);
+ at91_set_A_periph(AT91_PIN_PC3, 0);
+
+ /* FIXME: We should pull rst high for when it is programmed */
+
+ /* Then, write the EBI1 configuration (NCS0 == 0x1000.0000) */
+ at91_sys_write(AT91_SMC_SETUP(0),
+ AT91_SMC_NWESETUP_(4) |
+ AT91_SMC_NCS_WRSETUP_(2) |
+ AT91_SMC_NRDSETUP_(4) |
+ AT91_SMC_NCS_RDSETUP_(2));
+ at91_sys_write(AT91_SMC_PULSE(0),
+ AT91_SMC_NWEPULSE_(30) |
+ AT91_SMC_NCS_WRPULSE_(34) |
+ AT91_SMC_NRDPULSE_(30) |
+ AT91_SMC_NCS_RDPULSE_(34));
+ at91_sys_write(AT91_SMC_CYCLE(0),
+ AT91_SMC_NWECYCLE_(40) |
+ AT91_SMC_NRDCYCLE_(40));
+ at91_sys_write(AT91_SMC_MODE(0),
+ AT91_SMC_DBW_32 |
+ AT91_SMC_TDF_(0) |
+ AT91_SMC_READMODE |
+ AT91_SMC_WRITEMODE);
+
+
+ }
+
}
MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
--
1.7.0.4
patches/kernel/v2.6.39/0003-at91-NR_IRQS-increase-by-64-to-fit-custom-muxes.patch deleted 100644 → 0
View file @ 4744f847
From 282dc8c6f8082ce6ce249363a5a1cc80a047c01a Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 17 Jan 2012 17:16:20 +0100
Subject: [PATCH 3/3] at91 NR_IRQS: increase by 64 to fit custom muxes
---
arch/arm/mach-at91/include/mach/irqs.h | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h
index 36bd55f..04a080c 100644
--- a/arch/arm/mach-at91/include/mach/irqs.h
+++ b/arch/arm/mach-at91/include/mach/irqs.h
@@ -40,7 +40,11 @@
* symbols in gpio.h for ones handled indirectly as GPIOs.
* We make provision for 5 banks of GPIO.
*/
-#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
+#if 0
+ #define NR_IRQS (NR_AIC_IRQS + (5 * 32))
+#else /* Actually, we want to allow a pair of board-specific multiplexers */
+ #define NR_IRQS (NR_AIC_IRQS + (5 * 32) + (2 * 32))
+#endif
/* FIQ is AIC source 0. */
#define FIQ_START AT91_ID_FIQ
--
1.7.7.2
patches/kernel/v2.6.39/0004-irq-export-symbols-for-external-irq-controller.patch deleted 100644 → 0
View file @ 4744f847
From 5a7166ccf11ae171cfd305d1b771035c4ccf2c20 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 17 Jan 2012 17:48:50 +0100
Subject: [PATCH 4/4] irq: export symbols for external irq controller
---
arch/arm/kernel/irq.c | 1 +
kernel/irq/chip.c | 1 +
kernel/irq/handle.c | 2 ++
kernel/irq/irqdesc.c | 2 ++
4 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 83bbad0..4a7f8aa 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -115,6 +115,7 @@ void set_irq_flags(unsigned int irq, unsigned int iflags)
/* Order is clear bits in "clr" then set bits in "set" */
irq_modify_status(irq, clr, set & ~clr);
}
+EXPORT_SYMBOL_GPL(set_irq_flags); /* for external irq controllers */
void __init init_IRQ(void)
{
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index 4af1e2b..ced43d9 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -587,6 +587,7 @@ irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
irq_set_chip(irq, chip);
__irq_set_handler(irq, handle, 0, name);
}
+EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
{
diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c
index 90cb55f..4d0421e 100644
--- a/kernel/irq/handle.c
+++ b/kernel/irq/handle.c
@@ -13,6 +13,7 @@
#include <linux/irq.h>
#include <linux/random.h>
#include <linux/sched.h>
+#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
@@ -33,6 +34,7 @@ void handle_bad_irq(unsigned int irq, struct irq_desc *desc)
kstat_incr_irqs_this_cpu(irq, desc);
ack_bad_irq(irq);
}
+EXPORT_SYMBOL_GPL(handle_bad_irq);
/*
* Special, empty irq handler:
diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c
index 2c039c9..d902ebf 100644
--- a/kernel/irq/irqdesc.c
+++ b/kernel/irq/irqdesc.c
@@ -110,6 +110,7 @@ struct irq_desc *irq_to_desc(unsigned int irq)
{
return radix_tree_lookup(&irq_desc_tree, irq);
}
+EXPORT_SYMBOL_GPL(irq_to_desc);
static void delete_irq_desc(unsigned int irq)
{
@@ -272,6 +273,7 @@ struct irq_desc *irq_to_desc(unsigned int irq)
{
return (irq < NR_IRQS) ? irq_desc + irq : NULL;
}
+EXPORT_SYMBOL_GPL(irq_to_desc);
static void free_desc(unsigned int irq)
{
--
1.7.7.2
patches/kernel/v2.6.39/0006-arm-fiq-allow-modules-to-exploit-the-fiq-mechanism.patch deleted 100644 → 0
View file @ 4744f847
From 4815f7ca121792b349d780fe099d1352329a1177 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@unipv.it>
Date: Wed, 27 May 2009 00:44:01 +0200
Subject: [PATCH 6/7] arm fiq: allow modules to exploit the fiq mechanism
This patch exports "fiq_userptr" so that a module can hook to the fiq
handler. This mechanism is used by my "fiq-engine" external package
found in gnudd.com.
To prevent data aborts in vmalloc areas during fiq-mode, vmalloc.c is
modified to update the virtual memory of all processes in map_vm_area().
Without this patch such updates happen on demand, but page faults can't
be managed in fiq mode. Unfortunately, it's #fidef CONFIG_ARM in vmalloc.c
---
arch/arm/kernel/armksyms.c | 6 ++++++
arch/arm/kernel/entry-armv.S | 24 +++++++++++++++++++++++-
mm/vmalloc.c | 37 +++++++++++++++++++++++++++++++++++++
3 files changed, 66 insertions(+), 1 deletions(-)
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index acca35a..667e836 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -49,6 +49,12 @@ extern void __aeabi_ulcmp(void);
extern void fpundefinstr(void);
+/*
+ * for fiq support (code in entry-armv.S -- ARub)
+ */
+extern void (*fiq_userptr)(void);
+EXPORT_SYMBOL(fiq_userptr);
+
EXPORT_SYMBOL(__backtrace);
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index e8d8856..9a7b4c8 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -1178,9 +1178,31 @@ __stubs_start:
* other mode than FIQ... Ok you can switch to another mode, but you can't
* get out of that mode without clobbering one register.
*/
+/* ARub: try to use it instead (we won't leave FIQ mode anyway) */
vector_fiq:
- disable_fiq
+ ldr r9, 1f
+ ldr r9, [r9]
+ movs r9, r9
+ beq fiq_ret
+ mov r8, lr
+ mov lr, pc
+ mov pc, r9 /* jump to userptr */
+ mov lr, r8
+fiq_ret:
subs pc, lr, #4
+fiq_savemm:
+ .long 0
+
+
+
+1: .long fiq_userptr
+
+.section .text /* can't live here... */
+.globl fiq_userptr
+fiq_userptr:
+ .long 0 /* This must save r0..r8 inclusive */
+.previous
+
/*=============================================================================
* Address exception handler
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index 5d60302..536c2d6 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -1258,6 +1258,43 @@ int map_vm_area(struct vm_struct *area, pgprot_t prot, struct page ***pages)
err = 0;
}
+/*
+ * In order to support installation of a non-trivial FIQ handler, on ARM
+ * we need to replicate kernel virtual memory to all processes (so it
+ * can be accessed from fiq state irrespective of what current process is).
+ * The code comes from do_translation_fault, and is arm-specific.
+ */
+#ifdef CONFIG_ARM
+ if (!err) {
+ struct task_struct *p;
+ for_each_process(p) {
+ task_lock(p);
+ if (!p->mm)
+ goto next_process;
+ if (p->mm == &init_mm)
+ goto next_process;
+ for (addr = (unsigned long)area->addr;
+ addr < end; addr += PAGE_SIZE) {
+ /* "+= PMD_SIZE" may be faster... */
+ unsigned int index;
+ pgd_t *pgd, *pgd_k;
+ pmd_t *pmd, *pmd_k;
+ /* from do_translation_fault() */
+ index = pgd_index(addr);
+ pgd = p->mm->pgd + index;
+ pgd_k = init_mm.pgd + index;
+ if (!pgd_present(*pgd))
+ set_pgd(pgd, *pgd_k);
+ pmd_k = pmd_offset(pgd_k, addr);
+ pmd = pmd_offset(pgd, addr);
+ copy_pmd(pmd, pmd_k);
+ }
+ next_process:
+ task_unlock(p);
+ }
+ }
+#endif
+
return err;
}
EXPORT_SYMBOL_GPL(map_vm_area);
--
1.7.7.2
patches/kernel/v2.6.39/0007-mtd-nand-sam9g45-can-hwecc-like-9263.patch deleted 100644 → 0
View file @ 4744f847
From 424c448cb23511056074cda16f2e330a1f395e60 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Mon, 6 Aug 2012 12:00:27 +0200
Subject: [PATCH 7/7] mtd/nand: sam9g45 can hwecc like 9263
---
drivers/mtd/nand/Kconfig | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index edec457..06aaaa6 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -357,7 +357,7 @@ choice
config MTD_NAND_ATMEL_ECC_HW
bool "Hardware ECC"
- depends on ARCH_AT91SAM9263 || ARCH_AT91SAM9260 || AVR32
+ depends on ARCH_AT91SAM9263 || ARCH_AT91SAM9260 || AVR32 || ARCH_AT91SAM9G45
help
Use hardware ECC instead of software ECC when the chip
supports it.
--
1.7.7.2
patches/kernel/v2.6.39/0008-wrs3-use-correct-nand-partitioning.patch deleted 100644 → 0
View file @ 4744f847
From 111a2f978f9e3271ed9e0a62e391e9d81d393d62 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 7 Aug 2012 12:42:36 +0200
Subject: [PATCH 8/8] wrs3: use correct nand partitioning
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 21 ++++++++++++++++-----
1 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 8df2e47..d40aa3c 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -131,13 +131,24 @@ static struct at91_eth_data __initdata ek_macb_data = {
*/
static struct mtd_partition __initdata ek_nand_partition[] = {
{
- .name = "Partition 1",
- .offset = 0,
- .size = SZ_64M,
+ .name = "Kernel",
+ .offset = 1 << 20,
+ .size = SZ_8M,
},
{
- .name = "Partition 2",
- .offset = MTDPART_OFS_NXTBLK,
+ .name = "Filesystem", /* We _want_ this to be mtd1 */
+ .offset = 64 << 20,
+ .size = SZ_128M,
+ },
+ {
+ .name = "Barebox Environment",
+ .offset = 256 << 10,
+ .size = SZ_256K,
+ },
+ /* This is actuallywas MTDPART_OFS_APPEND over the filesystem */
+ {
+ .name = "Available",
+ .offset = (128+64) << 20,
.size = MTDPART_SIZ_FULL,
},
};
--
1.7.7.2
patches/kernel/v2.6.39/0011-sam9m10g45ek-for-wrs-final-partitions-for-V4.1.patch deleted 100644 → 0
View file @ 4744f847
From 382270adecef6b4950ecaa459c50ec725c2985b3 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Sat, 21 Jun 2014 08:48:04 +0200
Subject: [PATCH 11/12] sam9m10g45ek (for wrs): final partitions for V4.1
This changes the partitions in an incompatible way: then NAND
now has one partition for barebox environment (1M: 5 blocks to
protect against bad blocks) and one big partition fro UBI volumes.
Real stuff is then split in UBI volumes. Please see documentation
(in a later commit) for details.
And hwinfo is not read-only, as we need to change it sometimes.
Though rarely.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 18 +++++++-----------
1 files changed, 7 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index afc6418..6ad8462 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -26,6 +26,7 @@
#include <linux/clk.h>
#include <linux/atmel-mci.h>
#include <linux/spi/flash.h>
+#include <linux/mtd/mtd.h>
#include <mach/hardware.h>
#include <video/atmel_lcdc.h>
@@ -106,6 +107,11 @@ static struct mtd_partition wrs_df_parts[] = {
.size = 0x8400,
},
{
+ .name = "hwinfo",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x840,
+ },
+ {
.name = "Available-dataflash",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
@@ -167,18 +173,8 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
.size = SZ_1M,
},
{
- .name = "Kernel",
+ .name = "UBIfied-NAND",
.offset = 1 << 20,
- .size = SZ_8M,
- },
- {
- .name = "Filesystem", /* We _want_ this to be mtd1 */
- .offset = 64 << 20,
- .size = SZ_128M,
- },
- {
- .name = "Available-nand",
- .offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
--
1.7.7.2
patches/kernel/v2.6.39/0015-kernel-remove-deprecated-use-of-defined-in-kernel-ti.patch deleted 100644 → 0
View file @ 4744f847
From f5eb5f7891907414caccd1d82c7171bdfafe7900 Mon Sep 17 00:00:00 2001
From: Adam Wujek <adam.wujek@cern.ch>
Date: Wed, 18 May 2016 09:22:55 +0200
Subject: [PATCH] kernel: remove deprecated use of defined in
kernel/timeconst.pl
Fix the warning (for perl < 5.21.x) whihch becomes an error
(for perl >= 5.21.x):
defined(@array) is deprecated at kernel/timeconst.pl line 373.
(Maybe you should just omit the defined()?)
Signed-off-by: Adam Wujek <adam.wujek@cern.ch>
---
kernel/timeconst.pl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/timeconst.pl b/kernel/timeconst.pl
index eb51d76..0461239 100644
--- a/kernel/timeconst.pl
+++ b/kernel/timeconst.pl
@@ -370,7 +370,7 @@ if ($hz eq '--can') {
}
@val = @{$canned_values{$hz}};
- if (!defined(@val)) {
+ if (!@val) {
@val = compute_values($hz);
}
output($hz, @val);
--
1.9.1
patches/kernel/v2.6.39/0002-initramfs-stop-after-one-cpio-archive.patch → patches/kernel/v3.16.37/0001-initramfs-stop-after-one-cpio-archive.patch
View file @ d8f1dc9f
From 4e4080233a2843d405a8c0574209a8245baa7de5 Mon Sep 17 00:00:00 2001
From 18ec233fbabab2b296ad0ed2a41ceda0cafb5b59 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Sat, 20 Nov 2010 13:15:48 +0100
Subject: [PATCH] initramfs: stop after one cpio archive
Subject: [PATCH 1/9] initramfs: stop after one cpio archive
Update to 3.16.37
=================
This patch has been ported from 2.6.39.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
---
init/initramfs.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
init/initramfs.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/init/initramfs.c b/init/initramfs.c
index 4b9c202..9b446ff 100644
index a8497fa..619187f 100644
--- a/init/initramfs.c
+++ b/init/initramfs.c
@@ -461,6 +461,7 @@ static char * __init unpack_to_rootfs(char *buf, unsigned len)
@@ -472,6 +472,7 @@ static char * __init unpack_to_rootfs(char *buf, unsigned len)
error("junk in compressed archive");
if (state != Reset)
error("junk in compressed archive");
......@@ -20,5 +26,5 @@ index 4b9c202..9b446ff 100644
buf += my_inptr;
len -= my_inptr;
--
1.5.6.5
2.7.4
patches/kernel/v2.6.39/0013-mtd_dataflash-Read-EDI-JEDEC-to-support-AT45DB641E.patch → patches/kernel/v3.16.37/0002-mtd_dataflash-Read-EDI-bytes-in-JEDEC-to-support-AT4.patch
View file @ d8f1dc9f
From a19927112db5173ce8f93728672042070f38ebbb Mon Sep 17 00:00:00 2001
From f544884365b48caa5b35e369a1386bfbb237517a Mon Sep 17 00:00:00 2001
From: Benoit Rat <benoit@sevensols.com>
Date: Tue, 9 Sep 2014 19:08:11 +0200
Subject: [PATCH] mtd_dataflash: Read EDI bytes in JEDEC to support AT45DB641E
Date: Fri, 14 Oct 2016 10:16:25 +0200
Subject: [PATCH 2/8] mtd_dataflash: Read EDI bytes in JEDEC to support
AT45DB641E
Standard JEDEC ID is only 24bits to identify a DF chip.
......@@ -12,15 +13,22 @@ difference between AT45DB641E and AT45DB642D is made by byte 4).
We have had two new fields in the struct flash_info:
* edi_nbytes: number of optional bytes to read (1 or 2)
* edi_jedec: EDI value for a given chip
Update to 3.16.37
=================
This patch has been ported from 2.6.39.
Signed-off-by: Benoit Rat <benoit@sevensols.com>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
---
drivers/mtd/devices/mtd_dataflash.c | 101 ++++++++++++++++++++++--------------
1 file changed, 62 insertions(+), 39 deletions(-)
drivers/mtd/devices/mtd_dataflash.c | 100 +++++++++++++++++++++++-------------
1 file changed, 63 insertions(+), 37 deletions(-)
diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c
index c5015cc..42588e3 100644
index dd22ce2..3cb38d2 100644
--- a/drivers/mtd/devices/mtd_dataflash.c
+++ b/drivers/mtd/devices/mtd_dataflash.c
@@ -735,6 +735,12 @@ struct flash_info {
@@ -698,6 +698,13 @@ struct flash_info {
uint16_t pageoffset;
uint16_t flags;
......@@ -28,19 +36,19 @@ index c5015cc..42588e3 100644
+ /* JEDEC has an optional Extended Device Info (EDI) on bytes
+ * 4 and/or 5 that need to be read to differentiate some DF chips
+ */
+ uint8_t edi_nbytes;
+ uint16_t edi_jedec;
+ uint8_t edi_nbytes;
+ uint16_t edi_jedec;
+
#define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
#define IS_POW2PS 0x0001 /* uses 2^N byte pages */
};
@@ -750,36 +756,40 @@ static struct flash_info __devinitdata dataflash_data [] = {
@@ -713,36 +720,40 @@ static struct flash_info dataflash_data[] = {
* These newer chips also support 128-byte security registers (with
* 64 bytes one-time-programmable) and software write-protection.
*/
- { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
- { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
+ { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS, 0, 0x0},
+ { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS, 0, 0x0},
{ "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
- { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
- { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
......@@ -72,14 +80,14 @@ index c5015cc..42588e3 100644
- { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
- { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
+ { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS,1, 0x0},
+ { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS,1, 0x0},
+
+ { "AT45DB641E", 0x1f2800, 32768, 264, 9, SUP_POW2PS,1, 0x1},
+ { "at45db641e", 0x1f2800, 32768, 256, 8, SUP_POW2PS | IS_POW2PS,1, 0x1},
+ { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS, 1, 0x0},
+ { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS, 1, 0x0},
+
+ { "AT45DB641E", 0x1f2800, 32768, 264, 9, SUP_POW2PS, 1, 0x1},
+ { "at45db641e", 0x1f2800, 32768, 256, 8, SUP_POW2PS | IS_POW2PS, 1, 0x1},
};
static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
static struct flash_info *jedec_probe(struct spi_device *spi)
{
int tmp;
uint8_t code = OP_READ_ID;
......@@ -90,30 +98,30 @@ index c5015cc..42588e3 100644
struct flash_info *info;
int status;
@@ -791,7 +801,7 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
@@ -754,7 +765,7 @@ static struct flash_info *jedec_probe(struct spi_device *spi)
* That's not an error; only rev C and newer chips handle it, and
* only Atmel sells these chips.
*/
- tmp = spi_write_then_read(spi, &code, 1, id, 3);
+ tmp = spi_write_then_read(spi, &code, 1, id, 5);
if (tmp < 0) {
DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n",
pr_debug("%s: error %d reading JEDEC ID\n",
dev_name(&spi->dev), tmp);
@@ -805,33 +815,40 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
jedec |= id[1];
@@ -769,31 +780,39 @@ static struct flash_info *jedec_probe(struct spi_device *spi)
jedec = jedec << 8;
jedec |= id[2];
+
+ //EDI bytes to support newest chips
+ /* EDI bytes to support newest chips */
+ jedec_edi = id[3];
+ jedec_edi = jedec_edi << 8;
+ jedec_edi |= id[4];
+
+
for (tmp = 0, info = dataflash_data;
tmp < ARRAY_SIZE(dataflash_data);
tmp++, info++) {
if (info->jedec_id == jedec) {
- DEBUG(MTD_DEBUG_LEVEL1, "%s: OTP, sector protect%s\n",
- pr_debug("%s: OTP, sector protect%s\n",
- dev_name(&spi->dev),
- (info->flags & SUP_POW2PS)
- ? ", binary pagesize" : ""
......@@ -121,8 +129,7 @@ index c5015cc..42588e3 100644
- if (info->flags & SUP_POW2PS) {
- status = dataflash_status(spi);
- if (status < 0) {
- DEBUG(MTD_DEBUG_LEVEL1,
- "%s: status error %d\n",
- pr_debug("%s: status error %d\n",
- dev_name(&spi->dev), status);
- return ERR_PTR(status);
- }
......@@ -135,18 +142,17 @@ index c5015cc..42588e3 100644
- }
- } else
- return info;
+ if (info->edi_jedec == (jedec_edi >> (16-8*info->edi_nbytes))) {
+ DEBUG(MTD_DEBUG_LEVEL1, "%s: OTP, sector protect%s\n",
+ dev_name(&spi->dev),
+ (info->flags & SUP_POW2PS)
+ ? ", binary pagesize" : ""
+ if (info->edi_jedec == (jedec_edi >> (16 - 8 * info->edi_nbytes))) {
+ pr_debug("%s: OTP, sector protect%s\n",
+ dev_name(&spi->dev),
+ (info->flags & SUP_POW2PS)
+ ? ", binary pagesize" : ""
+ );
+ if (info->flags & SUP_POW2PS) {
+ status = dataflash_status(spi);
+ if (status < 0) {
+ DEBUG(MTD_DEBUG_LEVEL1,
+ "%s: status error %d\n",
+ dev_name(&spi->dev), status);
+ pr_debug("%s: status error %d\n",
+ dev_name(&spi->dev), status);
+ return ERR_PTR(status);
+ }
+ if (status & 0x1) {
......@@ -162,26 +168,27 @@ index c5015cc..42588e3 100644
}
}
@@ -857,6 +874,7 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
@@ -819,6 +838,7 @@ static struct flash_info *jedec_probe(struct spi_device *spi)
* AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
* AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
* AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
+ * AT45DB0641E 64Mbit (8M) xx111xxx (0x3c) 32768 264 9
*/
static int __devinit dataflash_probe(struct spi_device *spi)
static int dataflash_probe(struct spi_device *spi)
{
@@ -871,6 +889,11 @@ static int __devinit dataflash_probe(struct spi_device *spi)
@@ -833,6 +853,12 @@ static int dataflash_probe(struct spi_device *spi)
* write procedures.
*/
info = jedec_probe(spi);
+
+
+ printk("MTD: %s 0x%08x %d %d %d %x\n",
+ info->name,info->jedec_id,
+ info->nr_pages,info->pagesize,info->pageoffset,info->flags);
+ info->name,info->jedec_id,
+ info->nr_pages,info->pagesize,info->pageoffset,info->flags);
+
+
if (IS_ERR(info))
return PTR_ERR(info);
if (info != NULL)
--
1.9.1
2.7.4
patches/kernel/v2.6.39/0005-Change-Vbus-pin.patch → patches/kernel/v3.16.37/0003-wr-switch-sam9m10g45ek-change-USB-vbus_pin-from-PB19.patch
View file @ d8f1dc9f
From d77686b1021c98a971ff3aadb8269540bdb46dd2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tomasz=20W=C5=82ostowski?= <tomasz.wlostowski@cern.ch>
From 6e431fcaed49be557b0721e6f9f4f22151a74838 Mon Sep 17 00:00:00 2001
From: Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
Date: Thu, 31 May 2012 13:26:20 +0200
Subject: [PATCH 5/8] Change Vbus pin
Subject: [PATCH 3/8] wr-switch (sam9m10g45ek): change USB vbus_pin from PB19
to PB8
We are builing our environment on top of the sam9m10g45
evaluation-kit board. In the EK design the pin PB19 is used
but on the switch we use PB8.
Signed-off-by: Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-at91/board-sam9m10g45ek.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index d0e1e67..8df2e47 100644
index 74ae268..824ae43 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -81,7 +81,7 @@ static struct at91_usbh_data __initdata ek_usbh_hs_data = {
@@ -74,7 +74,7 @@ static struct at91_usbh_data __initdata ek_usbh_hs_data = {
* USB HS Device port
*/
static struct usba_platform_data __initdata ek_usba_udc_data = {
......@@ -21,5 +28,5 @@ index d0e1e67..8df2e47 100644
--
1.7.7.2
2.7.4
patches/kernel/v3.16.37/0004-wr-switch-sam9m10g45ek-enable-FPGA-access-from-EBI1-.patch 0 → 100644
View file @ d8f1dc9f
From eeb910ba9c084ca9dbe7e87f986c2d091538a693 Mon Sep 17 00:00:00 2001
From: Federico Vaga <federico.vaga@cern.ch>
Date: Thu, 27 Oct 2016 14:13:42 +0200
Subject: [PATCH 4/8] wr-switch (sam9m10g45ek): enable FPGA access from EBI1
(SMC)
Configure the EBI1 to in order to be used to access the FPGA
address space.
The EBI1 is, by design, controlled by the Static Memory
Controller (SMC) component.
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 50 +++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 1ea6132..74ae268 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -448,6 +448,53 @@ static struct platform_device *devices[] __initdata = {
#endif
};
+static struct sam9_smc_config __initdata wrs_fpga_smc_config = {
+ .ncs_read_setup = 2,
+ .nrd_setup = 4,
+ .ncs_write_setup = 2,
+ .nwe_setup = 4,
+
+ .ncs_read_pulse = 34,
+ .nrd_pulse = 30,
+ .ncs_write_pulse = 34,
+ .nwe_pulse = 30,
+
+ .read_cycle = 40,
+ .write_cycle = 40,
+
+ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_DBW_32,
+ .tdf_cycles = 0,
+};
+
+/**
+ * Configure the EBI1 pins for the wr switch FPGA
+ *
+ * This enable the External Bus Interface 1 (EBI1) and configure
+ * the Static Memory Controller (SMC) in order to allow the user
+ * to access the FPGA address space at the offset 0x1000000 by
+ * using chip-select 0 [NCS0].
+ *
+ * NCS0 is always and SMC controller, it cannot be configured in
+ * any other ways (pag 162 SAM9G45 datasheet)
+ */
+static void __init wrs_fpga_init(void)
+{
+ int i;
+
+ /* PC16..31: periphA as EBI1_D16..31 */
+ for (i = AT91_PIN_PC16; i <= AT91_PIN_PC31; i++)
+ at91_set_A_periph(i, 0);
+ /* PC2 and PC3 too: EBI1_A19 EBI1_A20 */
+ at91_set_A_periph(AT91_PIN_PC2, 0);
+ at91_set_A_periph(AT91_PIN_PC3, 0);
+
+ /* FIXME: We should pull rst high for when it is programmed */
+
+ /* Then, write the EBI1 configuration (NCS0 == 0x1000.0000) */
+ /*TODO check if the ID 0 is fine */
+ sam9_smc_configure(0, 0, &wrs_fpga_smc_config);
+}
+
static void __init ek_board_init(void)
{
/* Serial */
@@ -487,6 +534,9 @@ static void __init ek_board_init(void)
/* LEDs */
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));
+
+ wrs_fpga_init();
+
/* Other platform devices */
platform_add_devices(devices, ARRAY_SIZE(devices));
}
--
2.7.4
patches/kernel/v2.6.39/0010-sam9m10g45ek-for-wrs-new-partitioning.patch → patches/kernel/v3.16.37/0005-wr-switch-sam9m10g45ek-store-device-partitioning.patch
View file @ d8f1dc9f
From 76e58431485ad6b9d78eb0eec449c723dec1ecff Mon Sep 17 00:00:00 2001
From 068d6e63814ec292b1e886a2570bb90390c7dc64 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Thu, 19 Jun 2014 11:42:41 +0200
Subject: [PATCH 10/10] sam9m10g45ek (for wrs): new partitioning
Date: Tue, 7 Aug 2012 12:42:36 +0200
Subject: [PATCH 5/8] wr-switch (sam9m10g45ek): store device partitioning
This moves environment to the first meg of nand so we can later ubify
the rest of the nand memory. Such placement if compatible with
current partitioning, which is unchanged.
Also, it prepare partitions in the dataflash, to reflect actual
It prepare partitions in the dataflash to reflect actual
placement of the stuff and ease replacing barebox or at91boot from a
running system (useful for me and Benoit for release work, nobody else
is expected to change dataflash).
running system (useful for release work, nobody else is expected to
change dataflash).
The NAND has one partition for barebox environment (1M: 5 blocks to
protect against bad blocks) and one big partition fro UBI volumes.
Real stuff is then split in UBI volumes. Please see documentation
(in a later commit) for details.
And hwinfo is not read-only, as we need to change it sometimes.
Though rarely.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 46 +++++++++++++++++++++++++-----
1 files changed, 38 insertions(+), 8 deletions(-)
arch/arm/mach-at91/board-sam9m10g45ek.c | 47 +++++++++++++++++++++++++++++----
1 file changed, 42 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index d40aa3c..afc6418 100644
index 824ae43..ebd8ebd 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -25,6 +25,7 @@
@@ -25,6 +25,8 @@
#include <linux/input.h>
#include <linux/leds.h>
#include <linux/clk.h>
#include <linux/atmel-mci.h>
+#include <linux/spi/flash.h>
+#include <linux/mtd/mtd.h>
#include <linux/delay.h>
#include <mach/hardware.h>
#include <video/atmel_lcdc.h>
@@ -88,12 +89,42 @@ static struct usba_platform_data __initdata ek_usba_udc_data = {
#include <linux/platform_data/at91_adc.h>
@@ -81,12 +83,47 @@ static struct usba_platform_data __initdata ek_usba_udc_data = {
/*
* SPI devices.
*/
+static struct mtd_partition wrs_df_parts[] = {
+ {
+ .name = "at91boot",
+ .offset = 0,
+ .size = 0x8400,
+ .name = "at91boot",
+ .offset = 0,
+ .size = 0x8400,
+ },
+ {
+ .name = "Barebox",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x84000,
+ .name = "Barebox",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x84000,
+ },
+ {
+ .name = "Barebox-Environment",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x8400,
+ .name = "Barebox-Environment",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x8400,
+ },
+ {
+ .name = "Available-dataflash",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ .name = "hwinfo",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x840,
+ },
+ {
+ .name = "Available-dataflash",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
......@@ -68,39 +79,29 @@ index d40aa3c..afc6418 100644
.chip_select = 0,
.max_speed_hz = 15 * 1000 * 1000,
.bus_num = 0,
+ .platform_data = &wrs_df_pdata,
+ .platform_data = &wrs_df_pdata,
},
};
@@ -131,6 +162,11 @@ static struct at91_eth_data __initdata ek_macb_data = {
@@ -125,13 +162,13 @@ static struct macb_platform_data __initdata ek_macb_data = {
*/
static struct mtd_partition __initdata ek_nand_partition[] = {
{
+ .name = "Barebox-environment-backup",
+ .offset = 0,
+ .size = SZ_1M,
+ },
+ {
.name = "Kernel",
.offset = 1 << 20,
.size = SZ_8M,
@@ -141,14 +177,8 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
.size = SZ_128M,
- .name = "Partition 1",
- .offset = 0,
- .size = SZ_64M,
+ .name = "Barebox-environment-backup",
+ .offset = 0,
+ .size = SZ_1M,
},
{
- .name = "Barebox Environment",
- .offset = 256 << 10,
- .size = SZ_256K,
- },
- /* This is actuallywas MTDPART_OFS_APPEND over the filesystem */
- {
- .name = "Available",
- .offset = (128+64) << 20,
+ .name = "Available-nand",
+ .offset = MTDPART_OFS_APPEND,
- .name = "Partition 2",
- .offset = MTDPART_OFS_NXTBLK,
+ .name = "UBIfied-NAND",
+ .offset = 1 << 20,
.size = MTDPART_SIZ_FULL,
},
};
--
1.7.7.2
2.7.4
patches/kernel/v2.6.39/0012-sam9m10g45ek-for-wrs-more-relaxed-nand-timings.patch → patches/kernel/v3.16.37/0006-wr-switch-sam9m10g45ek-more-relaxed-nand-timings.patch
View file @ d8f1dc9f
From fe419a23b22d588864496bd38b42c96617a6fe6c Mon Sep 17 00:00:00 2001
From bfb2592942a4e490cf8b6530dfbf16ece33d5767 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Mon, 28 Jul 2014 15:20:59 +0200
Subject: [PATCH 12/12] sam9m10g45ek (for wrs): more relaxed nand timings
Subject: [PATCH 6/8] wr-switch (sam9m10g45ek): more relaxed nand timings
Update to 3.16.37
=================
This patch has been ported from 2.6.39.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 14 +++++++-------
1 files changed, 7 insertions(+), 7 deletions(-)
arch/arm/mach-at91/board-sam9m10g45ek.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 2eb70d5..a6e5c67 100644
index ebd8ebd..5686a87 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -194,21 +194,21 @@ static struct atmel_nand_data __initdata ek_nand_data = {
@@ -187,21 +187,21 @@ static struct atmel_nand_data __initdata ek_nand_data = {
};
static struct sam9_smc_config __initdata ek_nand_smc_config = {
......@@ -42,5 +47,5 @@ index 2eb70d5..a6e5c67 100644
static void __init ek_add_device_nand(void)
--
1.7.7.2
2.7.4
patches/kernel/v2.6.39/0014-sam9m10g45ek-for-wrs-provide-bootcount-using-scratch.patch → patches/kernel/v3.16.37/0007-wr-switch-sam9m10g45ek-provide-bootcount-using-scrat.patch
View file @ d8f1dc9f
From dd4abd9483cdb6bc31cba97763028770cabbfed0 Mon Sep 17 00:00:00 2001
From 71546ce5ad13e8c2f7de155cc8a17dada9028839 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Fri, 28 Nov 2014 14:18:27 +0100
Subject: [PATCH 14/14] sam9m10g45ek (for wrs): provide bootcount using
scratch registers
Subject: [PATCH 7/8] wr-switch (sam9m10g45ek): provide bootcount using scratch
registers
Update to 3.16.37
=================
This patch has been ported from 2.6.39.
The functions at91_sys_read/write() have been removed
by the patch 8c428b8d33. Use __raw_readl/writel() and reproduce
the original behavior
The patch b3af8b49be changes the address to the GPBR. To solve this
I created a GPBR resource and mapped it
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
---
arch/arm/kernel/process.c | 13 ++++
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/wrs-bootcount.c | 109 ++++++++++++++++++++++++++++++++++++
3 files changed, 123 insertions(+), 0 deletions(-)
arch/arm/kernel/process.c | 15 +++++
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/wrs-bootcount.c | 122 +++++++++++++++++++++++++++++++++++++
3 files changed, 138 insertions(+)
create mode 100644 arch/arm/mach-at91/wrs-bootcount.c
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 5e1e541..720d1e1 100644
index 3f688b7..c8cff71 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -93,6 +93,19 @@ __setup("hlt", hlt_setup);
@@ -41,6 +41,7 @@
#include <asm/system_misc.h>
#include <asm/mach/time.h>
#include <asm/tls.h>
+#include <mach/hardware.h>
#include "reboot.h"
#ifdef CONFIG_CC_STACKPROTECTOR
@@ -117,6 +118,20 @@ void _soft_restart(unsigned long addr, bool disable_l2)
void arm_machine_restart(char mode, const char *cmd)
static void null_restart(enum reboot_mode reboot_mode, const char *cmd)
{
+ uint32_t gpbr_val;
+ char *gpbr_str = (void *)&gpbr_val;
+ unsigned short *gpbr_short = (void *)&gpbr_val;
+ void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
+ unsigned long gpbr = AT91SAM9G45_BASE_GPBR - AT91_BASE_SYS;
+
+ /* WRS: Change the static registers. See wrs-bootcount.c for details */
+ gpbr_val = at91_sys_read(AT91_GPBR);
+ gpbr_val = __raw_readl(addr + gpbr);
+ gpbr_str[3] = 'R'; /* reboot requested by user */
+ at91_sys_write(AT91_GPBR, gpbr_val);
+ __raw_writel(gpbr_val, addr + gpbr);
+
+ gpbr_val = at91_sys_read(AT91_GPBR + 4);
+ gpbr_val = __raw_readl(addr + gpbr + 4);
+ gpbr_short[1]++; /* count the user-requeted reboots */
+ at91_sys_write(AT91_GPBR + 4, gpbr_val);
+
/* Disable interrupts first */
local_irq_disable();
local_fiq_disable();
+ __raw_writel(gpbr_val, addr + gpbr + 4);
}
void soft_restart(unsigned long addr)
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index a83835e..f1db0b2 100644
index 78e9cec..7d385bc 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -74,6 +74,7 @@ obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
@@ -80,6 +80,7 @@ obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
# AT91SAM9G45 board-specific support
obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
+obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += wrs-bootcount.o
# AT91CAP9 board-specific support
obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o
# AT91SAM board with device-tree
obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o
diff --git a/arch/arm/mach-at91/wrs-bootcount.c b/arch/arm/mach-at91/wrs-bootcount.c
new file mode 100644
index 0000000..9088377
index 0000000..c4305b9
--- /dev/null
+++ b/arch/arm/mach-at91/wrs-bootcount.c
@@ -0,0 +1,109 @@
@@ -0,0 +1,122 @@
+/* Alessandro Rubini for CERN 2014 */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+
+#include <mach/hardware.h>
+#include <asm/mach/map.h>
......@@ -107,10 +129,22 @@ index 0000000..9088377
+ __raw_writel(s[i], d + i);
+}
+
+/**
+ * List of necessary resources
+ */
+static struct resource wrs_r[] = {
+ {
+ .name = "GPBR",
+ .start = AT91SAM9G45_BASE_GPBR,
+ .end = AT91SAM9G45_BASE_GPBR + 0x10,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+/* As soon as possible, copy stuff over */
+static int __init wrs_bc_early_init(void)
+{
+ bc_regs = (void __iomem *)AT91_VA_BASE_SYS + AT91_GPBR;
+ bc_regs = ioremap(wrs_r[0].start, resource_size(&wrs_r[0]));
+ copy16_fromio(bc_hw, bc_regs);
+
+ if (strncmp(bc_hw->magic, "WRS", 3)) /* power on */
......@@ -164,5 +198,5 @@ index 0000000..9088377
+}
+module_init(proc_wrs_bc_init);
--
1.7.7.2
2.7.4
patches/kernel/v2.6.39/0009-at91-udc-force-full-speed.patch → patches/kernel/v3.16.37/0008-wr-switch-at91-udc-force-full-speed.patch
View file @ d8f1dc9f
From 1402207cdb93a0f12ef5b544184c17b35d4ffd12 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 17 Jun 2014 10:47:30 +0200
Subject: [PATCH 9/9] at91 udc: force full speed
From 036bcbd702ca7129ce72871b62c67291022ae6f4 Mon Sep 17 00:00:00 2001
From: Federico Vaga <federico.vaga@cern.ch>
Date: Thu, 13 Oct 2016 17:06:35 +0200
Subject: [PATCH 8/8] wr-switch (at91 udc): force full speed
Some WRS speciments won't work correctly with automatic speed setup.
This patch forces full-speed on the device (instead of the
......@@ -9,16 +9,21 @@ autodetected high-speed), and thus they work.
Speed is not a problem anyways, because it is just a serial port.
Update to 3.16.37
=================
This patch has been ported from 2.6.39.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
---
drivers/usb/gadget/atmel_usba_udc.c | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-)
drivers/usb/gadget/atmel_usba_udc.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index e7c65a4..bd6ccfb 100644
index 892bd97..34b0e87 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -1158,12 +1158,12 @@ static int do_test_mode(struct usba_udc *udc)
@@ -1149,12 +1149,12 @@ static int do_test_mode(struct usba_udc *udc)
break;
case 0x0300:
/*
......@@ -26,14 +31,14 @@ index e7c65a4..bd6ccfb 100644
+ * Test_SE0_NAK: Force full-speed mode and set up ep0
* for Bulk IN transfers
*/
ep = &usba_ep[0];
ep = &udc->usba_ep[0];
usba_writel(udc, TST,
- USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
+ USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_FULL));
usba_ep_writel(ep, CFG,
USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
| USBA_EPT_DIR_IN
@@ -1832,6 +1832,9 @@ int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
@@ -1812,6 +1812,9 @@ static int atmel_usba_start(struct usb_gadget *gadget,
toggle_bias(1);
usba_writel(udc, CTRL, USBA_ENABLE_MASK);
usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
......@@ -44,5 +49,5 @@ index e7c65a4..bd6ccfb 100644
spin_unlock_irqrestore(&udc->lock, flags);
--
1.7.7.2
2.7.4
patches/kernel/v3.16.37/0009-hack-architecture-to-boot-on-our-boot-loader.patch 0 → 100644
View file @ d8f1dc9f
From 5a22a53c8403160bcc345877f3dd1249405e1cc8 Mon Sep 17 00:00:00 2001
From: Federico Vaga <federico.vaga@cern.ch>
Date: Wed, 9 Nov 2016 15:24:45 +0100
Subject: [PATCH] hack architecture to boot on our boot-loader
The boot-loader is based on the PMG45 architecture which does not
exists on the kernel side, which is then based on the SAM9M10G45EK.
For some reason this combination was working with kernel 2.6.39, but
now it does not.
Fixing the bootloader, in order to be based on the SAM9M10G45EK board
as the kernel, requires much more effort for a little practical gain.
The main problem is that the 3.16.37 kernel refues to boot since the
boot-loader declares that the board in use is a PMG45 and not a SAM9M10EK
as expected by the kernel. In order to make the kernel boot we have to
provide this information:
armlinux_architecture
armlinux_system_rev
armlinux_system_serial
This can be done by changing the boot-loader environment variables.
However, on switches that use custom environment variables stored in the
flash it can lead to the situation that the new kernel won't boot.
The issue is quickly fixed by this patch that changes the identification
number for the SAM9M10G45EK to the one for the PMG45 architecture declared
in the boot-loader.
The patch also hard-code the NAND bus width which should be taken
dynamically from the armlinux_system_rev. But, for the same reason, the
wrong architecture provides wrong values.
This choice give us the freedom to update the kernel without changing the
boot-loader nor bootloader's environment . This means that for whatever
eason we will be able to easily switch from 2.6.39 to 3.16.37 for debugging
purpose.
Acked-by: Adam Wujek <adam.wujek@cern.ch>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 4 ++--
arch/arm/tools/mach-types | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 5686a87..894ed23 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -206,7 +206,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
static void __init ek_add_device_nand(void)
{
- ek_nand_data.bus_width_16 = board_have_nand_16bit();
+ ek_nand_data.bus_width_16 = 1;
/* setup bus-width (8 or 16) */
if (ek_nand_data.bus_width_16)
ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
@@ -578,7 +578,7 @@ static void __init ek_board_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
}
-MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
+MACHINE_START(PM9G45, "Atmel AT91SAM9M10G45-EK")
/* Maintainer: Atmel */
.init_time = at91sam926x_pit_init,
.map_io = at91_map_io,
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index a10297d..399392f 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -457,6 +457,7 @@ mityomapl138 MACH_MITYOMAPL138 MITYOMAPL138 2650
guruplug MACH_GURUPLUG GURUPLUG 2659
spear310 MACH_SPEAR310 SPEAR310 2660
spear320 MACH_SPEAR320 SPEAR320 2661
+pm9g45 MACH_PM9G45 PM9G45 2672
aquila MACH_AQUILA AQUILA 2676
esata_sheevaplug MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678
msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679
--
2.7.4
patches/kernel/v3.16.37/0010-disable-BBT-for-the-nand-flash.patch 0 → 100644
View file @ d8f1dc9f
From 882cefc0c65c424e6f080b00e77465cadbe777c6 Mon Sep 17 00:00:00 2001
From: Adam Wujek <adam.wujek@cern.ch>
Date: Thu, 24 Nov 2016 17:06:13 +0100
Subject: [PATCH] disable BBT for the nand flash
Disable the Bad Block Table (BBT) because the BBT uses the 4 last PEBs of
nand flash, which overwrites UBIFS.
BBT was disabled in the old kernel. There is not so much performance penalty
due to that (see the last sentence in the citation below). There is no impact
on the reliability of a flash because this is just a table of bad blocks which
is otherwise recreated in the ram at every boot.
The MTD layer supplies upper layers (including UBI) with information about bad
PEBs. It keeps so-called bad block table in RAM, which is usually 1 bit per PEB.
When the driver initializes, it has to build this table by scanning whole flash
media, which normally includes reading OOB area of 1st NAND page of each PEB.
This takes time and may be improved by using on-flash BBT (bad block table).
In this case the bad PEB map is stored on flash and MTD does not have to do any
scanning. See the NAND_USE_FLASH_BBT constant in the Linux source codes. But
note, bad PEB scanning is usually minor comparing to the UBI scan time, so
on-flash BBT is not probably going to give much.
(http://www.linux-mtd.infradead.org/faq/ubi.html#L_attach_faster)
Signed-off-by: Adam Wujek <adam.wujek@cern.ch>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 5686a87..59fe03d 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -181,7 +181,9 @@ static struct atmel_nand_data __initdata ek_nand_data = {
.enable_pin = AT91_PIN_PC14,
.det_pin = -EINVAL,
.ecc_mode = NAND_ECC_SOFT,
- .on_flash_bbt = 1,
+ .on_flash_bbt = 0, /* Disable the BBT since it uses 4 last PEBs in
+ the nand, which are used by the ubifs already.
+ It does not decrease in the reliability. */
.parts = ek_nand_partition,
.num_parts = ARRAY_SIZE(ek_nand_partition),
};
--
1.9.1
userspace/libwr/pio.c
View file @ d8f1dc9f
......@@ -8,7 +8,6 @@
#include <inttypes.h>
#include <fcntl.h>
#include <mach/at91_pmc.h>
#include <mach/at91_pio.h>
#include <libwr/pio.h>
......
userspace/rootfs_override/etc/init.d/wrs-boot-procedure
View file @ d8f1dc9f
......@@ -16,6 +16,10 @@ if [ -n "$WRS_VERBOSE" ]; then
fi
# This used to be S01modules
insmod /lib/modules/`uname -r`/kernel/libcomposite.ko
insmod /lib/modules/`uname -r`/kernel/u_serial.ko
insmod /lib/modules/`uname -r`/kernel/usb_f_acm.ko
insmod /lib/modules/`uname -r`/kernel/g_serial.ko
rmmod g_serial
insmod /lib/modules/`uname -r`/kernel/g_serial.ko
......
userspace/rootfs_override/wr/sbin/startup-mb.sh
View file @ d8f1dc9f
......@@ -90,7 +90,8 @@ else
fi
insmod $WR_HOME/lib/modules/wr_vic.ko
insmod $WR_HOME/lib/modules/htvic.ko
insmod $WR_HOME/lib/modules/wrs_devices.ko
insmod $WR_HOME/lib/modules/wr-nic.ko macaddr=$val
insmod $WR_HOME/lib/modules/wr_rtu.ko
insmod $WR_HOME/lib/modules/wr_pstats.ko pstats_nports=18
......
userspace/snmpd/wrsBootStatusGroup.c
View file @ d8f1dc9f
......@@ -77,9 +77,12 @@ static struct wrs_km_item kernel_modules[] = {
[1] = {"wr_pstats"},
[2] = {"wr_rtu"},
[3] = {"wr_nic"},
[4] = {"wr_vic"},
[5] = {"at91_softpwm"},
[4] = {"wrs_devices"},
[5] = {"htvic"},
[6] = {"g_serial"},
[7] = {"usb_f_acm"},
[8] = {"u_serial"},
[9] = {"libcomposite"},
};
/* user space daemon list item */
......
userspace/tools/Makefile
View file @ d8f1dc9f
......@@ -29,7 +29,6 @@ OBJDUMP = $(CROSS_COMPILE)objdump
# LOTs of includes
CFLAGS = -O2 -g -Wall \
-Wstrict-prototypes \
-I$(LINUX)/include \
-I$(LINUX)/arch/arm/mach-at91/include \
-I../wrsw_rtud \
-I../mini-rpc \
......
userspace/tools/load-virtex.c
View file @ d8f1dc9f
......@@ -23,8 +23,6 @@
#include <mach/at91sam9g45.h>
#include <mach/at91_pio.h>
#include <mach/at91_ssc.h>
#include <mach/at91_pmc.h>
#include <libwr/util.h>
......@@ -34,8 +32,46 @@
static unsigned char *bstream;
/* FIXME definitions from kernel 2.6.39 - read commit message */
#define AT91SAM9G45_PERIPH (0xFFF78000)
#define AT91SAM9G45_SSC0 (0xFFF9C000)
#define AT91_SSC_CR 0x00
#define AT91_SSC_RXEN (1 << 0) /* Receive Enable */
#define AT91_SSC_RXDIS (1 << 1) /* Receive Disable */
#define AT91_SSC_TXEN (1 << 8) /* Transmit Enable */
#define AT91_SSC_TXDIS (1 << 9) /* Transmit Disable */
#define AT91_SSC_SWRST (1 << 15) /* Software Reset */
#define AT91_SSC_CMR 0x04 /* Clock Mode Register */
#define AT91_SSC_CMR_DIV (0xfff << 0) /* Clock Divider */
#define AT91_SSC_RCMR 0x10 /* Receive Clock Mode Register */
#define AT91_SSC_CKS (3 << 0) /* Clock Selection */
#define AT91_SSC_CKS_DIV (0 << 0)
#define AT91_SSC_CKS_CLOCK (1 << 0)
#define AT91_SSC_CKS_PIN (2 << 0)
#define AT91_SSC_RFMR 0x14 /* Receive Frame Mode Register */
#define AT91_SSC_DATALEN (0x1f << 0) /* Data Length */
#define AT91_SSC_LOOP (1 << 5) /* Loop Mode */
#define AT91_SSC_MSBF (1 << 7) /* Most Significant Bit First */
#define AT91_SSC_TCMR 0x18 /* Transmit Clock Mode Register */
#define AT91_SSC_TFMR 0x1c /* Transmit Fram Mode Register */
#define AT91_SSC_DATDEF (1 << 5) /* Data Default Value */
#define AT91_SSC_FSDEN (1 << 23) /* Frame Sync Data Enable */
#define AT91_SSC_THR 0x24 /* Transmit Holding Register */
#define AT91_SSC_SR 0x40 /* Status Register */
#define AT91_SSC_TXRDY (1 << 0) /* Transmit Ready */
#define AT91_SSC_TXEMPTY (1 << 1) /* Transmit Empty */
#define AT91_SYS (0xFFFFE200)
#define AT91_SYS_PIOA (0x1000)
#define AT91_SYS_PMC (0x1A00)
#define AT91_SYS_PMC_PCER (0x10)
/* The address and size of the entire AT91 I/O reg space */
#define BASE_IOREGS 0xfff78000
#define BASE_IOREGS AT91SAM9G45_PERIPH
#define SIZE_IOREGS 0x88000
enum {
......@@ -48,18 +84,20 @@ enum {
static void *ioregs;
#define AT91_PIOx(port) (AT91_PIOA + AT91_BASE_SYS + 0x200 * port)
#define __PERIPH_FIXUP(__addr) (ioregs - BASE_IOREGS + __addr)
#define AT91_PIOx(port) (AT91_SYS + AT91_SYS_PIOA + 0x200 * port)
/* macros to access 32-bit registers of various peripherals */
#define __PIO(port, regname) (*(volatile uint32_t *) \
(ioregs + AT91_PIOx(port) - BASE_IOREGS + regname))
#define __PIO_ADDR(port, regname) (AT91_PIOx(port) + regname)
#define __SSC_ADDR(regname) (AT91SAM9G45_SSC0 + regname)
#define __PMC_ADDR(regname) (AT91_SYS + AT91_SYS_PMC + regname)
#define __SSC(regname) (*(volatile uint32_t *) \
(ioregs + (AT91SAM9G45_BASE_SSC0 - BASE_IOREGS) + regname))
#define __PIO(port, regname) (*(volatile uint32_t *) \
(__PERIPH_FIXUP(__PIO_ADDR(port, regname))))
#define __SSC(regname) (*(volatile uint32_t *)(__PERIPH_FIXUP(__SSC_ADDR(regname))))
#define __PMC(regname) \
(*(volatile uint32_t *)(ioregs + (AT91_BASE_SYS - BASE_IOREGS) + regname))
(*(volatile uint32_t *)(__PERIPH_FIXUP(__PMC_ADDR(regname))))
/* Missing SSC reg fields */
#define AT91_SSC_CKO_DURING_XFER (2 << 2)
......@@ -145,7 +183,6 @@ static int load_fpga_child(char *fname)
exit(1);
}
/*
* all of this stuff is working on gpio so enable pio, out or in
*/
......@@ -161,7 +198,7 @@ static int load_fpga_child(char *fname)
pio_set(PIO_OER, TD0);
/* enable SSC controller clock */
__PMC(AT91_PMC_PCER) = 1<<AT91SAM9G45_ID_SSC0;
__PMC(AT91_SYS_PMC_PCER) = (1 << AT91SAM9G45_ID_SSC0);
__SSC(AT91_SSC_CR) = AT91_SSC_SWRST;
__SSC(AT91_SSC_CR) = 0;
......
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