Commit d8f1dc9f authored by Adam Wujek's avatar Adam Wujek 💬

Merge commit 'adam-update_kernel_3.16.37'

Signed-off-by: Adam Wujek's avatarAdam Wujek <adam.wujek@cern.ch>
parents 4744f847 ac693f95
...@@ -15,8 +15,8 @@ barebox-2014.04.0.tar.bz2 e1f089fc24cc7f24478e663c0e3b91d9 \ ...@@ -15,8 +15,8 @@ barebox-2014.04.0.tar.bz2 e1f089fc24cc7f24478e663c0e3b91d9 \
http://www.barebox.org/download/barebox-2014.04.0.tar.bz2 http://www.barebox.org/download/barebox-2014.04.0.tar.bz2
# kernel # kernel
linux-2.6.39.tar.bz2 1aab7a741abe08d42e8eccf20de61e05 \ linux-3.16.37.tar.xz fc4e8c469cf852a128e160f2910c1f21 \
http://www.kernel.org/pub/linux/kernel/v2.6/linux-2.6.39.tar.bz2 https://www.kernel.org/pub/linux/kernel/v3.x/linux-3.16.37.tar.xz
# our gateware binaries # our gateware binaries
wrs-gw-v4.2-20150826.tar.gz 807117326f6d5b1b53ebc95ca093fc44 \ wrs-gw-v4.2-20150826.tar.gz 807117326f6d5b1b53ebc95ca093fc44 \
......
#!/bin/bash #!/bin/bash
KERVER=2.6.39
# check variables, like all scripts herein do # check variables, like all scripts herein do
WRS_SCRIPT_NAME=$(basename $0) WRS_SCRIPT_NAME=$(basename $0)
if [ -z "$WRS_BASE_DIR" ]; then if [ -z "$WRS_BASE_DIR" ]; then
...@@ -13,8 +11,9 @@ fi ...@@ -13,8 +11,9 @@ fi
wrs_check_vars WRS_OUTPUT_DIR WRS_DOWNLOAD_DIR CROSS_COMPILE wrs_check_vars WRS_OUTPUT_DIR WRS_DOWNLOAD_DIR CROSS_COMPILE
wrs_echo "--- Linux kernel for switch" wrs_echo "--- Linux kernel for switch"
tarname="linux-${KERVER}.tar.bz2"
patchdir="${WRS_BASE_DIR}/../patches/kernel/v${KERVER}" tarname="linux-${KVER}.tar.xz"
patchdir="${WRS_BASE_DIR}/../patches/kernel/v${KVER}"
wrs_download $tarname wrs_download $tarname
mkdir -p $WRS_OUTPUT_DIR/build || wrs_die "mkdir build" mkdir -p $WRS_OUTPUT_DIR/build || wrs_die "mkdir build"
...@@ -22,9 +21,10 @@ mkdir -p $WRS_OUTPUT_DIR/images || wrs_die "mkdir images" ...@@ -22,9 +21,10 @@ mkdir -p $WRS_OUTPUT_DIR/images || wrs_die "mkdir images"
# go to the build dir and compile it, using our configuration # go to the build dir and compile it, using our configuration
cd $WRS_OUTPUT_DIR/build cd $WRS_OUTPUT_DIR/build
dirname="linux-${KERVER}" dirname="linux-${KVER}"
rm -rf $dirname rm -rf $dirname
tar xjf ${WRS_DOWNLOAD_DIR}/$tarname || wrs_die "untar $tarname" # xz archive, so use "J" for tar
tar xJf ${WRS_DOWNLOAD_DIR}/$tarname || wrs_die "untar $tarname"
# apply patches # apply patches
cd $dirname cd $dirname
...@@ -34,7 +34,7 @@ done ...@@ -34,7 +34,7 @@ done
# copy the config and replace "-j" level. First remove it in case it's left in # copy the config and replace "-j" level. First remove it in case it's left in
CFG="${patchdir}/linux-config-wrswitch" CFG=$WRS_BASE_DIR/../configs/wrs_linux_defconfig
if [ "x$WRS_KERNEL_CONFIG" != "x" ]; then if [ "x$WRS_KERNEL_CONFIG" != "x" ]; then
if [ -f $WRS_KERNEL_CONFIG ]; then if [ -f $WRS_KERNEL_CONFIG ]; then
CFG=$WRS_KERNEL_CONFIG CFG=$WRS_KERNEL_CONFIG
...@@ -50,7 +50,7 @@ make oldconfig || wrs_die "kernel config" ...@@ -50,7 +50,7 @@ make oldconfig || wrs_die "kernel config"
make $WRS_MAKE_J zImage modules || wrs_die "kernel compilation" make $WRS_MAKE_J zImage modules || wrs_die "kernel compilation"
mkdir -p $WRS_OUTPUT_DIR/images/lib/modules/$KERVER/kernel mkdir -p $WRS_OUTPUT_DIR/images/lib/modules/$KVER/kernel
cp $(find . -name '*.ko') $WRS_OUTPUT_DIR/images/lib/modules/$KERVER/kernel cp $(find . -name '*.ko') $WRS_OUTPUT_DIR/images/lib/modules/$KVER/kernel
cp arch/$ARCH/boot/zImage $WRS_OUTPUT_DIR/images cp arch/$ARCH/boot/zImage $WRS_OUTPUT_DIR/images
...@@ -16,7 +16,7 @@ mkdir -p $WRS_OUTPUT_DIR/build || wrs_die "mkdir build" ...@@ -16,7 +16,7 @@ mkdir -p $WRS_OUTPUT_DIR/build || wrs_die "mkdir build"
mkdir -p $WRS_OUTPUT_DIR/images || wrs_die "mkdir images" mkdir -p $WRS_OUTPUT_DIR/images || wrs_die "mkdir images"
# check that the kernel has been compiled (or at least configured) # check that the kernel has been compiled (or at least configured)
export LINUX="$WRS_OUTPUT_DIR/build/linux-2.6.39" export LINUX="$WRS_OUTPUT_DIR/build/linux-$KVER"
test -f $LINUX/.config || wrs_die "no kernel in $LINUX" test -f $LINUX/.config || wrs_die "no kernel in $LINUX"
cd $WRS_BASE_DIR/../kernel cd $WRS_BASE_DIR/../kernel
make $WRS_MAKE_J || wrs_die "white rabbit kernel modules" make $WRS_MAKE_J || wrs_die "white rabbit kernel modules"
......
...@@ -21,7 +21,7 @@ make clean ...@@ -21,7 +21,7 @@ make clean
# we need LINUX and CROSS_COMPILE. The latter is there for sure # we need LINUX and CROSS_COMPILE. The latter is there for sure
if [ "x$LINUX" == "x" ]; then if [ "x$LINUX" == "x" ]; then
export LINUX="$WRS_OUTPUT_DIR/build/linux-2.6.39" export LINUX="$WRS_OUTPUT_DIR/build/linux-$KVER"
fi fi
......
...@@ -17,7 +17,7 @@ installdir="$WRS_OUTPUT_DIR/images/wr" ...@@ -17,7 +17,7 @@ installdir="$WRS_OUTPUT_DIR/images/wr"
# This time build is done in-place, but the output is a tree in images/wr. # This time build is done in-place, but the output is a tree in images/wr.
# Some of the makefiles inside use # Some of the makefiles inside use
export LINUX="$WRS_OUTPUT_DIR/build/linux-2.6.39" export LINUX="$WRS_OUTPUT_DIR/build/linux-$KVER"
cd $sourcedir cd $sourcedir
make clean || wrs_die "Error cleaning user space" make clean || wrs_die "Error cleaning user space"
......
...@@ -37,6 +37,7 @@ export PATH="$PATH:/usr/sbin" ...@@ -37,6 +37,7 @@ export PATH="$PATH:/usr/sbin"
WRS_TOOLS="git gcc g++ ar as m4 msgfmt md5sum make" WRS_TOOLS="git gcc g++ ar as m4 msgfmt md5sum make"
WRS_TOOLS="$WRS_TOOLS awk unzip patch bison flex ncursesw5-config" WRS_TOOLS="$WRS_TOOLS awk unzip patch bison flex ncursesw5-config"
WRS_TOOLS="$WRS_TOOLS fakeroot makeinfo" WRS_TOOLS="$WRS_TOOLS fakeroot makeinfo"
WRS_TOOLS="$WRS_TOOLS xz"
wrs_check_tools $WRS_TOOLS wrs_check_tools $WRS_TOOLS
...@@ -48,6 +49,9 @@ fi ...@@ -48,6 +49,9 @@ fi
export WRS_SCRIPTS_DIR=${WRS_BASE_DIR}/scripts export WRS_SCRIPTS_DIR=${WRS_BASE_DIR}/scripts
# Export Linux kernel version in use
export KVER="3.16.37"
# Export Buildroot version in use # Export Buildroot version in use
export BRVER="2016.02" export BRVER="2016.02"
......
...@@ -3,8 +3,6 @@ ...@@ -3,8 +3,6 @@
# Buildroot 2016.02 Configuration # Buildroot 2016.02 Configuration
# #
BR2_HAVE_DOT_CONFIG=y BR2_HAVE_DOT_CONFIG=y
BR2_HOST_GCC_AT_LEAST_4_7=y
BR2_HOST_GCC_AT_LEAST_4_8=y
# #
# Target options # Target options
...@@ -153,9 +151,36 @@ BR2_TOOLCHAIN_BUILDROOT_VENDOR="buildroot" ...@@ -153,9 +151,36 @@ BR2_TOOLCHAIN_BUILDROOT_VENDOR="buildroot"
# BR2_KERNEL_HEADERS_3_18 is not set # BR2_KERNEL_HEADERS_3_18 is not set
# BR2_KERNEL_HEADERS_4_1 is not set # BR2_KERNEL_HEADERS_4_1 is not set
# BR2_KERNEL_HEADERS_4_3 is not set # BR2_KERNEL_HEADERS_4_3 is not set
BR2_KERNEL_HEADERS_4_4=y # BR2_KERNEL_HEADERS_4_4 is not set
# BR2_KERNEL_HEADERS_VERSION is not set BR2_KERNEL_HEADERS_VERSION=y
BR2_DEFAULT_KERNEL_HEADERS="4.4.3" BR2_DEFAULT_KERNEL_VERSION="3.16.37"
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_4 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_3 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_2 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_1 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_0 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_19 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_18 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_17 is not set
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_16=y
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_15 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_14 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_13 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_12 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_11 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_10 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_9 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_8 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_7 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_6 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_5 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_4 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_3 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_2 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_1 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_0 is not set
# BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_REALLY_OLD is not set
BR2_DEFAULT_KERNEL_HEADERS="3.16.37"
BR2_TOOLCHAIN_BUILDROOT_UCLIBC=y BR2_TOOLCHAIN_BUILDROOT_UCLIBC=y
# BR2_TOOLCHAIN_BUILDROOT_GLIBC is not set # BR2_TOOLCHAIN_BUILDROOT_GLIBC is not set
# BR2_TOOLCHAIN_BUILDROOT_MUSL is not set # BR2_TOOLCHAIN_BUILDROOT_MUSL is not set
...@@ -239,15 +264,7 @@ BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_13=y ...@@ -239,15 +264,7 @@ BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_13=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_14=y BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_14=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_15=y BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_15=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_16=y BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_16=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_17=y BR2_TOOLCHAIN_HEADERS_AT_LEAST="3.16"
BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_18=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_19=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_0=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_1=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_2=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_3=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_4=y
BR2_TOOLCHAIN_HEADERS_AT_LEAST="4.4"
BR2_TOOLCHAIN_GCC_AT_LEAST_4_3=y BR2_TOOLCHAIN_GCC_AT_LEAST_4_3=y
BR2_TOOLCHAIN_GCC_AT_LEAST_4_4=y BR2_TOOLCHAIN_GCC_AT_LEAST_4_4=y
BR2_TOOLCHAIN_GCC_AT_LEAST_4_5=y BR2_TOOLCHAIN_GCC_AT_LEAST_4_5=y
......
...@@ -727,7 +727,7 @@ Specification ...@@ -727,7 +727,7 @@ Specification
| **I/O** | 32bit Async Bridge with FPGA\ | | **I/O** | 32bit Async Bridge with FPGA\ |
| | 100Base-T Ethernet | | | 100Base-T Ethernet |
+--------------------+-------------------------------------------------+ +--------------------+-------------------------------------------------+
| **OS** | Linux (Kernel v2.6.39) | | **OS** | Linux (Kernel v3.16.37) |
+--------------------+-------------------------------------------------+ +--------------------+-------------------------------------------------+
......
...@@ -363,7 +363,7 @@ The messages of a download run are like the following ones: ...@@ -363,7 +363,7 @@ The messages of a download run are like the following ones:
2016-06-02 17:10:46: --- Downloading base packages 2016-06-02 17:10:46: --- Downloading base packages
2016-06-02 17:10:50: Retrieved at91bootstrap-3-3.0.tar.gz from upstream 2016-06-02 17:10:50: Retrieved at91bootstrap-3-3.0.tar.gz from upstream
2016-06-02 17:10:51: Retrieved barebox-2014.04.0.tar.bz2 from upstream 2016-06-02 17:10:51: Retrieved barebox-2014.04.0.tar.bz2 from upstream
2016-06-02 17:11:21: Retrieved linux-2.6.39.tar.bz2 from upstream 2016-06-02 17:11:21: Retrieved linux-3.16.37.tar.xz from upstream
2016-06-02 17:11:22: Retrieved wrs-gw-v4.2-20150826.tar.gz from upstream 2016-06-02 17:11:22: Retrieved wrs-gw-v4.2-20150826.tar.gz from upstream
2016-06-02 17:11:27: Retrieved buildroot-2016.02.tar.bz2 from upstream 2016-06-02 17:11:27: Retrieved buildroot-2016.02.tar.bz2 from upstream
@end smallexample @end smallexample
...@@ -736,31 +736,26 @@ in two lines with a local variable to fit the page with in documentation): ...@@ -736,31 +736,26 @@ in two lines with a local variable to fit the page with in documentation):
@node The Linux Kernel @node The Linux Kernel
@subsection The Linux Kernel @subsection The Linux Kernel
The kernel is currently version 2.6.39, compiled from an uncompressed The kernel is currently version 3.16.37, compiled from an uncompressed
tar file (so not within a @i{git} repository). The upstream tar file (so not within a @i{git} repository). The upstream
vanilla kernel is downloaded, then vanilla kernel is downloaded, then
local patches are applied (they come from a @i{git} local patches are applied (they come from a @i{git}
repository, but they are currently applied with a simple @i{patch} repository, but they are currently applied with a simple @i{patch}
command). command).
The relevant patches are available in @i{patches/kernel/v2.6.39}, The relevant patches are available in @i{patches/kernel/v3.16.37},
and are currently the following ones: and are currently the following ones:
@example @example
0001-wrs3-changes-to-g45ek.patch 0001-initramfs-stop-after-one-cpio-archive.patch
0002-initramfs-stop-after-one-cpio-archive.patch 0002-arm-fiq-allow-modules-to-exploit-the-fiq-mechanism.patch
0003-at91-NR_IRQS-increase-by-64-to-fit-custom-muxes.patch 0003-mtd_dataflash-Read-EDI-bytes-in-JEDEC-to-support-AT4.patch
0004-irq-export-symbols-for-external-irq-controller.patch 0004-wr-switch-sam9m10g45ek-enable-FPGA-access-from-EBI1-.patch
0005-Change-Vbus-pin.patch 0005-wr-switch-sam9m10g45ek-change-USB-vbus_pin-from-PB19.patch
0006-arm-fiq-allow-modules-to-exploit-the-fiq-mechanism.patch 0006-wr-switch-sam9m10g45ek-store-device-partitioning.patch
0007-mtd-nand-sam9g45-can-hwecc-like-9263.patch 0007-wr-switch-sam9m10g45ek-more-relaxed-nand-timings.patch
0008-wrs3-use-correct-nand-partitioning.patch 0008-wr-switch-sam9m10g45ek-provide-bootcount-using-scrat.patch
0009-at91-udc-force-full-speed.patch 0009-wr-switch-at91-udc-force-full-speed.patch
0010-sam9m10g45ek-for-wrs-new-partitioning.patch
0011-sam9m10g45ek-for-wrs-final-partitions-for-V4.1.patch
0012-sam9m10g45ek-for-wrs-more-relaxed-nand-timings.patch
0013-mtd_dataflash-Read-EDI-JEDEC-to-support-AT45DB641E.patch
0014-sam9m10g45ek-for-wrs-provide-bootcount-using-scratch.patch
@end example @end example
The configuration we use to build the kernel is not a patch but a plain The configuration we use to build the kernel is not a patch but a plain
...@@ -797,7 +792,7 @@ Currently, the package includes the following modules: ...@@ -797,7 +792,7 @@ Currently, the package includes the following modules:
@itemize @bullet @itemize @bullet
@item @i{wr_vic.ko}: the interrupt controller for in-FPGA devices. @item @i{htvic.ko}: the interrupt controller for in-FPGA devices.
@item @i{wr-nic.ko}: the network ``card'' driver for WR ports. @item @i{wr-nic.ko}: the network ``card'' driver for WR ports.
@item @i{wr_rtu.ko}: the routing-table interface between the @item @i{wr_rtu.ko}: the routing-table interface between the
switching core and the associated user-space daemon. switching core and the associated user-space daemon.
...@@ -812,6 +807,8 @@ This is considered acceptable, because system time is only ...@@ -812,6 +807,8 @@ This is considered acceptable, because system time is only
used for logging. used for logging.
@item @i{wrs_devices.ko}: a dummy module that register our platform devices.
@end itemize @end itemize
@c -------------------------------------------------------------------------- @c --------------------------------------------------------------------------
......
...@@ -141,13 +141,6 @@ waiting for the boot loader to be sent to RAM from USB. ...@@ -141,13 +141,6 @@ waiting for the boot loader to be sent to RAM from USB.
@itemize @bullet @itemize @bullet
@item 2.6.39 is pretty old nowadays. We should move to a recent kernel.
Unfortunately this means writing the ``device tree'' crap for our board,
as everything nowadays is device-tree-based. Which in my opinion has
been designed by our competitors, to kill us slowly and painfully.
In addition, our patches must be ported forward. A patch-set for 3.14
is currently work in progress.
@item The @i{wr-nic} driver is very similar to what we run for the SPEC, @item The @i{wr-nic} driver is very similar to what we run for the SPEC,
we went forward in merging it with the one in @i{spec-sw} but a few we went forward in merging it with the one in @i{spec-sw} but a few
lines are still different. Unifying will allow using a driver lines are still different. Unifying will allow using a driver
......
DIRS = wr_vic wr_nic wr_rtu wr_pstats wr_clocksource DIRS = coht_vic wr_nic wr_rtu wr_pstats wr_clocksource wrs_devices
# We may "LINUX ?= /usr/src/linux-wrswitch", but it's better to leave it empty # We may "LINUX ?= /usr/src/linux-wrswitch", but it's better to leave it empty
......
ccflags-y += -Werror
obj-m := htvic.o
export ARCH ?= arm
export CROSS_COMPILE ?= $(CROSS_COMPILE_ARM)
all: modules
modules:
$(MAKE) -C $(LINUX) M=$(shell /bin/pwd)
clean:
$(MAKE) -C $(LINUX) M=$(shell /bin/pwd) clean
gtags:
gtags --statistics
.PHONY: all clean gtags
This diff is collapsed.
/*
* Copyright (c) 2016 CERN
* Author: Federico Vaga <federico.vaga@cern.ch>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __HTVIC_H__
#define __HTVIC_H__
#include "htvic_regs.h"
#define VIC_MAX_VECTORS 32
#define VIC_SDB_VENDOR 0xce42
#define VIC_SDB_DEVICE 0x0013
#define VIC_IRQ_BASE_NUMBER 0
enum htvic_versions {
HTVIC_VER_SPEC = 0,
HTVIC_VER_SVEC,
HTVIC_VER_WRSWI,
};
enum htvic_mem_resources {
HTVIC_MEM_BASE = 0,
};
struct htvic_data {
uint32_t is_edge; /* 1 edge, 0 level */
uint32_t is_raising; /* 1 raising, 0 falling */
uint32_t pulse_len;
};
struct htvic_device {
struct platform_device *pdev;
struct irq_domain *domain;
unsigned int hwid[VIC_MAX_VECTORS]; /**> original ID from FPGA */
struct htvic_data *data;
void __iomem *kernel_va;
irq_flow_handler_t platform_handle_irq;
void *platform_handler_data;
};
struct memory_ops {
u32 (*read)(void *addr);
void (*write)(u32 value, void *addr);
};
extern struct memory_ops memop;
static inline u32 htvic_ioread(struct htvic_device *htvic, void __iomem *addr)
{
return memop.read(addr);
}
static inline void htvic_iowrite(struct htvic_device *htvic,
u32 value, void __iomem *addr)
{
return memop.write(value, addr);
}
static inline u32 __htvic_ioread32(void *addr)
{
return ioread32(addr);
}
static inline u32 __htvic_ioread32be(void *addr)
{
return ioread32be(addr);
}
static inline void __htvic_iowrite32(u32 value,void __iomem *addr)
{
iowrite32(value, addr);
}
static inline void __htvic_iowrite32be(u32 value, void __iomem *addr)
{
iowrite32be(value, addr);
}
#endif
/*
Register definitions for slave core: Vectored Interrupt Controller (VIC)
* File : here.h
* Author : auto-generated by wbgen2 from wb_slave_vic.wb
* Created : Thu Jul 14 15:43:13 2016
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wb_slave_vic.wb
DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!
*/
#ifndef __WBGEN2_REGDEFS_WB_SLAVE_VIC_WB
#define __WBGEN2_REGDEFS_WB_SLAVE_VIC_WB
#ifdef __KERNEL__
#include <linux/types.h>
#else
#include <inttypes.h>
#endif
#if defined( __GNUC__)
#define PACKED __attribute__ ((packed))
#else
#error "Unsupported compiler?"
#endif
#ifndef __WBGEN2_MACROS_DEFINED__
#define __WBGEN2_MACROS_DEFINED__
#define WBGEN2_GEN_MASK(offset, size) (((1<<(size))-1) << (offset))
#define WBGEN2_GEN_WRITE(value, offset, size) (((value) & ((1<<(size))-1)) << (offset))
#define WBGEN2_GEN_READ(reg, offset, size) (((reg) >> (offset)) & ((1<<(size))-1))
#define WBGEN2_SIGN_EXTEND(value, bits) (((value) & (1<<bits) ? ~((1<<(bits))-1): 0 ) | (value))
#endif
/* definitions for register: VIC Control Register */
/* definitions for field: VIC Enable in reg: VIC Control Register */
#define VIC_CTL_ENABLE WBGEN2_GEN_MASK(0, 1)
/* definitions for field: VIC output polarity in reg: VIC Control Register */
#define VIC_CTL_POL WBGEN2_GEN_MASK(1, 1)
/* definitions for field: Emulate Edge sensitive output in reg: VIC Control Register */
#define VIC_CTL_EMU_EDGE WBGEN2_GEN_MASK(2, 1)
/* definitions for field: Emulated Edge pulse timer in reg: VIC Control Register */
#define VIC_CTL_EMU_LEN_MASK WBGEN2_GEN_MASK(3, 16)
#define VIC_CTL_EMU_LEN_SHIFT 3
#define VIC_CTL_EMU_LEN_W(value) WBGEN2_GEN_WRITE(value, 3, 16)
#define VIC_CTL_EMU_LEN_R(reg) WBGEN2_GEN_READ(reg, 3, 16)
/* definitions for register: Raw Interrupt Status Register */
/* definitions for register: Interrupt Enable Register */
/* definitions for register: Interrupt Disable Register */
/* definitions for register: Interrupt Mask Register */
/* definitions for register: Vector Address Register */
/* definitions for register: Software Interrupt Register */
/* definitions for register: End Of Interrupt Acknowledge Register */
/* definitions for RAM: Interrupt Vector Table */
#define VIC_IVT_RAM_BASE 0x00000080 /* base address */
#define VIC_IVT_RAM_BYTES 0x00000080 /* size in bytes */
#define VIC_IVT_RAM_WORDS 0x00000020 /* size in 32-bit words, 32-bit aligned */
/* [0x0]: REG VIC Control Register */
#define VIC_REG_CTL 0x00000000
/* [0x4]: REG Raw Interrupt Status Register */
#define VIC_REG_RISR 0x00000004
/* [0x8]: REG Interrupt Enable Register */
#define VIC_REG_IER 0x00000008
/* [0xc]: REG Interrupt Disable Register */
#define VIC_REG_IDR 0x0000000c
/* [0x10]: REG Interrupt Mask Register */
#define VIC_REG_IMR 0x00000010
/* [0x14]: REG Vector Address Register */
#define VIC_REG_VAR 0x00000014
/* [0x18]: REG Software Interrupt Register */
#define VIC_REG_SWIR 0x00000018
/* [0x1c]: REG End Of Interrupt Acknowledge Register */
#define VIC_REG_EOIR 0x0000001c
#endif
...@@ -109,7 +109,7 @@ static void wrcs_timer_fn(unsigned long unused) ...@@ -109,7 +109,7 @@ static void wrcs_timer_fn(unsigned long unused)
return; return;
} }
clocksource_register(&wrcs_cs); clocksource_register_hz(&wrcs_cs, WRCS_FREQUENCY);
wrcs_is_registered = 1; wrcs_is_registered = 1;
/* And don't restart the timer */ /* And don't restart the timer */
} }
...@@ -122,8 +122,6 @@ static int wrcs_init(void) ...@@ -122,8 +122,6 @@ static int wrcs_init(void)
return -EIO; return -EIO;
} }
clocksource_calc_mult_shift(&wrcs_cs, WRCS_FREQUENCY, 1);
/* Fire the timer */ /* Fire the timer */
mod_timer(&wrcs_timer, jiffies + HZ); mod_timer(&wrcs_timer, jiffies + HZ);
return 0; return 0;
......
...@@ -20,10 +20,19 @@ ...@@ -20,10 +20,19 @@
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/irqdomain.h>
#include "wr-nic.h" #include "wr-nic.h"
#include "nic-mem.h" #include "nic-mem.h"
/**
* IRQ domain to be used. This is static here but in general it should be
* a module parameter or somehow configurable. For the time being we keep
* it hard-coded here.
*/
static const char *irqdomain_name = "htvic-wr-swi.0";
#if WR_IS_NODE /* Our platform_data is different in node vs switch */ #if WR_IS_NODE /* Our platform_data is different in node vs switch */
#include "../spec-nic.h" #include "../spec-nic.h"
static inline struct wrn_dev *wrn_from_pdev(struct platform_device *pdev) static inline struct wrn_dev *wrn_from_pdev(struct platform_device *pdev)
...@@ -42,7 +51,15 @@ static inline struct wrn_dev *wrn_from_pdev(struct platform_device *pdev) ...@@ -42,7 +51,15 @@ static inline struct wrn_dev *wrn_from_pdev(struct platform_device *pdev)
static int wrn_remove(struct platform_device *pdev) static int wrn_remove(struct platform_device *pdev)
{ {
struct wrn_dev *wrn = wrn_from_pdev(pdev); struct wrn_dev *wrn = wrn_from_pdev(pdev);
int i; int i, irq;
struct irq_domain *irqdomain;
irqdomain = irq_find_host((struct device_node *)irqdomain_name);
if (!irqdomain) {
dev_err(&pdev->dev, "The IRQ domain %s does not exist\n",
irqdomain_name);
return -EINVAL;
}
if (WR_IS_SWITCH) { if (WR_IS_SWITCH) {
spin_lock(&wrn->lock); spin_lock(&wrn->lock);
...@@ -71,8 +88,10 @@ static int wrn_remove(struct platform_device *pdev) ...@@ -71,8 +88,10 @@ static int wrn_remove(struct platform_device *pdev)
/* Unregister all interrupts that were registered */ /* Unregister all interrupts that were registered */
for (i = 0; wrn->irq_registered; i++) { for (i = 0; wrn->irq_registered; i++) {
static int irqs[] = WRN_IRQ_NUMBERS; static int irqs[] = WRN_IRQ_NUMBERS;
if (wrn->irq_registered & (1 << i)) if (wrn->irq_registered & (1 << i)) {
free_irq(irqs[i], wrn); irq = irq_find_mapping(irqdomain, irqs[i]);
free_irq(irq, wrn);
}
wrn->irq_registered &= ~(1 << i); wrn->irq_registered &= ~(1 << i);
} }
return 0; return 0;
...@@ -113,12 +132,20 @@ static int wrn_probe(struct platform_device *pdev) ...@@ -113,12 +132,20 @@ static int wrn_probe(struct platform_device *pdev)
struct net_device *netdev; struct net_device *netdev;
struct wrn_ep *ep; struct wrn_ep *ep;
struct wrn_dev *wrn = wrn_from_pdev(pdev); struct wrn_dev *wrn = wrn_from_pdev(pdev);
int i, err = 0; int i, err = 0, irq;
/* Lazily: irqs are not in the resource list */ /* Lazily: irqs are not in the resource list */
static int irqs[] = WRN_IRQ_NUMBERS; static int irqs[] = WRN_IRQ_NUMBERS;
static char *irq_names[] = WRN_IRQ_NAMES; static char *irq_names[] = WRN_IRQ_NAMES;
static irq_handler_t irq_handlers[] = WRN_IRQ_HANDLERS; static irq_handler_t irq_handlers[] = WRN_IRQ_HANDLERS;
struct irq_domain *irqdomain;
irqdomain = irq_find_host((struct device_node *)irqdomain_name);
if (!irqdomain) {
dev_err(&pdev->dev, "The IRQ domain %s does not exist\n",
irqdomain_name);
return -EINVAL;
}
/* No need to lock_irq: we only protect count and continue unlocked */ /* No need to lock_irq: we only protect count and continue unlocked */
if (WR_IS_SWITCH) { if (WR_IS_SWITCH) {
...@@ -148,7 +175,8 @@ static int wrn_probe(struct platform_device *pdev) ...@@ -148,7 +175,8 @@ static int wrn_probe(struct platform_device *pdev)
if (WR_IS_SWITCH) { if (WR_IS_SWITCH) {
/* Register the interrupt handlers (not shared) */ /* Register the interrupt handlers (not shared) */
for (i = 0; i < ARRAY_SIZE(irq_names); i++) { for (i = 0; i < ARRAY_SIZE(irq_names); i++) {
err = request_irq(irqs[i], irq_handlers[i], irq = irq_find_mapping(irqdomain, irqs[i]);
err = request_irq(irq, irq_handlers[i],
IRQF_TRIGGER_LOW, irq_names[i], wrn); IRQF_TRIGGER_LOW, irq_names[i], wrn);
if (err) if (err)
goto out; goto out;
......
...@@ -20,7 +20,7 @@ ...@@ -20,7 +20,7 @@
#define NSEC_PER_TICK (NSEC_PER_SEC / REFCLK_FREQ) #define NSEC_PER_TICK (NSEC_PER_SEC / REFCLK_FREQ)
/* The interrupt is one of those managed by our WRVIC device */ /* The interrupt is one of those managed by our WRVIC device */
#define WRN_IRQ_BASE 192 #define WRN_IRQ_BASE 0
#define WRN_IRQ_NIC (WRN_IRQ_BASE + 0) #define WRN_IRQ_NIC (WRN_IRQ_BASE + 0)
#define WRN_IRQ_TSTAMP (WRN_IRQ_BASE + 1) #define WRN_IRQ_TSTAMP (WRN_IRQ_BASE + 1)
//#define WRN_IRQ_PPSG (WRN_IRQ_BASE + ) //#define WRN_IRQ_PPSG (WRN_IRQ_BASE + )
......
...@@ -28,6 +28,13 @@ ...@@ -28,6 +28,13 @@
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <linux/moduleparam.h> #include <linux/moduleparam.h>
#include <linux/netdevice.h> #include <linux/netdevice.h>
#include <linux/irqdomain.h>
/*
* Ugly trick to be able to use headers that have been moved out
* from mach/ directory
*/
#include <mach/../../at91_aic.h>
#include "../wbgen-regs/pstats-regs.h" #include "../wbgen-regs/pstats-regs.h"
#include "wr_pstats.h" #include "wr_pstats.h"
...@@ -35,6 +42,13 @@ ...@@ -35,6 +42,13 @@
#define pstats_readl(device, r) __raw_readl(&device.regs->r) #define pstats_readl(device, r) __raw_readl(&device.regs->r)
#define pstats_writel(val, device, r) __raw_writel(val, &device.regs->r) #define pstats_writel(val, device, r) __raw_writel(val, &device.regs->r)
/**
* IRQ domain to be used. This is static here but in general it should be
* a module parameter or somehow configurable. For the time being we keep
* it hard-coded here.
*/
static const char *irqdomain_name = "htvic-wr-swi.0";
static int pstats_nports = PSTATS_DEFAULT_NPORTS; static int pstats_nports = PSTATS_DEFAULT_NPORTS;
static uint32_t portmsk; static uint32_t portmsk;
static unsigned int firmware_version; /* FPGA firmware version */ static unsigned int firmware_version; /* FPGA firmware version */
...@@ -436,8 +450,16 @@ static struct ctl_table_header *pstats_header; ...@@ -436,8 +450,16 @@ static struct ctl_table_header *pstats_header;
static int __init pstats_init(void) static int __init pstats_init(void)
{ {
int i, err = 0; int i, err = 0, irq;
unsigned int data; unsigned int data;
struct irq_domain *irqdomain;
irqdomain = irq_find_host((struct device_node *)irqdomain_name);
if (!irqdomain) {
pr_err("pstat: The IRQ domain %s does not exist\n",
irqdomain_name);
return -EINVAL;
}
if (pstats_nports > PSTATS_MAX_NPORTS) { if (pstats_nports > PSTATS_MAX_NPORTS) {
printk(KERN_ERR "%s: Too many ports for pstats %u," printk(KERN_ERR "%s: Too many ports for pstats %u,"
...@@ -525,7 +547,8 @@ static int __init pstats_init(void) ...@@ -525,7 +547,8 @@ static int __init pstats_init(void)
/*request pstats IRQ*/ /*request pstats IRQ*/
pstats_irq_disable(PSTATS_ALL_MSK); pstats_irq_disable(PSTATS_ALL_MSK);
err = request_irq(WRVIC_BASE_IRQ+WR_PSTATS_IRQ, pstats_irq_handler, irq = irq_find_mapping(irqdomain, WR_PSTATS_IRQ);
err = request_irq(irq, pstats_irq_handler,
IRQF_SHARED, "wr_pstats", &pstats_dev); IRQF_SHARED, "wr_pstats", &pstats_dev);
if (err) { if (err) {
printk(KERN_ERR "%s: cannot request interrupt\n", printk(KERN_ERR "%s: cannot request interrupt\n",
...@@ -553,8 +576,19 @@ err_exit: ...@@ -553,8 +576,19 @@ err_exit:
static void __exit pstats_exit(void) static void __exit pstats_exit(void)
{ {
int irq;
struct irq_domain *irqdomain;
pstats_irq_disable(PSTATS_ALL_MSK); pstats_irq_disable(PSTATS_ALL_MSK);
free_irq(WRVIC_BASE_IRQ+WR_PSTATS_IRQ, &pstats_dev);
irqdomain = irq_find_host((struct device_node *)irqdomain_name);
if (!irqdomain) {
pr_err("pstat: The IRQ domain %s does not exist\n",
irqdomain_name);
} else {
irq = irq_find_mapping(irqdomain, WR_PSTATS_IRQ);
free_irq(irq, &pstats_dev);
}
wr_nic_pstats_callback = NULL; wr_nic_pstats_callback = NULL;
......
...@@ -39,6 +39,13 @@ ...@@ -39,6 +39,13 @@
#include <linux/wait.h> #include <linux/wait.h>
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/irqdomain.h>
/*
* Ugly trick to be able to use headers that have been moved out
* from mach/ directory
*/
#include <mach/../../at91_aic.h>
#include "../wbgen-regs/rtu-regs.h" #include "../wbgen-regs/rtu-regs.h"
#include "wr_rtu.h" #include "wr_rtu.h"
...@@ -64,6 +71,13 @@ static struct RTU_WB __iomem *regs; ...@@ -64,6 +71,13 @@ static struct RTU_WB __iomem *regs;
#define wr_rtu_readl(r) __raw_readl(&regs->r); #define wr_rtu_readl(r) __raw_readl(&regs->r);
#define wr_rtu_writel(val, r) __raw_writel(val, &regs->r); #define wr_rtu_writel(val, r) __raw_writel(val, &regs->r);
/**
* IRQ domain to be used. This is static here but in general it should be
* a module parameter or somehow configurable. For the time being we keep
* it hard-coded here.
*/
static const char *irqdomain_name = "htvic-wr-swi.0";
static void wr_rtu_enable_irq(void) static void wr_rtu_enable_irq(void)
{ {
wr_rtu_writel(RTU_EIC_IER_NEMPTY, EIC_IER); wr_rtu_writel(RTU_EIC_IER_NEMPTY, EIC_IER);
...@@ -153,6 +167,15 @@ static struct miscdevice wr_rtu_misc = { ...@@ -153,6 +167,15 @@ static struct miscdevice wr_rtu_misc = {
static int __init wr_rtu_init(void) static int __init wr_rtu_init(void)
{ {
int err; int err;
int irq;
struct irq_domain *irqdomain;
irqdomain = irq_find_host((struct device_node *)irqdomain_name);
if (!irqdomain) {
pr_err("pstat: The IRQ domain %s does not exist\n",
irqdomain_name);
return -EINVAL;
}
// register misc device // register misc device
err = misc_register(&wr_rtu_misc); err = misc_register(&wr_rtu_misc);
...@@ -176,9 +199,8 @@ static int __init wr_rtu_init(void) ...@@ -176,9 +199,8 @@ static int __init wr_rtu_init(void)
// register interrupt handler // register interrupt handler
wr_rtu_disable_irq(); wr_rtu_disable_irq();
err = request_irq( irq = irq_find_mapping(irqdomain, WR_RTU_IRQ);
WRVIC_BASE_IRQ + WR_RTU_IRQ, err = request_irq(irq, wr_rtu_interrupt,
wr_rtu_interrupt,
IRQF_SHARED, IRQF_SHARED,
"wr-rtu", "wr-rtu",
(void*)regs (void*)regs
...@@ -203,10 +225,20 @@ static int __init wr_rtu_init(void) ...@@ -203,10 +225,20 @@ static int __init wr_rtu_init(void)
static void __exit wr_rtu_exit(void) static void __exit wr_rtu_exit(void)
{ {
int irq;
struct irq_domain *irqdomain;
// disable RTU interrupts // disable RTU interrupts
wr_rtu_disable_irq(); wr_rtu_disable_irq();
// Unregister IRQ handler // Unregister IRQ handler
free_irq(WRVIC_BASE_IRQ + WR_RTU_IRQ, (void*)regs); irqdomain = irq_find_host((struct device_node *)irqdomain_name);
if (!irqdomain) {
pr_err("pstat: The IRQ domain %s does not exist\n",
irqdomain_name);
} else {
irq = irq_find_mapping(irqdomain, WR_RTU_IRQ);
free_irq(irq, (void*)regs);
}
// Unmap RTU memory // Unmap RTU memory
iounmap(regs); iounmap(regs);
// Unregister misc device driver // Unregister misc device driver
......
obj-m := wr_vic.o
export ARCH ?= arm
export CROSS_COMPILE ?= $(CROSS_COMPILE_ARM)
all modules:
$(MAKE) CONFIG_DEBUG_SECTION_MISMATCH=y \
-C $(LINUX) SUBDIRS=$(shell /bin/pwd) modules
# We might "$(MAKE) -C $(LINUX)" but "make clean" with no LINUX defined
# is sometimes useful to have
clean:
rm -f *.mod.c *.o *.ko .*cmd Module.symvers modules.order
rm -rf .tmp_versions
White Rabbit MCH Vectored Interrupt Controller driver
------
This driver adds support for the Interrupt Controller in the main FPGA
of White Rabbit MCH. The VIC multiplexes 32 source interrupts into
single interrupt CPU interrupt line (AT91SAM9263_ID_IRQ0).
The implementation has been redone as an irq_chip structure,
to integrate in the official kernel API. When porting to the next
kernel version it will be moved to the kernel patch-set; currently
is is a module we should load before the minic.
There are two patches for 2.6.35, though. One increases the
number of available interrupts, as the default in 2.6.35 doesn't
allow for external multiplexers to fit. The other exports two symbols
that are only available for stuff in the kernel proper. We'll remove that
patch when moving our wrvic in 2.6.36 proper.
/*
* VIC controller, as implemented in FPGA in the White Rabbit switch
*
* Copyright (c) 2009, 2010 CERN
* Author: Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
* Author: Alessandro Rubini <rubini@gnudd.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
//#include <linux/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#define DRV_NAME "wr_vic"
#define PFX DRV_NAME ": "
#define WRVIC_NR_IRQS 32 /* We have 32 possible interrupt sources */
/* The following stanza comes from <mach/irq.h>: */
/*
* IRQ interrupt symbols are the AT91xxx_ID_* symbols
* for IRQs handled directly through the AIC, or else the AT91_PIN_*
* symbols in gpio.h for ones handled indirectly as GPIOs.
* We make provision for 5 banks of GPIO.
#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
*/
/* Therefore, we must have a bigger NR_IRQS and can't work otherwise */
#if NR_IRQS < (NR_AIC_IRQS + (5 * 32) + WRVIC_NR_IRQS)
#error "Please fix the kernel to allow for WR-VIC interrupts"
#endif
#define WRVIC_BASE_IRQ (NR_AIC_IRQS + (5 * 32)) /* top of GPIO interrupts */
/*
* What follows is header-like material, but we need no header for
* external modules. Thus all defines are kept here to avoid confusion.
*/
#define FPGA_BASE_WRVIC 0x10050000
#define FPGA_SIZE_WRVIC 0x00001000
struct wrvic_regs {
u32 reg_ctl; /* [0x00]: WRVIC Control Register */
u32 reg_risr; /* [0x04]: Raw Interrupt Status Register */
u32 reg_ier; /* [0x08]: Interrupt Enable Register */
u32 reg_idr; /* [0x0c]: Interrupt Disable Register */
u32 reg_imr; /* [0x10]: Interrupt Mask Register */
u32 reg_var; /* [0x14]: Vector Address Register */
u32 reg_swtrig; /* [0x18]: Software-trigger of IRQ */
u32 reg_eoir; /* [0x1c]: End Of Irq Ack Register */
u32 unused1[((0x80-0x20)/4)];
u32 vector[WRVIC_NR_IRQS];
};
static struct wrvic_regs __iomem *wrvic_regs;
int enabled_irqs[WRVIC_NR_IRQS];
#define WRVIC_CTL_ENABLE (1<<0)
#define WRVIC_CTL_POL (1<<1)
#define WRVIC_SPURIOUS_IRQ 0x12345678 /* A diagnostic help */
#define wrvic_readl(r) __raw_readl(&wrvic_regs->r);
#define wrvic_writel(val, r) __raw_writel(val, &wrvic_regs->r);
static void wrvic_handler(unsigned int irq, struct irq_desc *desc);
/* We only have two methods: unmask (enable) and mask (disable) */
static void wrvic_irq_unmask(struct irq_data *d)
{
int irq = d->irq - WRVIC_BASE_IRQ;
wrvic_writel(irq, vector[irq]);
wrvic_writel(1 << irq, reg_ier);
enabled_irqs[irq] = 1;
irq_set_irq_type(AT91SAM9G45_ID_IRQ0, IRQF_TRIGGER_LOW); /* FIXME: needed? */
/* Enable. "CTL_POL" is 0 which means active low (falling) */
wrvic_writel(WRVIC_CTL_ENABLE, reg_ctl);
}
static void wrvic_irq_mask(struct irq_data *d)
{
int irq = d->irq;
int i;
irq -= WRVIC_BASE_IRQ;
wrvic_writel( 1 << irq, reg_idr);
wrvic_writel(WRVIC_SPURIOUS_IRQ, vector[irq]);
enabled_irqs[irq] = 0;
/* FIXME: find a better way to detect we have no more */
for(i=0;i<WRVIC_NR_IRQS;i++)
if(enabled_irqs[i])
return;
printk("wr-vic: No enabled interrupts left, disabling master IRQ.\n");
irq_set_chained_handler(AT91SAM9G45_ID_IRQ0, handle_bad_irq);
}
static struct irq_chip wrvic_irqchip = {
.name = "WR-VIC",
.irq_mask = wrvic_irq_mask,
.irq_unmask = wrvic_irq_unmask,
};
static void wrvic_handler(unsigned int irq, struct irq_desc *desc)
{
u32 pending = wrvic_readl(reg_var);
if (pending == WRVIC_SPURIOUS_IRQ) {
printk(KERN_ERR PFX "spurious interrupt\n");
wrvic_writel(0, reg_eoir); /* clear pending flag */
return;
}
generic_handle_irq(WRVIC_BASE_IRQ + pending);
wrvic_writel(0, reg_eoir); /* clear pending flag */
}
int __init wrvic_init(void)
{
int i;
wrvic_regs = ioremap(FPGA_BASE_WRVIC, FPGA_SIZE_WRVIC);
if (!wrvic_regs)
return -ENOMEM;
/* First, prime the WRVIC with "invalid" vectors and disable all irq */
for (i = 0; i < WRVIC_NR_IRQS; i++)
{
wrvic_writel(WRVIC_SPURIOUS_IRQ, vector[i]);
enabled_irqs[i] = 0;
}
wrvic_writel(~0, reg_idr);
for(i = WRVIC_BASE_IRQ; i <= WRVIC_BASE_IRQ + WRVIC_NR_IRQS; i++) {
irq_set_chip_and_handler(i, &wrvic_irqchip, handle_level_irq);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
}
irq_set_chained_handler(AT91SAM9G45_ID_IRQ0, wrvic_handler);
irq_set_irq_type(AT91SAM9G45_ID_IRQ0, IRQF_TRIGGER_LOW);
/* Enable. "CTL_POL" is 0 which means active low (falling) */
wrvic_writel(WRVIC_CTL_ENABLE, reg_ctl);
return 0;
}
module_init(wrvic_init);
/* no exit is expected */
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("White Rabbit Vectored Interrupt Controller");
ccflags-y += -Werror
obj-m := wrs_devices.o
LINUX ?= /lib/modules/$(shell uname -r)/build
export ARCH ?= arm
export CROSS_COMPILE ?= $(CROSS_COMPILE_ARM)
all: modules
modules:
$(MAKE) -C $(LINUX) M=$(shell /bin/pwd)
clean:
$(MAKE) -C $(LINUX) M=$(shell /bin/pwd) clean
gtags:
gtags --statistics
.PHONY: all clean gtags
/**
* Copyright CERN (c) 2016
* Federico Vaga <federico.vaga@cern.ch>
* License GPL v2
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <mach/at91sam9g45.h>
/*
* Ugly trick to be able to use headers that have been moved out
* from mach/ directory
*/
#include <mach/../../at91_aic.h>
#define WR_IS_NODE 0
#define WR_IS_SWITCH 1
#include "../wr_nic/nic-hardware.h" /* Magic numbers: please fix them as needed */
#define FPGA_BASE_WRVIC 0x10050000
#define FPGA_SIZE_WRVIC 0x00001000
static struct resource wrs_vic_resources[] = {
[0] = {
.start = FPGA_BASE_WRVIC,
.end = FPGA_BASE_WRVIC + FPGA_SIZE_WRVIC - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_IRQ0,
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_IRQ0,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
/* FIXME is it really HIGHLEVEL ? */
},
};
static struct platform_device wrs_vic_device = {
.name = "htvic-wr-swi",
.id = 0,
.resource = wrs_vic_resources,
.num_resources = ARRAY_SIZE(wrs_vic_resources),
};
#if 0
static struct resource wrs_nic_recources[] = {
/* Memory */
{
.name = "wrs-mem-nic",
.start = FPGA_BASE_NIC,
.end = FPGA_BASE_NIC + FPGA_SIZE_NIC - 1,
.flags = IORESOURCE_MEM,
}, {
.name = "wrs-mem-ep",
.start = FPGA_BASE_EP,
.end = FPGA_BASE_EP + FPGA_SIZE_EP - 1,
.flags = IORESOURCE_MEM,
}, {
.name = "wrs-mem-ts",
.start = FPGA_BASE_TS,
.end = FPGA_BASE_TS + FPGA_SIZE_TS - 1,
.flags = IORESOURCE_MEM,
}, {
.name = "wrs-mem-ppsg",
.start = FPGA_BASE_PPSG,
.end = FPGA_BASE_PPSG + FPGA_SIZE_PPSG - 1,
.flags = IORESOURCE_MEM,
},
/* IRQ from HTVIC */
{
.name = "wr-nic-irq",
.start = 0,
.end = 0,
.flags = IORESOURCE_IRQ,
}, {
.name = "wr-tstamp",
.start = 1,
.end = 1,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device wrs_nic_device = {
.name = "wrs-nic",
.id = 0,
.resource = wrs_nic_recources,
.num_resources = ARRAY_SIZE(wrs_nic_recources),
};
#endif
static int wrs_devices_init(void)
{
int err;
err = platform_device_register(&wrs_vic_device);
if (err)
return err;
#if 0 /* perhaps we enable it in the future */
err = platform_device_register(&wrs_nic_device);
if (err)
return err;
#endif
return 0;
}
static void wrs_devices_exit(void)
{
#if 0
platform_device_unregister(&wrs_nic_device);
#endif
platform_device_unregister(&wrs_vic_device);
}
module_init(wrs_devices_init);
module_exit(wrs_devices_exit);
MODULE_LICENSE("GPL");
From 95648bc0194a8a284b87b5555314f53e166a46f9 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Wed, 14 Sep 2011 11:23:29 +0200
Subject: [PATCH] wrs3 changes to g45ek
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 36 +++++++++++++++++++++++++++++++
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 6c999db..d0e1e67 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -420,6 +420,42 @@ static void __init ek_board_init(void)
/* LEDs */
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));
+
+ { /* Configure the EBI1 pins for the wr switch */
+ int i;
+
+ /* PC16..31: periphA as EBI1_D16..31 */
+ for (i = AT91_PIN_PC16; i <= AT91_PIN_PC31; i++)
+ at91_set_A_periph(i, 0);
+ /* PC2 and PC3 too: EBI1_A19 EBI1_A20 */
+ at91_set_A_periph(AT91_PIN_PC2, 0);
+ at91_set_A_periph(AT91_PIN_PC3, 0);
+
+ /* FIXME: We should pull rst high for when it is programmed */
+
+ /* Then, write the EBI1 configuration (NCS0 == 0x1000.0000) */
+ at91_sys_write(AT91_SMC_SETUP(0),
+ AT91_SMC_NWESETUP_(4) |
+ AT91_SMC_NCS_WRSETUP_(2) |
+ AT91_SMC_NRDSETUP_(4) |
+ AT91_SMC_NCS_RDSETUP_(2));
+ at91_sys_write(AT91_SMC_PULSE(0),
+ AT91_SMC_NWEPULSE_(30) |
+ AT91_SMC_NCS_WRPULSE_(34) |
+ AT91_SMC_NRDPULSE_(30) |
+ AT91_SMC_NCS_RDPULSE_(34));
+ at91_sys_write(AT91_SMC_CYCLE(0),
+ AT91_SMC_NWECYCLE_(40) |
+ AT91_SMC_NRDCYCLE_(40));
+ at91_sys_write(AT91_SMC_MODE(0),
+ AT91_SMC_DBW_32 |
+ AT91_SMC_TDF_(0) |
+ AT91_SMC_READMODE |
+ AT91_SMC_WRITEMODE);
+
+
+ }
+
}
MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
--
1.7.0.4
From 282dc8c6f8082ce6ce249363a5a1cc80a047c01a Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 17 Jan 2012 17:16:20 +0100
Subject: [PATCH 3/3] at91 NR_IRQS: increase by 64 to fit custom muxes
---
arch/arm/mach-at91/include/mach/irqs.h | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h
index 36bd55f..04a080c 100644
--- a/arch/arm/mach-at91/include/mach/irqs.h
+++ b/arch/arm/mach-at91/include/mach/irqs.h
@@ -40,7 +40,11 @@
* symbols in gpio.h for ones handled indirectly as GPIOs.
* We make provision for 5 banks of GPIO.
*/
-#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
+#if 0
+ #define NR_IRQS (NR_AIC_IRQS + (5 * 32))
+#else /* Actually, we want to allow a pair of board-specific multiplexers */
+ #define NR_IRQS (NR_AIC_IRQS + (5 * 32) + (2 * 32))
+#endif
/* FIQ is AIC source 0. */
#define FIQ_START AT91_ID_FIQ
--
1.7.7.2
From 5a7166ccf11ae171cfd305d1b771035c4ccf2c20 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 17 Jan 2012 17:48:50 +0100
Subject: [PATCH 4/4] irq: export symbols for external irq controller
---
arch/arm/kernel/irq.c | 1 +
kernel/irq/chip.c | 1 +
kernel/irq/handle.c | 2 ++
kernel/irq/irqdesc.c | 2 ++
4 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 83bbad0..4a7f8aa 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -115,6 +115,7 @@ void set_irq_flags(unsigned int irq, unsigned int iflags)
/* Order is clear bits in "clr" then set bits in "set" */
irq_modify_status(irq, clr, set & ~clr);
}
+EXPORT_SYMBOL_GPL(set_irq_flags); /* for external irq controllers */
void __init init_IRQ(void)
{
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index 4af1e2b..ced43d9 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -587,6 +587,7 @@ irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
irq_set_chip(irq, chip);
__irq_set_handler(irq, handle, 0, name);
}
+EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
{
diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c
index 90cb55f..4d0421e 100644
--- a/kernel/irq/handle.c
+++ b/kernel/irq/handle.c
@@ -13,6 +13,7 @@
#include <linux/irq.h>
#include <linux/random.h>
#include <linux/sched.h>
+#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
@@ -33,6 +34,7 @@ void handle_bad_irq(unsigned int irq, struct irq_desc *desc)
kstat_incr_irqs_this_cpu(irq, desc);
ack_bad_irq(irq);
}
+EXPORT_SYMBOL_GPL(handle_bad_irq);
/*
* Special, empty irq handler:
diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c
index 2c039c9..d902ebf 100644
--- a/kernel/irq/irqdesc.c
+++ b/kernel/irq/irqdesc.c
@@ -110,6 +110,7 @@ struct irq_desc *irq_to_desc(unsigned int irq)
{
return radix_tree_lookup(&irq_desc_tree, irq);
}
+EXPORT_SYMBOL_GPL(irq_to_desc);
static void delete_irq_desc(unsigned int irq)
{
@@ -272,6 +273,7 @@ struct irq_desc *irq_to_desc(unsigned int irq)
{
return (irq < NR_IRQS) ? irq_desc + irq : NULL;
}
+EXPORT_SYMBOL_GPL(irq_to_desc);
static void free_desc(unsigned int irq)
{
--
1.7.7.2
From 4815f7ca121792b349d780fe099d1352329a1177 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@unipv.it>
Date: Wed, 27 May 2009 00:44:01 +0200
Subject: [PATCH 6/7] arm fiq: allow modules to exploit the fiq mechanism
This patch exports "fiq_userptr" so that a module can hook to the fiq
handler. This mechanism is used by my "fiq-engine" external package
found in gnudd.com.
To prevent data aborts in vmalloc areas during fiq-mode, vmalloc.c is
modified to update the virtual memory of all processes in map_vm_area().
Without this patch such updates happen on demand, but page faults can't
be managed in fiq mode. Unfortunately, it's #fidef CONFIG_ARM in vmalloc.c
---
arch/arm/kernel/armksyms.c | 6 ++++++
arch/arm/kernel/entry-armv.S | 24 +++++++++++++++++++++++-
mm/vmalloc.c | 37 +++++++++++++++++++++++++++++++++++++
3 files changed, 66 insertions(+), 1 deletions(-)
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index acca35a..667e836 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -49,6 +49,12 @@ extern void __aeabi_ulcmp(void);
extern void fpundefinstr(void);
+/*
+ * for fiq support (code in entry-armv.S -- ARub)
+ */
+extern void (*fiq_userptr)(void);
+EXPORT_SYMBOL(fiq_userptr);
+
EXPORT_SYMBOL(__backtrace);
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index e8d8856..9a7b4c8 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -1178,9 +1178,31 @@ __stubs_start:
* other mode than FIQ... Ok you can switch to another mode, but you can't
* get out of that mode without clobbering one register.
*/
+/* ARub: try to use it instead (we won't leave FIQ mode anyway) */
vector_fiq:
- disable_fiq
+ ldr r9, 1f
+ ldr r9, [r9]
+ movs r9, r9
+ beq fiq_ret
+ mov r8, lr
+ mov lr, pc
+ mov pc, r9 /* jump to userptr */
+ mov lr, r8
+fiq_ret:
subs pc, lr, #4
+fiq_savemm:
+ .long 0
+
+
+
+1: .long fiq_userptr
+
+.section .text /* can't live here... */
+.globl fiq_userptr
+fiq_userptr:
+ .long 0 /* This must save r0..r8 inclusive */
+.previous
+
/*=============================================================================
* Address exception handler
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index 5d60302..536c2d6 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -1258,6 +1258,43 @@ int map_vm_area(struct vm_struct *area, pgprot_t prot, struct page ***pages)
err = 0;
}
+/*
+ * In order to support installation of a non-trivial FIQ handler, on ARM
+ * we need to replicate kernel virtual memory to all processes (so it
+ * can be accessed from fiq state irrespective of what current process is).
+ * The code comes from do_translation_fault, and is arm-specific.
+ */
+#ifdef CONFIG_ARM
+ if (!err) {
+ struct task_struct *p;
+ for_each_process(p) {
+ task_lock(p);
+ if (!p->mm)
+ goto next_process;
+ if (p->mm == &init_mm)
+ goto next_process;
+ for (addr = (unsigned long)area->addr;
+ addr < end; addr += PAGE_SIZE) {
+ /* "+= PMD_SIZE" may be faster... */
+ unsigned int index;
+ pgd_t *pgd, *pgd_k;
+ pmd_t *pmd, *pmd_k;
+ /* from do_translation_fault() */
+ index = pgd_index(addr);
+ pgd = p->mm->pgd + index;
+ pgd_k = init_mm.pgd + index;
+ if (!pgd_present(*pgd))
+ set_pgd(pgd, *pgd_k);
+ pmd_k = pmd_offset(pgd_k, addr);
+ pmd = pmd_offset(pgd, addr);
+ copy_pmd(pmd, pmd_k);
+ }
+ next_process:
+ task_unlock(p);
+ }
+ }
+#endif
+
return err;
}
EXPORT_SYMBOL_GPL(map_vm_area);
--
1.7.7.2
From 424c448cb23511056074cda16f2e330a1f395e60 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Mon, 6 Aug 2012 12:00:27 +0200
Subject: [PATCH 7/7] mtd/nand: sam9g45 can hwecc like 9263
---
drivers/mtd/nand/Kconfig | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index edec457..06aaaa6 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -357,7 +357,7 @@ choice
config MTD_NAND_ATMEL_ECC_HW
bool "Hardware ECC"
- depends on ARCH_AT91SAM9263 || ARCH_AT91SAM9260 || AVR32
+ depends on ARCH_AT91SAM9263 || ARCH_AT91SAM9260 || AVR32 || ARCH_AT91SAM9G45
help
Use hardware ECC instead of software ECC when the chip
supports it.
--
1.7.7.2
From 111a2f978f9e3271ed9e0a62e391e9d81d393d62 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 7 Aug 2012 12:42:36 +0200
Subject: [PATCH 8/8] wrs3: use correct nand partitioning
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 21 ++++++++++++++++-----
1 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 8df2e47..d40aa3c 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -131,13 +131,24 @@ static struct at91_eth_data __initdata ek_macb_data = {
*/
static struct mtd_partition __initdata ek_nand_partition[] = {
{
- .name = "Partition 1",
- .offset = 0,
- .size = SZ_64M,
+ .name = "Kernel",
+ .offset = 1 << 20,
+ .size = SZ_8M,
},
{
- .name = "Partition 2",
- .offset = MTDPART_OFS_NXTBLK,
+ .name = "Filesystem", /* We _want_ this to be mtd1 */
+ .offset = 64 << 20,
+ .size = SZ_128M,
+ },
+ {
+ .name = "Barebox Environment",
+ .offset = 256 << 10,
+ .size = SZ_256K,
+ },
+ /* This is actuallywas MTDPART_OFS_APPEND over the filesystem */
+ {
+ .name = "Available",
+ .offset = (128+64) << 20,
.size = MTDPART_SIZ_FULL,
},
};
--
1.7.7.2
From 382270adecef6b4950ecaa459c50ec725c2985b3 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Sat, 21 Jun 2014 08:48:04 +0200
Subject: [PATCH 11/12] sam9m10g45ek (for wrs): final partitions for V4.1
This changes the partitions in an incompatible way: then NAND
now has one partition for barebox environment (1M: 5 blocks to
protect against bad blocks) and one big partition fro UBI volumes.
Real stuff is then split in UBI volumes. Please see documentation
(in a later commit) for details.
And hwinfo is not read-only, as we need to change it sometimes.
Though rarely.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 18 +++++++-----------
1 files changed, 7 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index afc6418..6ad8462 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -26,6 +26,7 @@
#include <linux/clk.h>
#include <linux/atmel-mci.h>
#include <linux/spi/flash.h>
+#include <linux/mtd/mtd.h>
#include <mach/hardware.h>
#include <video/atmel_lcdc.h>
@@ -106,6 +107,11 @@ static struct mtd_partition wrs_df_parts[] = {
.size = 0x8400,
},
{
+ .name = "hwinfo",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x840,
+ },
+ {
.name = "Available-dataflash",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
@@ -167,18 +173,8 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
.size = SZ_1M,
},
{
- .name = "Kernel",
+ .name = "UBIfied-NAND",
.offset = 1 << 20,
- .size = SZ_8M,
- },
- {
- .name = "Filesystem", /* We _want_ this to be mtd1 */
- .offset = 64 << 20,
- .size = SZ_128M,
- },
- {
- .name = "Available-nand",
- .offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
--
1.7.7.2
From f5eb5f7891907414caccd1d82c7171bdfafe7900 Mon Sep 17 00:00:00 2001
From: Adam Wujek <adam.wujek@cern.ch>
Date: Wed, 18 May 2016 09:22:55 +0200
Subject: [PATCH] kernel: remove deprecated use of defined in
kernel/timeconst.pl
Fix the warning (for perl < 5.21.x) whihch becomes an error
(for perl >= 5.21.x):
defined(@array) is deprecated at kernel/timeconst.pl line 373.
(Maybe you should just omit the defined()?)
Signed-off-by: Adam Wujek <adam.wujek@cern.ch>
---
kernel/timeconst.pl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/timeconst.pl b/kernel/timeconst.pl
index eb51d76..0461239 100644
--- a/kernel/timeconst.pl
+++ b/kernel/timeconst.pl
@@ -370,7 +370,7 @@ if ($hz eq '--can') {
}
@val = @{$canned_values{$hz}};
- if (!defined(@val)) {
+ if (!@val) {
@val = compute_values($hz);
}
output($hz, @val);
--
1.9.1
From 4e4080233a2843d405a8c0574209a8245baa7de5 Mon Sep 17 00:00:00 2001 From 18ec233fbabab2b296ad0ed2a41ceda0cafb5b59 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com> From: Alessandro Rubini <rubini@gnudd.com>
Date: Sat, 20 Nov 2010 13:15:48 +0100 Date: Sat, 20 Nov 2010 13:15:48 +0100
Subject: [PATCH] initramfs: stop after one cpio archive Subject: [PATCH 1/9] initramfs: stop after one cpio archive
Update to 3.16.37
=================
This patch has been ported from 2.6.39.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
--- ---
init/initramfs.c | 1 + init/initramfs.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-) 1 file changed, 1 insertion(+)
diff --git a/init/initramfs.c b/init/initramfs.c diff --git a/init/initramfs.c b/init/initramfs.c
index 4b9c202..9b446ff 100644 index a8497fa..619187f 100644
--- a/init/initramfs.c --- a/init/initramfs.c
+++ b/init/initramfs.c +++ b/init/initramfs.c
@@ -461,6 +461,7 @@ static char * __init unpack_to_rootfs(char *buf, unsigned len) @@ -472,6 +472,7 @@ static char * __init unpack_to_rootfs(char *buf, unsigned len)
error("junk in compressed archive"); error("junk in compressed archive");
if (state != Reset) if (state != Reset)
error("junk in compressed archive"); error("junk in compressed archive");
...@@ -20,5 +26,5 @@ index 4b9c202..9b446ff 100644 ...@@ -20,5 +26,5 @@ index 4b9c202..9b446ff 100644
buf += my_inptr; buf += my_inptr;
len -= my_inptr; len -= my_inptr;
-- --
1.5.6.5 2.7.4
From a19927112db5173ce8f93728672042070f38ebbb Mon Sep 17 00:00:00 2001 From f544884365b48caa5b35e369a1386bfbb237517a Mon Sep 17 00:00:00 2001
From: Benoit Rat <benoit@sevensols.com> From: Benoit Rat <benoit@sevensols.com>
Date: Tue, 9 Sep 2014 19:08:11 +0200 Date: Fri, 14 Oct 2016 10:16:25 +0200
Subject: [PATCH] mtd_dataflash: Read EDI bytes in JEDEC to support AT45DB641E Subject: [PATCH 2/8] mtd_dataflash: Read EDI bytes in JEDEC to support
AT45DB641E
Standard JEDEC ID is only 24bits to identify a DF chip. Standard JEDEC ID is only 24bits to identify a DF chip.
...@@ -12,15 +13,22 @@ difference between AT45DB641E and AT45DB642D is made by byte 4). ...@@ -12,15 +13,22 @@ difference between AT45DB641E and AT45DB642D is made by byte 4).
We have had two new fields in the struct flash_info: We have had two new fields in the struct flash_info:
* edi_nbytes: number of optional bytes to read (1 or 2) * edi_nbytes: number of optional bytes to read (1 or 2)
* edi_jedec: EDI value for a given chip * edi_jedec: EDI value for a given chip
Update to 3.16.37
=================
This patch has been ported from 2.6.39.
Signed-off-by: Benoit Rat <benoit@sevensols.com>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
--- ---
drivers/mtd/devices/mtd_dataflash.c | 101 ++++++++++++++++++++++-------------- drivers/mtd/devices/mtd_dataflash.c | 100 +++++++++++++++++++++++-------------
1 file changed, 62 insertions(+), 39 deletions(-) 1 file changed, 63 insertions(+), 37 deletions(-)
diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c
index c5015cc..42588e3 100644 index dd22ce2..3cb38d2 100644
--- a/drivers/mtd/devices/mtd_dataflash.c --- a/drivers/mtd/devices/mtd_dataflash.c
+++ b/drivers/mtd/devices/mtd_dataflash.c +++ b/drivers/mtd/devices/mtd_dataflash.c
@@ -735,6 +735,12 @@ struct flash_info { @@ -698,6 +698,13 @@ struct flash_info {
uint16_t pageoffset; uint16_t pageoffset;
uint16_t flags; uint16_t flags;
...@@ -28,19 +36,19 @@ index c5015cc..42588e3 100644 ...@@ -28,19 +36,19 @@ index c5015cc..42588e3 100644
+ /* JEDEC has an optional Extended Device Info (EDI) on bytes + /* JEDEC has an optional Extended Device Info (EDI) on bytes
+ * 4 and/or 5 that need to be read to differentiate some DF chips + * 4 and/or 5 that need to be read to differentiate some DF chips
+ */ + */
+ uint8_t edi_nbytes; + uint8_t edi_nbytes;
+ uint16_t edi_jedec; + uint16_t edi_jedec;
+
#define SUP_POW2PS 0x0002 /* supports 2^N byte pages */ #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
#define IS_POW2PS 0x0001 /* uses 2^N byte pages */ #define IS_POW2PS 0x0001 /* uses 2^N byte pages */
}; };
@@ -750,36 +756,40 @@ static struct flash_info __devinitdata dataflash_data [] = { @@ -713,36 +720,40 @@ static struct flash_info dataflash_data[] = {
* These newer chips also support 128-byte security registers (with * These newer chips also support 128-byte security registers (with
* 64 bytes one-time-programmable) and software write-protection. * 64 bytes one-time-programmable) and software write-protection.
*/ */
- { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS}, - { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
- { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
+ { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS, 0, 0x0}, + { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS, 0, 0x0},
+ { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS, 0, 0x0}, { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
- { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS}, - { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
- { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS}, - { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
...@@ -72,14 +80,14 @@ index c5015cc..42588e3 100644 ...@@ -72,14 +80,14 @@ index c5015cc..42588e3 100644
- { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS}, - { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
- { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, - { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
+ { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS,1, 0x0}, + { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS, 1, 0x0},
+ { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS,1, 0x0}, + { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS, 1, 0x0},
+ +
+ { "AT45DB641E", 0x1f2800, 32768, 264, 9, SUP_POW2PS,1, 0x1}, + { "AT45DB641E", 0x1f2800, 32768, 264, 9, SUP_POW2PS, 1, 0x1},
+ { "at45db641e", 0x1f2800, 32768, 256, 8, SUP_POW2PS | IS_POW2PS,1, 0x1}, + { "at45db641e", 0x1f2800, 32768, 256, 8, SUP_POW2PS | IS_POW2PS, 1, 0x1},
}; };
static struct flash_info *__devinit jedec_probe(struct spi_device *spi) static struct flash_info *jedec_probe(struct spi_device *spi)
{ {
int tmp; int tmp;
uint8_t code = OP_READ_ID; uint8_t code = OP_READ_ID;
...@@ -90,30 +98,30 @@ index c5015cc..42588e3 100644 ...@@ -90,30 +98,30 @@ index c5015cc..42588e3 100644
struct flash_info *info; struct flash_info *info;
int status; int status;
@@ -791,7 +801,7 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi) @@ -754,7 +765,7 @@ static struct flash_info *jedec_probe(struct spi_device *spi)
* That's not an error; only rev C and newer chips handle it, and * That's not an error; only rev C and newer chips handle it, and
* only Atmel sells these chips. * only Atmel sells these chips.
*/ */
- tmp = spi_write_then_read(spi, &code, 1, id, 3); - tmp = spi_write_then_read(spi, &code, 1, id, 3);
+ tmp = spi_write_then_read(spi, &code, 1, id, 5); + tmp = spi_write_then_read(spi, &code, 1, id, 5);
if (tmp < 0) { if (tmp < 0) {
DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n", pr_debug("%s: error %d reading JEDEC ID\n",
dev_name(&spi->dev), tmp); dev_name(&spi->dev), tmp);
@@ -805,33 +815,40 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi) @@ -769,31 +780,39 @@ static struct flash_info *jedec_probe(struct spi_device *spi)
jedec |= id[1];
jedec = jedec << 8; jedec = jedec << 8;
jedec |= id[2]; jedec |= id[2];
+
+ //EDI bytes to support newest chips + /* EDI bytes to support newest chips */
+ jedec_edi = id[3]; + jedec_edi = id[3];
+ jedec_edi = jedec_edi << 8; + jedec_edi = jedec_edi << 8;
+ jedec_edi |= id[4]; + jedec_edi |= id[4];
+
+
for (tmp = 0, info = dataflash_data; for (tmp = 0, info = dataflash_data;
tmp < ARRAY_SIZE(dataflash_data); tmp < ARRAY_SIZE(dataflash_data);
tmp++, info++) { tmp++, info++) {
if (info->jedec_id == jedec) { if (info->jedec_id == jedec) {
- DEBUG(MTD_DEBUG_LEVEL1, "%s: OTP, sector protect%s\n", - pr_debug("%s: OTP, sector protect%s\n",
- dev_name(&spi->dev), - dev_name(&spi->dev),
- (info->flags & SUP_POW2PS) - (info->flags & SUP_POW2PS)
- ? ", binary pagesize" : "" - ? ", binary pagesize" : ""
...@@ -121,8 +129,7 @@ index c5015cc..42588e3 100644 ...@@ -121,8 +129,7 @@ index c5015cc..42588e3 100644
- if (info->flags & SUP_POW2PS) { - if (info->flags & SUP_POW2PS) {
- status = dataflash_status(spi); - status = dataflash_status(spi);
- if (status < 0) { - if (status < 0) {
- DEBUG(MTD_DEBUG_LEVEL1, - pr_debug("%s: status error %d\n",
- "%s: status error %d\n",
- dev_name(&spi->dev), status); - dev_name(&spi->dev), status);
- return ERR_PTR(status); - return ERR_PTR(status);
- } - }
...@@ -135,18 +142,17 @@ index c5015cc..42588e3 100644 ...@@ -135,18 +142,17 @@ index c5015cc..42588e3 100644
- } - }
- } else - } else
- return info; - return info;
+ if (info->edi_jedec == (jedec_edi >> (16-8*info->edi_nbytes))) { + if (info->edi_jedec == (jedec_edi >> (16 - 8 * info->edi_nbytes))) {
+ DEBUG(MTD_DEBUG_LEVEL1, "%s: OTP, sector protect%s\n", + pr_debug("%s: OTP, sector protect%s\n",
+ dev_name(&spi->dev), + dev_name(&spi->dev),
+ (info->flags & SUP_POW2PS) + (info->flags & SUP_POW2PS)
+ ? ", binary pagesize" : "" + ? ", binary pagesize" : ""
+ ); + );
+ if (info->flags & SUP_POW2PS) { + if (info->flags & SUP_POW2PS) {
+ status = dataflash_status(spi); + status = dataflash_status(spi);
+ if (status < 0) { + if (status < 0) {
+ DEBUG(MTD_DEBUG_LEVEL1, + pr_debug("%s: status error %d\n",
+ "%s: status error %d\n", + dev_name(&spi->dev), status);
+ dev_name(&spi->dev), status);
+ return ERR_PTR(status); + return ERR_PTR(status);
+ } + }
+ if (status & 0x1) { + if (status & 0x1) {
...@@ -162,26 +168,27 @@ index c5015cc..42588e3 100644 ...@@ -162,26 +168,27 @@ index c5015cc..42588e3 100644
} }
} }
@@ -857,6 +874,7 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi) @@ -819,6 +838,7 @@ static struct flash_info *jedec_probe(struct spi_device *spi)
* AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
* AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
* AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
+ * AT45DB0641E 64Mbit (8M) xx111xxx (0x3c) 32768 264 9 + * AT45DB0641E 64Mbit (8M) xx111xxx (0x3c) 32768 264 9
*/ */
static int __devinit dataflash_probe(struct spi_device *spi) static int dataflash_probe(struct spi_device *spi)
{ {
@@ -871,6 +889,11 @@ static int __devinit dataflash_probe(struct spi_device *spi) @@ -833,6 +853,12 @@ static int dataflash_probe(struct spi_device *spi)
* write procedures. * write procedures.
*/ */
info = jedec_probe(spi); info = jedec_probe(spi);
+ +
+ printk("MTD: %s 0x%08x %d %d %d %x\n", + printk("MTD: %s 0x%08x %d %d %d %x\n",
+ info->name,info->jedec_id, + info->name,info->jedec_id,
+ info->nr_pages,info->pagesize,info->pageoffset,info->flags); + info->nr_pages,info->pagesize,info->pageoffset,info->flags);
+
+ +
if (IS_ERR(info)) if (IS_ERR(info))
return PTR_ERR(info); return PTR_ERR(info);
if (info != NULL) if (info != NULL)
-- --
1.9.1 2.7.4
From d77686b1021c98a971ff3aadb8269540bdb46dd2 Mon Sep 17 00:00:00 2001 From 6e431fcaed49be557b0721e6f9f4f22151a74838 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tomasz=20W=C5=82ostowski?= <tomasz.wlostowski@cern.ch> From: Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
Date: Thu, 31 May 2012 13:26:20 +0200 Date: Thu, 31 May 2012 13:26:20 +0200
Subject: [PATCH 5/8] Change Vbus pin Subject: [PATCH 3/8] wr-switch (sam9m10g45ek): change USB vbus_pin from PB19
to PB8
We are builing our environment on top of the sam9m10g45
evaluation-kit board. In the EK design the pin PB19 is used
but on the switch we use PB8.
Signed-off-by: Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
--- ---
arch/arm/mach-at91/board-sam9m10g45ek.c | 2 +- arch/arm/mach-at91/board-sam9m10g45ek.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-) 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index d0e1e67..8df2e47 100644 index 74ae268..824ae43 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c --- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -81,7 +81,7 @@ static struct at91_usbh_data __initdata ek_usbh_hs_data = { @@ -74,7 +74,7 @@ static struct at91_usbh_data __initdata ek_usbh_hs_data = {
* USB HS Device port * USB HS Device port
*/ */
static struct usba_platform_data __initdata ek_usba_udc_data = { static struct usba_platform_data __initdata ek_usba_udc_data = {
...@@ -21,5 +28,5 @@ index d0e1e67..8df2e47 100644 ...@@ -21,5 +28,5 @@ index d0e1e67..8df2e47 100644
-- --
1.7.7.2 2.7.4
From eeb910ba9c084ca9dbe7e87f986c2d091538a693 Mon Sep 17 00:00:00 2001
From: Federico Vaga <federico.vaga@cern.ch>
Date: Thu, 27 Oct 2016 14:13:42 +0200
Subject: [PATCH 4/8] wr-switch (sam9m10g45ek): enable FPGA access from EBI1
(SMC)
Configure the EBI1 to in order to be used to access the FPGA
address space.
The EBI1 is, by design, controlled by the Static Memory
Controller (SMC) component.
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 50 +++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 1ea6132..74ae268 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -448,6 +448,53 @@ static struct platform_device *devices[] __initdata = {
#endif
};
+static struct sam9_smc_config __initdata wrs_fpga_smc_config = {
+ .ncs_read_setup = 2,
+ .nrd_setup = 4,
+ .ncs_write_setup = 2,
+ .nwe_setup = 4,
+
+ .ncs_read_pulse = 34,
+ .nrd_pulse = 30,
+ .ncs_write_pulse = 34,
+ .nwe_pulse = 30,
+
+ .read_cycle = 40,
+ .write_cycle = 40,
+
+ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_DBW_32,
+ .tdf_cycles = 0,
+};
+
+/**
+ * Configure the EBI1 pins for the wr switch FPGA
+ *
+ * This enable the External Bus Interface 1 (EBI1) and configure
+ * the Static Memory Controller (SMC) in order to allow the user
+ * to access the FPGA address space at the offset 0x1000000 by
+ * using chip-select 0 [NCS0].
+ *
+ * NCS0 is always and SMC controller, it cannot be configured in
+ * any other ways (pag 162 SAM9G45 datasheet)
+ */
+static void __init wrs_fpga_init(void)
+{
+ int i;
+
+ /* PC16..31: periphA as EBI1_D16..31 */
+ for (i = AT91_PIN_PC16; i <= AT91_PIN_PC31; i++)
+ at91_set_A_periph(i, 0);
+ /* PC2 and PC3 too: EBI1_A19 EBI1_A20 */
+ at91_set_A_periph(AT91_PIN_PC2, 0);
+ at91_set_A_periph(AT91_PIN_PC3, 0);
+
+ /* FIXME: We should pull rst high for when it is programmed */
+
+ /* Then, write the EBI1 configuration (NCS0 == 0x1000.0000) */
+ /*TODO check if the ID 0 is fine */
+ sam9_smc_configure(0, 0, &wrs_fpga_smc_config);
+}
+
static void __init ek_board_init(void)
{
/* Serial */
@@ -487,6 +534,9 @@ static void __init ek_board_init(void)
/* LEDs */
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));
+
+ wrs_fpga_init();
+
/* Other platform devices */
platform_add_devices(devices, ARRAY_SIZE(devices));
}
--
2.7.4
From 76e58431485ad6b9d78eb0eec449c723dec1ecff Mon Sep 17 00:00:00 2001 From 068d6e63814ec292b1e886a2570bb90390c7dc64 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com> From: Alessandro Rubini <rubini@gnudd.com>
Date: Thu, 19 Jun 2014 11:42:41 +0200 Date: Tue, 7 Aug 2012 12:42:36 +0200
Subject: [PATCH 10/10] sam9m10g45ek (for wrs): new partitioning Subject: [PATCH 5/8] wr-switch (sam9m10g45ek): store device partitioning
This moves environment to the first meg of nand so we can later ubify It prepare partitions in the dataflash to reflect actual
the rest of the nand memory. Such placement if compatible with
current partitioning, which is unchanged.
Also, it prepare partitions in the dataflash, to reflect actual
placement of the stuff and ease replacing barebox or at91boot from a placement of the stuff and ease replacing barebox or at91boot from a
running system (useful for me and Benoit for release work, nobody else running system (useful for release work, nobody else is expected to
is expected to change dataflash). change dataflash).
The NAND has one partition for barebox environment (1M: 5 blocks to
protect against bad blocks) and one big partition fro UBI volumes.
Real stuff is then split in UBI volumes. Please see documentation
(in a later commit) for details.
And hwinfo is not read-only, as we need to change it sometimes.
Though rarely.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
--- ---
arch/arm/mach-at91/board-sam9m10g45ek.c | 46 +++++++++++++++++++++++++----- arch/arm/mach-at91/board-sam9m10g45ek.c | 47 +++++++++++++++++++++++++++++----
1 files changed, 38 insertions(+), 8 deletions(-) 1 file changed, 42 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index d40aa3c..afc6418 100644 index 824ae43..ebd8ebd 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c --- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -25,6 +25,7 @@ @@ -25,6 +25,8 @@
#include <linux/input.h>
#include <linux/leds.h> #include <linux/leds.h>
#include <linux/clk.h>
#include <linux/atmel-mci.h> #include <linux/atmel-mci.h>
+#include <linux/spi/flash.h> +#include <linux/spi/flash.h>
+#include <linux/mtd/mtd.h>
#include <linux/delay.h>
#include <mach/hardware.h> #include <linux/platform_data/at91_adc.h>
#include <video/atmel_lcdc.h> @@ -81,12 +83,47 @@ static struct usba_platform_data __initdata ek_usba_udc_data = {
@@ -88,12 +89,42 @@ static struct usba_platform_data __initdata ek_usba_udc_data = {
/* /*
* SPI devices. * SPI devices.
*/ */
+static struct mtd_partition wrs_df_parts[] = { +static struct mtd_partition wrs_df_parts[] = {
+ { + {
+ .name = "at91boot", + .name = "at91boot",
+ .offset = 0, + .offset = 0,
+ .size = 0x8400, + .size = 0x8400,
+ }, + },
+ { + {
+ .name = "Barebox", + .name = "Barebox",
+ .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND,
+ .size = 0x84000, + .size = 0x84000,
+ }, + },
+ { + {
+ .name = "Barebox-Environment", + .name = "Barebox-Environment",
+ .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND,
+ .size = 0x8400, + .size = 0x8400,
+ }, + },
+ { + {
+ .name = "Available-dataflash", + .name = "hwinfo",
+ .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL, + .size = 0x840,
+ },
+ {
+ .name = "Available-dataflash",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ }, + },
+}; +};
+ +
...@@ -68,39 +79,29 @@ index d40aa3c..afc6418 100644 ...@@ -68,39 +79,29 @@ index d40aa3c..afc6418 100644
.chip_select = 0, .chip_select = 0,
.max_speed_hz = 15 * 1000 * 1000, .max_speed_hz = 15 * 1000 * 1000,
.bus_num = 0, .bus_num = 0,
+ .platform_data = &wrs_df_pdata, + .platform_data = &wrs_df_pdata,
}, },
}; };
@@ -131,6 +162,11 @@ static struct at91_eth_data __initdata ek_macb_data = { @@ -125,13 +162,13 @@ static struct macb_platform_data __initdata ek_macb_data = {
*/ */
static struct mtd_partition __initdata ek_nand_partition[] = { static struct mtd_partition __initdata ek_nand_partition[] = {
{ {
+ .name = "Barebox-environment-backup", - .name = "Partition 1",
+ .offset = 0, - .offset = 0,
+ .size = SZ_1M, - .size = SZ_64M,
+ }, + .name = "Barebox-environment-backup",
+ { + .offset = 0,
.name = "Kernel", + .size = SZ_1M,
.offset = 1 << 20,
.size = SZ_8M,
@@ -141,14 +177,8 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
.size = SZ_128M,
}, },
{ {
- .name = "Barebox Environment", - .name = "Partition 2",
- .offset = 256 << 10, - .offset = MTDPART_OFS_NXTBLK,
- .size = SZ_256K, + .name = "UBIfied-NAND",
- }, + .offset = 1 << 20,
- /* This is actuallywas MTDPART_OFS_APPEND over the filesystem */
- {
- .name = "Available",
- .offset = (128+64) << 20,
+ .name = "Available-nand",
+ .offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL, .size = MTDPART_SIZ_FULL,
}, },
}; };
-- --
1.7.7.2 2.7.4
From fe419a23b22d588864496bd38b42c96617a6fe6c Mon Sep 17 00:00:00 2001 From bfb2592942a4e490cf8b6530dfbf16ece33d5767 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com> From: Alessandro Rubini <rubini@gnudd.com>
Date: Mon, 28 Jul 2014 15:20:59 +0200 Date: Mon, 28 Jul 2014 15:20:59 +0200
Subject: [PATCH 12/12] sam9m10g45ek (for wrs): more relaxed nand timings Subject: [PATCH 6/8] wr-switch (sam9m10g45ek): more relaxed nand timings
Update to 3.16.37
=================
This patch has been ported from 2.6.39.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
--- ---
arch/arm/mach-at91/board-sam9m10g45ek.c | 14 +++++++------- arch/arm/mach-at91/board-sam9m10g45ek.c | 14 +++++++-------
1 files changed, 7 insertions(+), 7 deletions(-) 1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 2eb70d5..a6e5c67 100644 index ebd8ebd..5686a87 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c --- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -194,21 +194,21 @@ static struct atmel_nand_data __initdata ek_nand_data = { @@ -187,21 +187,21 @@ static struct atmel_nand_data __initdata ek_nand_data = {
}; };
static struct sam9_smc_config __initdata ek_nand_smc_config = { static struct sam9_smc_config __initdata ek_nand_smc_config = {
...@@ -42,5 +47,5 @@ index 2eb70d5..a6e5c67 100644 ...@@ -42,5 +47,5 @@ index 2eb70d5..a6e5c67 100644
static void __init ek_add_device_nand(void) static void __init ek_add_device_nand(void)
-- --
1.7.7.2 2.7.4
From dd4abd9483cdb6bc31cba97763028770cabbfed0 Mon Sep 17 00:00:00 2001 From 71546ce5ad13e8c2f7de155cc8a17dada9028839 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com> From: Alessandro Rubini <rubini@gnudd.com>
Date: Fri, 28 Nov 2014 14:18:27 +0100 Date: Fri, 28 Nov 2014 14:18:27 +0100
Subject: [PATCH 14/14] sam9m10g45ek (for wrs): provide bootcount using Subject: [PATCH 7/8] wr-switch (sam9m10g45ek): provide bootcount using scratch
scratch registers registers
Update to 3.16.37
=================
This patch has been ported from 2.6.39.
The functions at91_sys_read/write() have been removed
by the patch 8c428b8d33. Use __raw_readl/writel() and reproduce
the original behavior
The patch b3af8b49be changes the address to the GPBR. To solve this
I created a GPBR resource and mapped it
Signed-off-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
--- ---
arch/arm/kernel/process.c | 13 ++++ arch/arm/kernel/process.c | 15 +++++
arch/arm/mach-at91/Makefile | 1 + arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/wrs-bootcount.c | 109 ++++++++++++++++++++++++++++++++++++ arch/arm/mach-at91/wrs-bootcount.c | 122 +++++++++++++++++++++++++++++++++++++
3 files changed, 123 insertions(+), 0 deletions(-) 3 files changed, 138 insertions(+)
create mode 100644 arch/arm/mach-at91/wrs-bootcount.c create mode 100644 arch/arm/mach-at91/wrs-bootcount.c
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 5e1e541..720d1e1 100644 index 3f688b7..c8cff71 100644
--- a/arch/arm/kernel/process.c --- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c
@@ -93,6 +93,19 @@ __setup("hlt", hlt_setup); @@ -41,6 +41,7 @@
#include <asm/system_misc.h>
#include <asm/mach/time.h>
#include <asm/tls.h>
+#include <mach/hardware.h>
#include "reboot.h"
#ifdef CONFIG_CC_STACKPROTECTOR
@@ -117,6 +118,20 @@ void _soft_restart(unsigned long addr, bool disable_l2)
void arm_machine_restart(char mode, const char *cmd) static void null_restart(enum reboot_mode reboot_mode, const char *cmd)
{ {
+ uint32_t gpbr_val; + uint32_t gpbr_val;
+ char *gpbr_str = (void *)&gpbr_val; + char *gpbr_str = (void *)&gpbr_val;
+ unsigned short *gpbr_short = (void *)&gpbr_val; + unsigned short *gpbr_short = (void *)&gpbr_val;
+ void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
+ unsigned long gpbr = AT91SAM9G45_BASE_GPBR - AT91_BASE_SYS;
+ +
+ /* WRS: Change the static registers. See wrs-bootcount.c for details */ + /* WRS: Change the static registers. See wrs-bootcount.c for details */
+ gpbr_val = at91_sys_read(AT91_GPBR); + gpbr_val = __raw_readl(addr + gpbr);
+ gpbr_str[3] = 'R'; /* reboot requested by user */ + gpbr_str[3] = 'R'; /* reboot requested by user */
+ at91_sys_write(AT91_GPBR, gpbr_val); + __raw_writel(gpbr_val, addr + gpbr);
+ +
+ gpbr_val = at91_sys_read(AT91_GPBR + 4); + gpbr_val = __raw_readl(addr + gpbr + 4);
+ gpbr_short[1]++; /* count the user-requeted reboots */ + gpbr_short[1]++; /* count the user-requeted reboots */
+ at91_sys_write(AT91_GPBR + 4, gpbr_val); + __raw_writel(gpbr_val, addr + gpbr + 4);
+ }
/* Disable interrupts first */
local_irq_disable(); void soft_restart(unsigned long addr)
local_fiq_disable();
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index a83835e..f1db0b2 100644 index 78e9cec..7d385bc 100644
--- a/arch/arm/mach-at91/Makefile --- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile
@@ -74,6 +74,7 @@ obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o @@ -80,6 +80,7 @@ obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
# AT91SAM9G45 board-specific support # AT91SAM9G45 board-specific support
obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
+obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += wrs-bootcount.o +obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += wrs-bootcount.o
# AT91CAP9 board-specific support # AT91SAM board with device-tree
obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o
diff --git a/arch/arm/mach-at91/wrs-bootcount.c b/arch/arm/mach-at91/wrs-bootcount.c diff --git a/arch/arm/mach-at91/wrs-bootcount.c b/arch/arm/mach-at91/wrs-bootcount.c
new file mode 100644 new file mode 100644
index 0000000..9088377 index 0000000..c4305b9
--- /dev/null --- /dev/null
+++ b/arch/arm/mach-at91/wrs-bootcount.c +++ b/arch/arm/mach-at91/wrs-bootcount.c
@@ -0,0 +1,109 @@ @@ -0,0 +1,122 @@
+/* Alessandro Rubini for CERN 2014 */ +/* Alessandro Rubini for CERN 2014 */
+#include <linux/kernel.h> +#include <linux/kernel.h>
+#include <linux/init.h> +#include <linux/init.h>
+#include <linux/proc_fs.h> +#include <linux/proc_fs.h>
+#include <linux/seq_file.h> +#include <linux/seq_file.h>
+#include <linux/io.h> +#include <linux/io.h>
+#include <linux/ioport.h>
+ +
+#include <mach/hardware.h> +#include <mach/hardware.h>
+#include <asm/mach/map.h> +#include <asm/mach/map.h>
...@@ -107,10 +129,22 @@ index 0000000..9088377 ...@@ -107,10 +129,22 @@ index 0000000..9088377
+ __raw_writel(s[i], d + i); + __raw_writel(s[i], d + i);
+} +}
+ +
+/**
+ * List of necessary resources
+ */
+static struct resource wrs_r[] = {
+ {
+ .name = "GPBR",
+ .start = AT91SAM9G45_BASE_GPBR,
+ .end = AT91SAM9G45_BASE_GPBR + 0x10,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+/* As soon as possible, copy stuff over */ +/* As soon as possible, copy stuff over */
+static int __init wrs_bc_early_init(void) +static int __init wrs_bc_early_init(void)
+{ +{
+ bc_regs = (void __iomem *)AT91_VA_BASE_SYS + AT91_GPBR; + bc_regs = ioremap(wrs_r[0].start, resource_size(&wrs_r[0]));
+ copy16_fromio(bc_hw, bc_regs); + copy16_fromio(bc_hw, bc_regs);
+ +
+ if (strncmp(bc_hw->magic, "WRS", 3)) /* power on */ + if (strncmp(bc_hw->magic, "WRS", 3)) /* power on */
...@@ -164,5 +198,5 @@ index 0000000..9088377 ...@@ -164,5 +198,5 @@ index 0000000..9088377
+} +}
+module_init(proc_wrs_bc_init); +module_init(proc_wrs_bc_init);
-- --
1.7.7.2 2.7.4
From 1402207cdb93a0f12ef5b544184c17b35d4ffd12 Mon Sep 17 00:00:00 2001 From 036bcbd702ca7129ce72871b62c67291022ae6f4 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com> From: Federico Vaga <federico.vaga@cern.ch>
Date: Tue, 17 Jun 2014 10:47:30 +0200 Date: Thu, 13 Oct 2016 17:06:35 +0200
Subject: [PATCH 9/9] at91 udc: force full speed Subject: [PATCH 8/8] wr-switch (at91 udc): force full speed
Some WRS speciments won't work correctly with automatic speed setup. Some WRS speciments won't work correctly with automatic speed setup.
This patch forces full-speed on the device (instead of the This patch forces full-speed on the device (instead of the
...@@ -9,16 +9,21 @@ autodetected high-speed), and thus they work. ...@@ -9,16 +9,21 @@ autodetected high-speed), and thus they work.
Speed is not a problem anyways, because it is just a serial port. Speed is not a problem anyways, because it is just a serial port.
Update to 3.16.37
=================
This patch has been ported from 2.6.39.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
--- ---
drivers/usb/gadget/atmel_usba_udc.c | 7 +++++-- drivers/usb/gadget/atmel_usba_udc.c | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-) 1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index e7c65a4..bd6ccfb 100644 index 892bd97..34b0e87 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c --- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c +++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -1158,12 +1158,12 @@ static int do_test_mode(struct usba_udc *udc) @@ -1149,12 +1149,12 @@ static int do_test_mode(struct usba_udc *udc)
break; break;
case 0x0300: case 0x0300:
/* /*
...@@ -26,14 +31,14 @@ index e7c65a4..bd6ccfb 100644 ...@@ -26,14 +31,14 @@ index e7c65a4..bd6ccfb 100644
+ * Test_SE0_NAK: Force full-speed mode and set up ep0 + * Test_SE0_NAK: Force full-speed mode and set up ep0
* for Bulk IN transfers * for Bulk IN transfers
*/ */
ep = &usba_ep[0]; ep = &udc->usba_ep[0];
usba_writel(udc, TST, usba_writel(udc, TST,
- USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH)); - USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
+ USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_FULL)); + USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_FULL));
usba_ep_writel(ep, CFG, usba_ep_writel(ep, CFG,
USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
| USBA_EPT_DIR_IN | USBA_EPT_DIR_IN
@@ -1832,6 +1832,9 @@ int usb_gadget_probe_driver(struct usb_gadget_driver *driver, @@ -1812,6 +1812,9 @@ static int atmel_usba_start(struct usb_gadget *gadget,
toggle_bias(1); toggle_bias(1);
usba_writel(udc, CTRL, USBA_ENABLE_MASK); usba_writel(udc, CTRL, USBA_ENABLE_MASK);
usba_writel(udc, INT_ENB, USBA_END_OF_RESET); usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
...@@ -44,5 +49,5 @@ index e7c65a4..bd6ccfb 100644 ...@@ -44,5 +49,5 @@ index e7c65a4..bd6ccfb 100644
spin_unlock_irqrestore(&udc->lock, flags); spin_unlock_irqrestore(&udc->lock, flags);
-- --
1.7.7.2 2.7.4
From 5a22a53c8403160bcc345877f3dd1249405e1cc8 Mon Sep 17 00:00:00 2001
From: Federico Vaga <federico.vaga@cern.ch>
Date: Wed, 9 Nov 2016 15:24:45 +0100
Subject: [PATCH] hack architecture to boot on our boot-loader
The boot-loader is based on the PMG45 architecture which does not
exists on the kernel side, which is then based on the SAM9M10G45EK.
For some reason this combination was working with kernel 2.6.39, but
now it does not.
Fixing the bootloader, in order to be based on the SAM9M10G45EK board
as the kernel, requires much more effort for a little practical gain.
The main problem is that the 3.16.37 kernel refues to boot since the
boot-loader declares that the board in use is a PMG45 and not a SAM9M10EK
as expected by the kernel. In order to make the kernel boot we have to
provide this information:
armlinux_architecture
armlinux_system_rev
armlinux_system_serial
This can be done by changing the boot-loader environment variables.
However, on switches that use custom environment variables stored in the
flash it can lead to the situation that the new kernel won't boot.
The issue is quickly fixed by this patch that changes the identification
number for the SAM9M10G45EK to the one for the PMG45 architecture declared
in the boot-loader.
The patch also hard-code the NAND bus width which should be taken
dynamically from the armlinux_system_rev. But, for the same reason, the
wrong architecture provides wrong values.
This choice give us the freedom to update the kernel without changing the
boot-loader nor bootloader's environment . This means that for whatever
eason we will be able to easily switch from 2.6.39 to 3.16.37 for debugging
purpose.
Acked-by: Adam Wujek <adam.wujek@cern.ch>
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 4 ++--
arch/arm/tools/mach-types | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 5686a87..894ed23 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -206,7 +206,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
static void __init ek_add_device_nand(void)
{
- ek_nand_data.bus_width_16 = board_have_nand_16bit();
+ ek_nand_data.bus_width_16 = 1;
/* setup bus-width (8 or 16) */
if (ek_nand_data.bus_width_16)
ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
@@ -578,7 +578,7 @@ static void __init ek_board_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
}
-MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
+MACHINE_START(PM9G45, "Atmel AT91SAM9M10G45-EK")
/* Maintainer: Atmel */
.init_time = at91sam926x_pit_init,
.map_io = at91_map_io,
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index a10297d..399392f 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -457,6 +457,7 @@ mityomapl138 MACH_MITYOMAPL138 MITYOMAPL138 2650
guruplug MACH_GURUPLUG GURUPLUG 2659
spear310 MACH_SPEAR310 SPEAR310 2660
spear320 MACH_SPEAR320 SPEAR320 2661
+pm9g45 MACH_PM9G45 PM9G45 2672
aquila MACH_AQUILA AQUILA 2676
esata_sheevaplug MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678
msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679
--
2.7.4
From 882cefc0c65c424e6f080b00e77465cadbe777c6 Mon Sep 17 00:00:00 2001
From: Adam Wujek <adam.wujek@cern.ch>
Date: Thu, 24 Nov 2016 17:06:13 +0100
Subject: [PATCH] disable BBT for the nand flash
Disable the Bad Block Table (BBT) because the BBT uses the 4 last PEBs of
nand flash, which overwrites UBIFS.
BBT was disabled in the old kernel. There is not so much performance penalty
due to that (see the last sentence in the citation below). There is no impact
on the reliability of a flash because this is just a table of bad blocks which
is otherwise recreated in the ram at every boot.
The MTD layer supplies upper layers (including UBI) with information about bad
PEBs. It keeps so-called bad block table in RAM, which is usually 1 bit per PEB.
When the driver initializes, it has to build this table by scanning whole flash
media, which normally includes reading OOB area of 1st NAND page of each PEB.
This takes time and may be improved by using on-flash BBT (bad block table).
In this case the bad PEB map is stored on flash and MTD does not have to do any
scanning. See the NAND_USE_FLASH_BBT constant in the Linux source codes. But
note, bad PEB scanning is usually minor comparing to the UBI scan time, so
on-flash BBT is not probably going to give much.
(http://www.linux-mtd.infradead.org/faq/ubi.html#L_attach_faster)
Signed-off-by: Adam Wujek <adam.wujek@cern.ch>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 5686a87..59fe03d 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -181,7 +181,9 @@ static struct atmel_nand_data __initdata ek_nand_data = {
.enable_pin = AT91_PIN_PC14,
.det_pin = -EINVAL,
.ecc_mode = NAND_ECC_SOFT,
- .on_flash_bbt = 1,
+ .on_flash_bbt = 0, /* Disable the BBT since it uses 4 last PEBs in
+ the nand, which are used by the ubifs already.
+ It does not decrease in the reliability. */
.parts = ek_nand_partition,
.num_parts = ARRAY_SIZE(ek_nand_partition),
};
--
1.9.1
...@@ -8,7 +8,6 @@ ...@@ -8,7 +8,6 @@
#include <inttypes.h> #include <inttypes.h>
#include <fcntl.h> #include <fcntl.h>
#include <mach/at91_pmc.h>
#include <mach/at91_pio.h> #include <mach/at91_pio.h>
#include <libwr/pio.h> #include <libwr/pio.h>
......
...@@ -16,6 +16,10 @@ if [ -n "$WRS_VERBOSE" ]; then ...@@ -16,6 +16,10 @@ if [ -n "$WRS_VERBOSE" ]; then
fi fi
# This used to be S01modules # This used to be S01modules
insmod /lib/modules/`uname -r`/kernel/libcomposite.ko
insmod /lib/modules/`uname -r`/kernel/u_serial.ko
insmod /lib/modules/`uname -r`/kernel/usb_f_acm.ko
insmod /lib/modules/`uname -r`/kernel/g_serial.ko insmod /lib/modules/`uname -r`/kernel/g_serial.ko
rmmod g_serial rmmod g_serial
insmod /lib/modules/`uname -r`/kernel/g_serial.ko insmod /lib/modules/`uname -r`/kernel/g_serial.ko
......
...@@ -90,7 +90,8 @@ else ...@@ -90,7 +90,8 @@ else
fi fi
insmod $WR_HOME/lib/modules/wr_vic.ko insmod $WR_HOME/lib/modules/htvic.ko
insmod $WR_HOME/lib/modules/wrs_devices.ko
insmod $WR_HOME/lib/modules/wr-nic.ko macaddr=$val insmod $WR_HOME/lib/modules/wr-nic.ko macaddr=$val
insmod $WR_HOME/lib/modules/wr_rtu.ko insmod $WR_HOME/lib/modules/wr_rtu.ko
insmod $WR_HOME/lib/modules/wr_pstats.ko pstats_nports=18 insmod $WR_HOME/lib/modules/wr_pstats.ko pstats_nports=18
......
...@@ -77,9 +77,12 @@ static struct wrs_km_item kernel_modules[] = { ...@@ -77,9 +77,12 @@ static struct wrs_km_item kernel_modules[] = {
[1] = {"wr_pstats"}, [1] = {"wr_pstats"},
[2] = {"wr_rtu"}, [2] = {"wr_rtu"},
[3] = {"wr_nic"}, [3] = {"wr_nic"},
[4] = {"wr_vic"}, [4] = {"wrs_devices"},
[5] = {"at91_softpwm"}, [5] = {"htvic"},
[6] = {"g_serial"}, [6] = {"g_serial"},
[7] = {"usb_f_acm"},
[8] = {"u_serial"},
[9] = {"libcomposite"},
}; };
/* user space daemon list item */ /* user space daemon list item */
......
...@@ -29,7 +29,6 @@ OBJDUMP = $(CROSS_COMPILE)objdump ...@@ -29,7 +29,6 @@ OBJDUMP = $(CROSS_COMPILE)objdump
# LOTs of includes # LOTs of includes
CFLAGS = -O2 -g -Wall \ CFLAGS = -O2 -g -Wall \
-Wstrict-prototypes \ -Wstrict-prototypes \
-I$(LINUX)/include \
-I$(LINUX)/arch/arm/mach-at91/include \ -I$(LINUX)/arch/arm/mach-at91/include \
-I../wrsw_rtud \ -I../wrsw_rtud \
-I../mini-rpc \ -I../mini-rpc \
......
...@@ -23,8 +23,6 @@ ...@@ -23,8 +23,6 @@
#include <mach/at91sam9g45.h> #include <mach/at91sam9g45.h>
#include <mach/at91_pio.h> #include <mach/at91_pio.h>
#include <mach/at91_ssc.h>
#include <mach/at91_pmc.h>
#include <libwr/util.h> #include <libwr/util.h>
...@@ -34,8 +32,46 @@ ...@@ -34,8 +32,46 @@
static unsigned char *bstream; static unsigned char *bstream;
/* FIXME definitions from kernel 2.6.39 - read commit message */
#define AT91SAM9G45_PERIPH (0xFFF78000)
#define AT91SAM9G45_SSC0 (0xFFF9C000)
#define AT91_SSC_CR 0x00
#define AT91_SSC_RXEN (1 << 0) /* Receive Enable */
#define AT91_SSC_RXDIS (1 << 1) /* Receive Disable */
#define AT91_SSC_TXEN (1 << 8) /* Transmit Enable */
#define AT91_SSC_TXDIS (1 << 9) /* Transmit Disable */
#define AT91_SSC_SWRST (1 << 15) /* Software Reset */
#define AT91_SSC_CMR 0x04 /* Clock Mode Register */
#define AT91_SSC_CMR_DIV (0xfff << 0) /* Clock Divider */
#define AT91_SSC_RCMR 0x10 /* Receive Clock Mode Register */
#define AT91_SSC_CKS (3 << 0) /* Clock Selection */
#define AT91_SSC_CKS_DIV (0 << 0)
#define AT91_SSC_CKS_CLOCK (1 << 0)
#define AT91_SSC_CKS_PIN (2 << 0)
#define AT91_SSC_RFMR 0x14 /* Receive Frame Mode Register */
#define AT91_SSC_DATALEN (0x1f << 0) /* Data Length */
#define AT91_SSC_LOOP (1 << 5) /* Loop Mode */
#define AT91_SSC_MSBF (1 << 7) /* Most Significant Bit First */
#define AT91_SSC_TCMR 0x18 /* Transmit Clock Mode Register */
#define AT91_SSC_TFMR 0x1c /* Transmit Fram Mode Register */
#define AT91_SSC_DATDEF (1 << 5) /* Data Default Value */
#define AT91_SSC_FSDEN (1 << 23) /* Frame Sync Data Enable */
#define AT91_SSC_THR 0x24 /* Transmit Holding Register */
#define AT91_SSC_SR 0x40 /* Status Register */
#define AT91_SSC_TXRDY (1 << 0) /* Transmit Ready */
#define AT91_SSC_TXEMPTY (1 << 1) /* Transmit Empty */
#define AT91_SYS (0xFFFFE200)
#define AT91_SYS_PIOA (0x1000)
#define AT91_SYS_PMC (0x1A00)
#define AT91_SYS_PMC_PCER (0x10)
/* The address and size of the entire AT91 I/O reg space */ /* The address and size of the entire AT91 I/O reg space */
#define BASE_IOREGS 0xfff78000 #define BASE_IOREGS AT91SAM9G45_PERIPH
#define SIZE_IOREGS 0x88000 #define SIZE_IOREGS 0x88000
enum { enum {
...@@ -48,18 +84,20 @@ enum { ...@@ -48,18 +84,20 @@ enum {
static void *ioregs; static void *ioregs;
#define __PERIPH_FIXUP(__addr) (ioregs - BASE_IOREGS + __addr)
#define AT91_PIOx(port) (AT91_PIOA + AT91_BASE_SYS + 0x200 * port) #define AT91_PIOx(port) (AT91_SYS + AT91_SYS_PIOA + 0x200 * port)
/* macros to access 32-bit registers of various peripherals */ /* macros to access 32-bit registers of various peripherals */
#define __PIO(port, regname) (*(volatile uint32_t *) \ #define __PIO_ADDR(port, regname) (AT91_PIOx(port) + regname)
(ioregs + AT91_PIOx(port) - BASE_IOREGS + regname)) #define __SSC_ADDR(regname) (AT91SAM9G45_SSC0 + regname)
#define __PMC_ADDR(regname) (AT91_SYS + AT91_SYS_PMC + regname)
#define __SSC(regname) (*(volatile uint32_t *) \
(ioregs + (AT91SAM9G45_BASE_SSC0 - BASE_IOREGS) + regname))
#define __PIO(port, regname) (*(volatile uint32_t *) \
(__PERIPH_FIXUP(__PIO_ADDR(port, regname))))
#define __SSC(regname) (*(volatile uint32_t *)(__PERIPH_FIXUP(__SSC_ADDR(regname))))
#define __PMC(regname) \ #define __PMC(regname) \
(*(volatile uint32_t *)(ioregs + (AT91_BASE_SYS - BASE_IOREGS) + regname)) (*(volatile uint32_t *)(__PERIPH_FIXUP(__PMC_ADDR(regname))))
/* Missing SSC reg fields */ /* Missing SSC reg fields */
#define AT91_SSC_CKO_DURING_XFER (2 << 2) #define AT91_SSC_CKO_DURING_XFER (2 << 2)
...@@ -145,7 +183,6 @@ static int load_fpga_child(char *fname) ...@@ -145,7 +183,6 @@ static int load_fpga_child(char *fname)
exit(1); exit(1);
} }
/* /*
* all of this stuff is working on gpio so enable pio, out or in * all of this stuff is working on gpio so enable pio, out or in
*/ */
...@@ -161,7 +198,7 @@ static int load_fpga_child(char *fname) ...@@ -161,7 +198,7 @@ static int load_fpga_child(char *fname)
pio_set(PIO_OER, TD0); pio_set(PIO_OER, TD0);
/* enable SSC controller clock */ /* enable SSC controller clock */
__PMC(AT91_PMC_PCER) = 1<<AT91SAM9G45_ID_SSC0; __PMC(AT91_SYS_PMC_PCER) = (1 << AT91SAM9G45_ID_SSC0);
__SSC(AT91_SSC_CR) = AT91_SSC_SWRST; __SSC(AT91_SSC_CR) = AT91_SSC_SWRST;
__SSC(AT91_SSC_CR) = 0; __SSC(AT91_SSC_CR) = 0;
......
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