#!/bin/bash

slot=$1

# Check we have basic access to the register space over VME
./wr2rf -s $slot hwver

# Initialise the OCXO and PLL. Switch over clocking functions...
./wr2rf -s $slot pll-init

# Dynamically load wrpc-sw to start the WR link
./wr2rf -s $slot fw-load /user/jgill/wrc-wr2rf-enabled-snmp-and-auxdiags.bin 

# sleep until wrpc has started
sleep 1

# Wait for WR link ready
./wr2rf -s $slot wr-wait

# Place the IDELAYCTRL through a reset sequence
./wr2rf -s $slot iodelay-init

# Load the IQ SetPoints
./wr2rf -s $slot dac-iqsetpoint 1 0x4000 0x0 
./wr2rf -s $slot dac-iqsetpoint 2 0x4000 0x0

# Initialise the AD9910 dds to generate the 223.5 MHz required for the mixer
./wr2rf -s $slot dds-init 1

# find the best receiver and validation delays for the dds
./wr2rf -s $slot dds-sync-cal 

# Configure the IQ DACs
./wr2rf -s $slot dac-init 1
./wr2rf -s $slot dac-init 2

# Calibrate the IQ DAC timing delays for SET, HLD, CLK
./wr2rf -s $slot dac-timing 1
./wr2rf -s $slot dac-timing 2

# Configure the output driving the IQ DACs to come from the RFNCO->IQmod block or xilinx DDS test chip
./wr2rf -s $slot dac-iqctrl 1 rfnco
./wr2rf -s $slot dac-iqctrl 2 rfnco

# Select whether you want the source of RFNCO operation to be "network" or "local", default is "local"
./wr2rf -s $slot nco-source network

# Enable RFNCO to receive FTWs via WR
./wr2rf -s $slot nco-wrcfg 1
./wr2rf -s $slot nco-wrcfg 2

# Place the front panel RF MUXes to output the MIXED LO - IQ.
./wr2rf -s $slot set-rfout 1 mix
./wr2rf -s $slot set-rfout 2 mix

# Set the WR fixed latency, unit are WR clock cycles, the clock period is 16 ns
./wr2rf -s $slot wrs-fixedlat 1000

# Set the WR timeout latency, unit are WR clock cycles, the clock period is 16 ns
./wr2rf -s $slot wrs-tolat    2000

# Set the delay point for the trigger unit 1 in both RF channels, sufficiently to guarantee a stable RF signal will be present
./wr2rf -s $slot nco-reset-delay 1 75 7
./wr2rf -s $slot nco-reset-delay 2 75 0

# Configure TMG IO for RF trigger units default operation
# TU starts are input on tmg_clk[2:1]
./wr2rf -s $slot tmgclk-oe   0x0
./wr2rf -s $slot tmgclk-term 0x3

# TU stops are input on tmg_io[2:1] 
# RF sync signals are output on tmg_io[4:3] 
./wr2rf -s $slot tmgio-oe   0xF
./wr2rf -s $slot tmgio-term 0x0

# setup front panel signals
./wr2rf -s $slot api-softstop-sel  1.1
./wr2rf -s $slot api-softstart-sel 1.1

./wr2rf -s $slot lemo-dbg-sel tmgio1 softstop
./wr2rf -s $slot lemo-dbg-sel tmgio2 softstart
./wr2rf -s $slot lemo-dbg-sel tmgio3 nco_reset
./wr2rf -s $slot lemo-dbg-sel tmgio4 rf1_frev

# TIMING DELAYS as observed in 774 lab testing crate - OTHER INSTALLATIONS MAY BE DIFFERENT  
# setup the ioupdate delay 
./wr2rf -s $slot api-dds-ioupdate-delay 2 10

# setup RF1 sync_in delay to trigger unit 1 - WARNING !!! DEPENDS ON FREQUENCY
./wr2rf -s $slot api-nco-reset-delay 1 75 5 0xa

# setup RF1 trig1_out delay to external flip-flop
./wr2rf -s $slot api-vtu-output-pad-delay 1.1 0 0x12

# setup RF1 trig2_out delay to external flip-flop
./wr2rf -s $slot api-vtu-output-pad-delay 1.2 0 0x14

# setup RF2 sync_in delay to trigger unit 1 - WARNING !!! DEPENDS ON FREQUENCY
./wr2rf -s $slot api-nco-reset-delay 2 75 4 0x14

# setup RF2 trig1_out delay to external flip-flop
./wr2rf -s $slot api-vtu-output-pad-delay 2.1 0 0xd

# setup RF2 trig2_out delay to external flip-flop
./wr2rf -s $slot api-vtu-output-pad-delay 2.2 0 0xd

# setup VTU post FF delay for each VTU
./wr2rf -s $slot api-vtu-output-ff-delay 1.1 0 
./wr2rf -s $slot api-vtu-output-ff-delay 1.2 0 
./wr2rf -s $slot api-vtu-output-ff-delay 2.1 0 
./wr2rf -s $slot api-vtu-output-ff-delay 2.2 0 
