set     endcells [get_cells -hier -filter {name=~*sync0_reg               && file_name=~*gc_sync.vhd}]
lappend endcells [get_cells -hier -filter {name=~*sync_posedge.sync0_reg  && file_name=~*gc_sync.vhd}]
lappend endcells [get_cells -hier -filter {name=~*sync_negedge.sync0_reg  && file_name=~*gc_sync.vhd}]
lappend endcells [get_cells -hier -filter {name=~*dat_out_reg[*]          && file_name=~*gc_sync_word_wr.vhd}]
lappend endcells [get_cells -hier -filter {name=~*data_out_o_reg[*]       && file_name=~*gc_sync_word_rd.vhd}]
lappend endcells [get_cells -hier -filter {name=~*sync0_reg               && file_name=~*gc_sync_register.vhd}]
lappend endcells [get_cells -hier -filter {name=~*cnt_in_gray_x_reg[*]    && file_name=~*spll_aligner.vhd}]

# DEBUG
foreach endcell [get_cells $endcells] {
    puts $endcell
}
#return

foreach endcell [get_cells $endcells] {
    set endclks [get_clocks -of_objects [get_cells $endcell]]

    if {$endclks eq ""} {
	puts "ERROR: NO  CLOCK: $endcell"
    } else {
	set endperiods [get_property PERIOD [get_clocks $endclks]]
	set minendperiod [tcl::mathfunc::min {*}$endperiods]
    }

    set endpin $endcell/D
    set startpins [all_fanin -flat -startpoints_only [get_pins $endpin]]
    if {$startpins eq ""} {
	puts "WARNING: NO STARTPIN for: $endpin"
	puts "WARNING: Check startpin is tied-off."
    } else {
        set startclass [get_property CLASS [lindex [all_fanin -flat -startpoints_only [get_pins $endpin]] 0]]
	set startpin [lindex $startpins 0]
	if {$startclass eq "pin"} {
	    set startcell [get_property PARENT_CELL [get_pins $startpin]]
	    set startclks [get_clocks -of_objects [get_cells $startcell]]
	    if {$startclks eq ""} {
		puts "ERROR: NO  CLOCK for $startcell from $endpin"
	    } else {
		set startperiods [get_property PERIOD [get_clocks $startclks]]
		set minstartperiod [tcl::mathfunc::min {*}$startperiods]
		if {$minstartperiod < $minendperiod} {
		    puts "WARNING: trying to synchronize a fast clock domain in slower clock domain"
		    puts "WARNING: startPeriod: $minstartperiod endPeriod: $minendperiod"
		}
		set_max_delay -from $startcell -to $endcell -datapath_only $minendperiod 
		puts "         StartCell: $startcell EndCell: $endcell"
	    }	    
	} elseif { $startclass eq "port"} {
	    set startport [lindex $startpins 0]
	    set startclks [get_clocks -of_objects [get_ports $startport]]
	    if {$startclks eq ""} {
		puts "ERROR: NO  CLOCK for $startport from $endpin"
	    } else {
		set startperiods [get_property PERIOD [get_clocks $startclks]]
		set minstartperiod [tcl::mathfunc::min {*}$startperiods]
		if {$minstartperiod < $minendperiod} {
		    puts "WARNING: trying to synchronize a fast clock domain in slower clock domain"
		    puts "WARNING: StartPeriod: $minstartperiod EndPeriod: $minendperiod"
		}
		set_max_delay -from $startport -to $endcell -datapath_only $minendperiod 
		puts "         StartPort: $startport EndCell: $endcell"
	    }	    

	} else {
	    puts "ERROR: unknown start class $startclass"
	    error
	}
    }	   
}
