To generate the wr2rf_vme fpga design, you must:

- clone the repository and checkout submodules
  $ git clone https://ohwr.org/project/wr2rf-vme.git
  $ cd wr2rf-vme
  $ git submodule init
  $ git submodule update
Be aware that some submodules require access permission from SY-RF. In addtion,
please check the root README, as it contains details to rebuild the RFNCO and IQmod IPcores. 
Normally this isn't required.


- run hdlmake in the current syn directory and generate the list of file
  dependencies - specifically - files.tcl

  $ cd hdl/syn/wr2rf_vme
  $ hdlmake
  $ make files.tcl

- run vivado to progress through the build phases (synth, opt, place, phys_opt
  and route).

  $ vivado -mode tcl -source wr2rf_vme.tcl

- run vivado in a gui mode to interact with the design

  $ vivado -mode gui -source wr2rf_vme.tcl

- To open the design after any checkpoint: wr2rf_vme_synth, _opt, _place, _phys_opt, _route)

  $ vivado wr2rf_vme_route.dcp