trigunit_regs: add more comments.

939c553d · Tristan Gingold · 86c748f3 · 939c553d
Commit 939c553d authored Apr 30, 2020 by Tristan Gingold
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Showing with 10 additions and 4 deletions

trigunit_regs.cheby hdl/rtl/trigunit_regs.cheby +10 -4

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--- a/hdl/rtl/trigunit_regs.cheby
+++ b/hdl/rtl/trigunit_regs.cheby
@@ -19,6 +19,8 @@ memory-map:
    - reg:
        name: status
        description: VTU status
+        comment: >
+          Status register of the VTU.
        width: 16
        access: ro
        x-fesa:
@@ -94,6 +96,8 @@ memory-map:
    - reg:
        name: configOffline
        description: Control signals
+        comment: >
+          The offline registers defines the values for the next start.
        width: 16
        access: rw
        x-fesa:
@@ -132,16 +136,18 @@ memory-map:
          - field:
              name: valid
              description: >
-	        To be set when all offline values are set and coherent.  The
-	        hardware will use them at the next start.  User shouldn't
-		modify the offline values once this bit is set.
+                To be set when all offline values are set and coherent.  The
+                hardware will use them at the next start.  User shouldn't
+                modify the offline values once this bit is set.
              range: 0
              x-hdl:
                type: wire
    - reg:
        name: bValueOffline
        description: Number of RF clock cycles to delay (B)
-        comment: Used in all modes
+        comment: >
+          Used in all modes.  The exact number of cycles depend on the mode,
+          as there is additional constant delay.
        width: 64
        type: unsigned
        access: rw