Commit 456a64e2 authored by li hongming's avatar li hongming

split the ptp mode for dualports.

    command "ptp [mode] [port,df=0]" or "mode [mode] [port,df=0]"
  will set the ptp mode of port.
    Currently, if one port act as slave, its mode should be set
  after other ports.
parent 76260ebe
......@@ -579,7 +579,9 @@ int storage_match_sfp(struct s_sfpinfo *sfp, int port)
sfpcount = sfp_entry(&dbsfp, SFP_GET, i, port);
if (sfpcount <= 0)
return sfpcount;
if (!strncmp(dbsfp.pn, sfp->pn, 16)) {
sfp->port = dbsfp.port;
sfp->dTx = dbsfp.dTx;
sfp->dRx = dbsfp.dRx;
sfp->alpha = dbsfp.alpha;
......
......@@ -19,12 +19,12 @@
#include "storage.h"
/* Calibration data (from EEPROM if available) */
int32_t sfp_alpha[2] = {64398396,-64398396}; /* default values if could not read EEPROM */
int32_t sfp_deltaTx[2] = {0,0};
int32_t sfp_deltaRx[2] = {0,0};
int32_t sfp_in_db[2] = {0,0};
int32_t sfp_alpha[] = {64398396,-64398396}; /* default values if could not read EEPROM */
int32_t sfp_deltaTx[] = {0,0};
int32_t sfp_deltaRx[] = {0,0};
int32_t sfp_in_db[] = {0,0};
char sfp_pn[2][SFP_PN_LEN];
char sfp_pn[wr_num_ports][SFP_PN_LEN];
int sfp_present(int port)
{
......
......@@ -3,7 +3,7 @@
* File : wrc_syscon_regs.h
* Author : auto-generated by wbgen2 from wrc_syscon_wb.wb
* Created : Wed Sep 26 16:28:55 2018
* Created : Tue Oct 2 10:46:20 2018
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wrc_syscon_wb.wb
......@@ -119,12 +119,6 @@
/* definitions for field: FMC I2C bitbanged SDA in reg: GPIO Clear Register */
#define SYSC_GPCR_FMC_SDA WBGEN2_GEN_MASK(3, 1)
/* definitions for field: DP Status LED in reg: GPIO Clear Register */
#define SYSC_GPCR_DP_LED_STAT WBGEN2_GEN_MASK(4, 1)
/* definitions for field: DP Link LED in reg: GPIO Clear Register */
#define SYSC_GPCR_DP_LED_LINK WBGEN2_GEN_MASK(5, 1)
/* definitions for field: SFP I2C bitbanged SCL in reg: GPIO Clear Register */
#define SYSC_GPCR_SFP_SCL WBGEN2_GEN_MASK(8, 1)
......@@ -140,11 +134,17 @@
/* definitions for field: SPI bitbanged MOSI in reg: GPIO Clear Register */
#define SYSC_GPCR_SPI_MOSI WBGEN2_GEN_MASK(12, 1)
/* definitions for field: DP Status LED in reg: GPIO Clear Register */
#define SYSC_GPCR_DP_LED_STAT WBGEN2_GEN_MASK(14, 1)
/* definitions for field: DP Link LED in reg: GPIO Clear Register */
#define SYSC_GPCR_DP_LED_LINK WBGEN2_GEN_MASK(15, 1)
/* definitions for field: DP SFP I2C bitbanged SCL in reg: GPIO Clear Register */
#define SYSC_GPCR_DP_SFP_SCL WBGEN2_GEN_MASK(13, 1)
#define SYSC_GPCR_DP_SFP_SCL WBGEN2_GEN_MASK(17, 1)
/* definitions for field: DP SFP I2C bitbanged SDA in reg: GPIO Clear Register */
#define SYSC_GPCR_DP_SFP_SDA WBGEN2_GEN_MASK(14, 1)
#define SYSC_GPCR_DP_SFP_SDA WBGEN2_GEN_MASK(18, 1)
/* definitions for register: Hardware Feature Register */
......
......@@ -16,7 +16,7 @@
#define SFP_GET 0
#define SFP_ADD 1
extern char sfp_pn[2][SFP_PN_LEN];
extern char sfp_pn[wr_num_ports][SFP_PN_LEN];
extern int32_t sfp_in_db[2];
extern int32_t sfp_alpha[2];
......
......@@ -7,11 +7,11 @@
#define WRC_MODE_SLAVE 3
#define WRC_MODE_ABSCAL 4
extern int ptp_mode;
extern int ptp_mode[wr_num_ports];
int wrc_ptp_init(void);
int wrc_ptp_set_mode(int mode);
int wrc_ptp_get_mode(void);
int wrc_ptp_set_mode(int mode, int port);
int wrc_ptp_get_mode(int port);
int wrc_ptp_start(int port);
int wrc_ptp_stop(int port);
int wrc_ptp_update(void);
......
......@@ -198,6 +198,7 @@ static int rmupdate_poll(void)
uint32_t data_addr;
uint8_t* reg_addr;
int data_size;
int port;
len = ptpd_netif_recvfrom(rmupdate_socket, &addr,
buf, sizeof(buf), NULL, 0);
......@@ -228,7 +229,8 @@ static int rmupdate_poll(void)
switch(type)
{
case FLASH_ERASE:
wrc_ptp_run(0);
for (port = 0; port < wr_num_ports; ++port)
wrc_ptp_run(0,port);
data_addr = (buf[UDP_END+8]<<24)+(buf[UDP_END+9]<<16)+(buf[UDP_END+10]<<8)+buf[UDP_END+11];
data_size = (buf[UDP_END+12]<<24)+(buf[UDP_END+13]<<16)+(buf[UDP_END+14]<<8)+buf[UDP_END+15];
flash_erase(data_addr,data_size);
......
......@@ -41,7 +41,7 @@ extern int32_t sfp_alpha[2];
int wrpc_get_port_state(struct hal_port_state *state, const char *port_name)
{
int port = atoi(&port_name[2]);
int wrc_mode = wrc_ptp_get_mode();
int wrc_mode = wrc_ptp_get_mode(port);
if(port == 0)
if(wrc_mode == WRC_MODE_SLAVE)
......
......@@ -181,7 +181,7 @@ int wrc_mon_gui(void)
if (port==0)
{
switch (ptp_mode) {
switch (ptp_mode[port]) {
case WRC_MODE_GM:
case WRC_MODE_MASTER:
cprintf(C_WHITE, "WR Master ");
......@@ -343,11 +343,11 @@ static int wrc_log_stats(void)
if (!last_jiffies)
last_jiffies = timer_get_tics() - 1 - wrc_ui_refperiod;
/* stats update condition for Slave mode */
if (wrc_stats_last == s[port]->update_count && ptp_mode==WRC_MODE_SLAVE)
if (wrc_stats_last == s[port]->update_count && ptp_mode[port]==WRC_MODE_SLAVE)
return 0;
/* stats update condition for Master mode */
if (time_before(timer_get_tics(), last_jiffies + wrc_ui_refperiod) &&
ptp_mode != WRC_MODE_SLAVE)
ptp_mode[port] != WRC_MODE_SLAVE)
return 0;
last_jiffies = timer_get_tics();
wrc_stats_last = s[port]->update_count;
......@@ -358,7 +358,7 @@ static int wrc_log_stats(void)
pp_printf("lnk:%d rx:%d tx:%d ", state.state, rx, tx);
pp_printf("lock:%d ", state.locked ? 1 : 0);
pp_printf("ptp:%s ", wrc_ptp_state(ppi[port], port));
if(ptp_mode == WRC_MODE_SLAVE) {
if(ptp_mode[port] == WRC_MODE_SLAVE) {
pp_printf("sv:%d ", (s[port]->flags & WR_FLAG_VALID) ? 1 : 0);
pp_printf("ss:'%s' ", s[port]->servo_state_name);
}
......@@ -494,7 +494,7 @@ int wrc_wr_diags(void)
wdiags_write_ptp_state((uint8_t )ppi[port]->state);
/* servo state (if slave)s */
if(ptp_mode == WRC_MODE_SLAVE){
if(ptp_mode[port] == WRC_MODE_SLAVE){
struct wr_servo_state *ss[wr_num_ports];
int32_t asym[wr_num_ports];
int wr_mode[wr_num_ports];
......
/*
* This work is part of the White Rabbit project
*
* Copyright (C) 2011,2012 CERN (www.cern.ch)
* Author: Aurelio Colosimo <aurelio@aureliocolosimo.it>
*
* Released according to the GNU GPL, version 2 or any later version.
*/
#include <inttypes.h>
#include <wrc.h>
#include <w1.h>
#include <ppsi/ppsi.h>
#include <wrpc.h>
#include <wr-api.h>
#include <minic.h>
#include <softpll_ng.h>
#include <syscon.h>
#include <pps_gen.h>
#include <onewire.h>
#include <temperature.h>
#include "wrc_ptp.h"
#include "hal_exports.h"
#include "lib/ipv4.h"
#include "shell.h"
#include "revision.h"
extern struct pp_servo servo;
extern struct pp_instance ppi_static_array[2];
struct pp_instance *ppi[2] = {&(ppi_static_array[0]),&(ppi_static_array[1])};
const char *ptp_unknown_str= "unknown";
static void wrc_mon_std_servo(int port);
#define PRINT64_FACTOR 1000000000LL
static char* print64(uint64_t x, int align)
{
uint32_t h_half, l_half;
static char buf[2*10+1]; //2x 32-bit value + \0
if (x < PRINT64_FACTOR)
if (align)
sprintf(buf, "%20u", (uint32_t)x);
else
sprintf(buf, "%u", (uint32_t)x);
else {
l_half = __div64_32(&x, PRINT64_FACTOR);
h_half = (uint32_t) x;
if (align)
sprintf(buf, "%11u%09u", h_half, l_half);
else
sprintf(buf, "%u%09u", h_half, l_half);
}
return buf;
}
static const char* wrc_ptp_state(int port)
{
struct pp_state_table_item *ip = NULL;
for (ip = pp_state_table; ip->state != PPS_END_OF_TABLE; ip++) {
if (ip->state == ppi[port]->state)
break;
}
if(!ip)
return ptp_unknown_str;
return ip->name;
}
static int wrc_mon_status(int port)
{
struct wr_servo_state *s;
s = &((struct wr_data *)ppi[port]->ext_data)->servo_state;
cprintf(C_BLUE, "\n\nPTP status: ");
cprintf(C_WHITE, "%s", wrc_ptp_state(port));
if ((!s->flags & WR_FLAG_VALID) || (ppi[port]->state != PPS_SLAVE)) {
cprintf(C_RED,
"\n\nSync info not valid\n");
return 0;
}
/* show_servo */
cprintf(C_BLUE, "\n\nSynchronization status:\n");
return 1;
}
static int wrcdp_mon_gui(int port)
{
struct hal_port_state state;
int tx, rx;
struct wr_servo_state *s;
s = &((struct wr_data *)ppi[port]->ext_data)->servo_state;
int64_t crtt;
int64_t total_asymmetry;
char buf[20];
/*show_ports */
if (port==0)
wrpc_get_port_state(&state, "wr0");
else
wrpc_get_port_state(&state, "wr1");
cprintf(C_BLUE, "\n\nLink status:");
if (port==0)
cprintf(C_WHITE, "\n%s: ", "wru0");
else
cprintf(C_WHITE, "\n%s: ", "wru1");
if (state.state)
cprintf(C_GREEN, "Link up ");
else
cprintf(C_RED, "Link down ");
minic_get_stats(&tx, &rx, port);
cprintf(C_GREY, "(RX: %d, TX: %d)", rx, tx);
if (!state.state) {
return 1;
}
if (HAS_IP) {
uint8_t ip[4];
cprintf(C_WHITE, " IPv4: ");
getIP(ip,port);
format_ip(buf, ip);
cprintf(C_GREEN, "%s (static assignment)", buf);
}
cprintf(C_GREY, "\nMode: ");
if (!WR_DSPOR(ppi[port])->wrModeOn) {
cprintf(C_RED, "WR Off");
wrc_mon_std_servo(port);
return 1;
}
switch (ptp_mode) {
case WRC_MODE_GM:
case WRC_MODE_MASTER:
cprintf(C_WHITE, "WR Master ");
break;
case WRC_MODE_SLAVE0:
cprintf(C_WHITE, "WR Slave0 ");
break;
case WRC_MODE_SLAVE1:
cprintf(C_WHITE, "WR Slave1 ");
break;
default:
cprintf(C_RED, "WR Unknown ");
}
if (state.locked)
cprintf(C_GREEN, "Locked ");
else
cprintf(C_RED, "NoLock ");
if (state.calib.rx_calibrated && state.calib.tx_calibrated)
cprintf(C_GREEN, "Calibrated");
else
cprintf(C_RED, "Uncalibrated");
if (wrc_mon_status(port)==0)
return 1;
cprintf(C_GREY, "Servo state: ");
cprintf(C_WHITE, "%s\n", s->servo_state_name);
cprintf(C_GREY, "Phase tracking: ");
if (s->tracking_enabled)
cprintf(C_GREEN, "ON\n");
else
cprintf(C_RED, "OFF\n");
/* sync source not implemented */
/*cprintf(C_GREY, "Synchronization source: ");
cprintf(C_WHITE, "%s\n", cur_servo_state.sync_source);*/
// spll_get_num_channels(NULL, &n_out);
// for(i = 0; i < n_out; i++) {
// cprintf(C_GREY, "Aux clock %d status: ", i);
// aux_stat = spll_get_aux_status(i);
// if (aux_stat & SPLL_AUX_ENABLED)
// cprintf(C_GREEN, "enabled");
// if (aux_stat & SPLL_AUX_LOCKED)
// cprintf(C_GREEN, ", locked");
// pp_printf("\n");
// }
cprintf(C_BLUE, "\nTiming parameters:\n");
cprintf(C_GREY, "Round-trip time (mu): ");
cprintf(C_WHITE, "%s ps\n", print64(s->picos_mu, 1));
cprintf(C_GREY, "Master-slave delay: ");
cprintf(C_WHITE, "%s ps\n", print64(s->delta_ms, 1));
cprintf(C_GREY, "Master PHY delays: ");
cprintf(C_WHITE, "TX: %9d ps, RX: %9d ps\n",
(int32_t) s->delta_tx_m,
(int32_t) s->delta_rx_m);
cprintf(C_GREY, "Slave PHY delays: ");
cprintf(C_WHITE, "TX: %9d ps, RX: %9d ps\n",
(int32_t) s->delta_tx_s,
(int32_t) s->delta_rx_s);
total_asymmetry = s->picos_mu - 2LL * s->delta_ms;
cprintf(C_GREY, "Total link asymmetry:");
cprintf(C_WHITE, "%21d ps\n", (int32_t) (total_asymmetry));
crtt = s->picos_mu - s->delta_tx_m - s->delta_rx_m
- s->delta_tx_s - s->delta_rx_s;
cprintf(C_GREY, "Cable rtt delay: ");
cprintf(C_WHITE, "%s ps\n", print64(crtt, 1));
cprintf(C_GREY, "Clock offset:");
cprintf(C_WHITE, "%29d ps\n", (int32_t) (s->offset));
cprintf(C_GREY, "Phase setpoint:");
cprintf(C_WHITE, "%27d ps\n", (s->cur_setpoint));
cprintf(C_GREY, "Skew: ");
/* precision is limited to 32 */
cprintf(C_WHITE, "%32d ps\n", (int32_t) (s->skew));
cprintf(C_GREY, "Update counter:");
cprintf(C_WHITE, "%27d\n", (int32_t) (s->update_count));
return 1;
}
int wrc_mon_gui(void)
{
static uint32_t last_jiffies;
// static uint32_t last_servo_count;
uint64_t sec;
uint32_t nsec;
if (!last_jiffies)
last_jiffies = timer_get_tics() - 1 - wrc_ui_refperiod;
if (time_before(timer_get_tics(), last_jiffies + wrc_ui_refperiod))
// && last_servo_count == s->update_count)
return 0;
last_jiffies = timer_get_tics();
// last_servo_count = s->update_count;
term_clear();
cprintf(C_BLUE, "WR PTP Core Sync Monitor %s", build_revision);
cprintf(C_GREY, "\nEsc = exit\n");
shw_pps_gen_get_time(&sec, &nsec);
cprintf(C_BLUE, "\n\nTAI Time: ");
cprintf(C_WHITE, "%s", format_time(sec, TIME_FORMAT_LEGACY));
wrcdp_mon_gui(0);
wrcdp_mon_gui(1);
return 1;
}
static inline void cprintf_time(int color, struct pp_time *time)
{
int s, ns;
s = (int)time->secs;
ns = (int)(time->scaled_nsecs >> 16);
if (s > 0 || (s == 0 && ns >= 0)) {
cprintf(color, "%2i.%09i s", s, ns);
} else { /* negative */
if (time->secs == 0)
cprintf(color, "-%i.%09i s", s, -ns);
else
cprintf(color, "%i.%09i s", s, -ns);
}
}
static void wrc_mon_std_servo(int port)
{
if (wrc_mon_status(port) == 0)
return;
cprintf(C_GREY, "\nClock offset: ");
if (DSCUR(ppi[port])->offsetFromMaster.secs)
cprintf_time(C_WHITE, &DSCUR(ppi[port])->offsetFromMaster);
else {
cprintf(C_WHITE, "%9i ns",
(int)(DSCUR(ppi[port])->offsetFromMaster.scaled_nsecs >> 16));
cprintf(C_GREY, "\nOne-way delay averaged: ");
cprintf(C_WHITE, "%9i ns",
(int)(DSCUR(ppi[port])->meanPathDelay.scaled_nsecs >> 16));
cprintf(C_GREY, "\nObserved drift: ");
cprintf(C_WHITE, "%9i ns",SRV(ppi[port])->obs_drift);
}
}
/* internal "last", exported to shell command */
uint32_t wrc_stats_last;
/* FIXME: Only report log stats of slave port (port0).*/
static int wrc_log_stats()
{
struct hal_port_state state;
int tx, rx;
int aux_stat;
uint64_t sec;
uint32_t nsec;
struct wr_servo_state *s =
&((struct wr_data *)ppi[0]->ext_data)->servo_state;
static uint32_t last_jiffies;
int n_out;
int i;
if (!wrc_stat_running)
return 0;
if (!last_jiffies)
last_jiffies = timer_get_tics() - 1 - wrc_ui_refperiod;
/* stats update condition for Slave mode */
if (wrc_stats_last == s->update_count && ptp_mode==WRC_MODE_SLAVE0)
return 0;
/* stats update condition for Master mode */
// if (time_before(timer_get_tics(), last_jiffies + wrc_ui_refperiod) &&
// (ptp_mode != WRC_MODE_SLAVE0 || ptp_mode != WRC_MODE_SLAVE1))
// return 0;
last_jiffies = timer_get_tics();
wrc_stats_last = s->update_count;
shw_pps_gen_get_time(&sec, &nsec);
wrpc_get_port_state(&state, "wr0");
minic_get_stats(&tx, &rx, 0);
pp_printf("lnk:%d rx:%d tx:%d ", state.state, rx, tx);
pp_printf("lock:%d ", state.locked ? 1 : 0);
pp_printf("ptp:%s ", wrc_ptp_state(0));
if(ptp_mode == WRC_MODE_SLAVE0) {
pp_printf("sv:%d ", (s->flags & WR_FLAG_VALID) ? 1 : 0);
pp_printf("ss:'%s' ", s->servo_state_name);
}
// spll_get_num_channels(NULL, &n_out);
// for(i = 0; i < n_out; i++) {
// aux_stat = spll_get_aux_status(i);
// pp_printf("aux%d:%x ", i, aux_stat);
// }
/* fixme: clock is not always 125 MHz */
pp_printf("sec:%d nsec:%d ", (uint32_t) sec, nsec);
if(ptp_mode == WRC_MODE_SLAVE0) {
pp_printf("mu:%s ", print64(s->picos_mu, 0));
pp_printf("dms:%s ", print64(s->delta_ms, 0));
pp_printf("dtxm:%d drxm:%d ", (int32_t) s->delta_tx_m,
(int32_t) s->delta_rx_m);
pp_printf("dtxs:%d drxs:%d ", (int32_t) s->delta_tx_s,
(int32_t) s->delta_rx_s);
int64_t total_asymmetry = s->picos_mu -
2LL * s->delta_ms;
pp_printf("asym:%d ", (int32_t) (total_asymmetry));
pp_printf("crtt:%s ", print64(s->picos_mu -
s->delta_tx_m -
s->delta_rx_m -
s->delta_tx_s -
s->delta_rx_s, 0));
pp_printf("cko:%d ", (int32_t) (s->offset));
pp_printf("setp:%d ", (int32_t) (s->cur_setpoint));
pp_printf("ucnt:%d ", (int32_t) s->update_count);
}
pp_printf("hd:%d md:%d ad:%d ", spll_get_dac(-1), spll_get_dac(0),
spll_get_dac(1));
if (1) {
int32_t temp;
temp = wrc_temp_get("pcb");
pp_printf("temp: %d.%04d C", temp >> 16,
(int)((temp & 0xffff) * 10 * 1000 >> 16));
}
pp_printf("\n");
return 1;
}
DEFINE_WRC_TASK(stats) = {
.name = "stats",
.job = wrc_log_stats,
};
ppsi @ 4ec34a29
Subproject commit f13b2ae9628ca46cd20efc8bbf42657baeee511a
Subproject commit 4ec34a29dab48cc7a7f1b161717673750564452c
......@@ -12,15 +12,11 @@
struct subcmd {
char *name;
int (*fun)(int);
int (*fun)(int, int);
int arg;
} subcmd[] = {
{"start", wrc_ptp_run, 1},
{"stop", wrc_ptp_run, 0},
#ifdef CONFIG_DUALPORT
{"start1", wrc_ptp_run, 3},
{"stop1", wrc_ptp_run, 2},
#endif
{"e2e", wrc_ptp_sync_mech, PP_E2E_MECH},
{"delay", wrc_ptp_sync_mech, PP_E2E_MECH},
#ifdef CONFIG_P2P
......@@ -35,13 +31,7 @@ struct subcmd {
#endif
};
#ifdef CONFIG_DUALPORT
static char *is_run[] = {"Port 0&1 stopped", "Port 0 running, Port 1 stopped",
"Port 0 stopped, Port 1 running","Port 0&1 running"};
#else
static char *is_run[] = {"stopped", "running"};
#endif
static char *is_mech[] = {[PP_E2E_MECH] = "e2e", [PP_P2P_MECH] = "p2p"};
static char *is_mode[] = {[WRC_MODE_GM] = "gm", [WRC_MODE_MASTER] = "master",
[WRC_MODE_SLAVE] = "slave"
......@@ -54,20 +44,29 @@ static int cmd_ptp(const char *args[])
{
int i, j, ret;
struct subcmd *c;
int port;
if (!args[0]) {
pp_printf("%s; %s %s\n",
is_run[wrc_ptp_run(-1)],
is_mech[wrc_ptp_sync_mech(-1)],
is_mode[wrc_ptp_get_mode()]);
for (port = 0; port < wr_num_ports; ++port)
{
pp_printf("port %d %s; %s %s\n", port,
is_run[wrc_ptp_run(-1, port)],
is_mech[wrc_ptp_sync_mech(-1, port)],
is_mode[wrc_ptp_get_mode(port)]);
}
return 0;
}
for (j = 0; args[j]; j++) {
for (i = 0, c = subcmd; i < ARRAY_SIZE(subcmd); i++, c++) {
if (!strcasecmp(args[j], c->name)) {
ret = c->fun(c->arg);
if (args[j+1]){
port = atoi(args[j+1]);
j++;
}
else
port = 0;
ret = c->fun(c->arg, port);
if (ret < 0)
return ret;
break;
......
......@@ -34,7 +34,7 @@
static int cmd_sfp(const char *args[])
{
int8_t sfpcount[2] = {1,1};
int8_t sfpcount[] = {1,1};
int8_t i, temp, ret=0;
int port;
......@@ -88,7 +88,7 @@ static int cmd_sfp(const char *args[])
pp_printf("Port %d has %d SFPs in DB\n", sfp.port, temp);
return 0;
} else if (!strcasecmp(args[0], "show")) {
for (port = 0; port < 2; ++port) {
for (port = 0; port < wr_num_ports; ++port) {
for (i = 0; i< sfpcount[port]; ++i) {
sfpcount[port] = storage_get_sfp(&sfp, SFP_GET, i, port);
if (sfpcount[port] == 0) {
......@@ -108,20 +108,32 @@ static int cmd_sfp(const char *args[])
}
return ret;
} else if (!strcasecmp(args[0], "match")) {
for (port = 0; port < 2; ++port) {
for (port = 0; port < wr_num_ports; ++port) {
ret = sfp_match(port);
if (ret == -ENODEV)
if (ret == -ENODEV) {
pp_printf("Port %d No SFP.\n", port);
else if (ret == -EIO)
continue;
} else if (ret == -EIO) {
pp_printf("Port %d SFP read error\n", port);
else if (ret == -ENXIO)
continue;
}
/* SFP read correctly */
for (temp = 0; temp < SFP_PN_LEN; ++temp)
pp_printf("%c", sfp_pn[port][temp]);
pp_printf("\n");
if (ret == -ENXIO) {
pp_printf("Port %d Could not match to DB\n", port);
else {
/* match successful */
pp_printf("\nPort %d SFP matched, dTx=%d dRx=%d alpha=%d\n",
port, sfp_deltaTx[0], sfp_deltaRx[0], sfp_alpha[0]);
continue;
}
/* match successful */
pp_printf("Port %d SFP matched, dTx=%d dRx=%d alpha=%d\n",
port, sfp_deltaTx[0], sfp_deltaRx[0], sfp_alpha[0]);
}
return ret;
} else if (args[1] && !strcasecmp(args[0], "ena")) {
......
......@@ -32,19 +32,19 @@ static int cmd_time(const char *args[])
shw_pps_gen_get_time(&sec, &nsec);
if (args[2] && !strcasecmp(args[0], "set")) {
if (wrc_ptp_get_mode() != WRC_MODE_SLAVE) {
if (wrc_ptp_get_mode(0) != WRC_MODE_SLAVE) {
shw_pps_gen_set_time((uint64_t) atoi(args[1]),
atoi(args[2]), PPSG_SET_ALL);
return 0;
} else
return -EBUSY;
} else if (args[0] && !strcasecmp(args[0], "setsec")) {
if (wrc_ptp_get_mode() != WRC_MODE_SLAVE) {
if (wrc_ptp_get_mode(0) != WRC_MODE_SLAVE) {
shw_pps_gen_set_time((int64_t) atoi(args[1]), 0, PPSG_SET_SEC);
return 0;
}
} else if (args[0] && !strcasecmp(args[0], "setnsec")) {
if (wrc_ptp_get_mode() != WRC_MODE_SLAVE) {
if (wrc_ptp_get_mode(0) != WRC_MODE_SLAVE) {
shw_pps_gen_set_time(0, atoi(args[1]), PPSG_SET_NSEC);
return 0;
}
......
......@@ -129,7 +129,8 @@ static void wrc_initialize(void)
wrc_ui_mode = UI_SHELL_MODE;
_endram = ENDRAM_MAGIC;
wrc_ptp_set_mode(WRC_MODE_SLAVE);
wrc_ptp_set_mode(WRC_MODE_MASTER, 1);
wrc_ptp_set_mode(WRC_MODE_SLAVE, 0);
for (port=0; port<wr_num_ports;port++) {
wrc_ptp_start(port);
}
......
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