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Software for White Rabbit PTP Core
Commit 55309172 authored by hongming's avatar hongming
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Merge tag 'wrpc-v4.2' into cute-core-demo-etherbone 

LM32 software for WRPC release v4.2
parents 62d60bf4 566f213f
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Kconfig
View file @ 55309172
......@@ -5,7 +5,6 @@ mainmenu "WR PTP Core software configuration"
config WR_SWITCH
bool "Build rt_cpu.bin, for the WR-Switch FPGA"
default n
select UART
config WR_NODE
bool
......@@ -30,6 +29,13 @@ config TEMP_POLL_INTERVAL
int
default 15
config TEMP_HIGH_THRESHOLD
int
default 70
config TEMP_HIGH_RAPPEL
int
default 60
config PLL_VERBOSE
boolean
default y if WR_SWITCH
......@@ -96,11 +102,6 @@ config PPSI
boolean
default y
config UART
boolean
default y if EMBEDDED_NODE
default n
config W1
depends on EMBEDDED_NODE
boolean
......@@ -150,8 +151,20 @@ config SYSLOG
The user (or init script) must use "syslog <ipaddr> <macaddr>"
to enable it. The special "off" ipaddr disables syslog.
config PUTS_SYSLOG
depends on SYSLOG
boolean "Sent puts (i.e. printf) to syslog too"
help
This allows logging the various warning and error messages
that normally go to the console alone, where nobody is looking
in a deployed system. Output from interactive commands is
not sent to syslog, but self-timed diagnostic (stat, gui, verbose)
will reach syslog anyways, if an interactive user enables them.
Unfortunately, "stat" will reach syslog as several short strings,
and "gui" is full of escape sequences.
config SNMP
depends on IP
depends on IP && !HOST_PROCESS
default y
boolean "Mini SNMP responder"
......@@ -170,11 +183,6 @@ config SNMP_AUX_DIAG
help
This option adds branch wrpcAuxDiag to the SNMP
config SNMP_HW_TYPE
depends on SNMP
default "spec"
string "Hardware type reported by SNMP"
config BUILD_INIT
depends on WR_NODE
default n
......@@ -206,6 +214,7 @@ config FLASH_INIT
default n
config AUX_DIAG
depends on WR_NODE
default n
boolean "Add support for auxiliary diagnostics registers"
help
......@@ -220,12 +229,21 @@ config SDB_STORAGE
Use SDB to manage flash and eeproms (both W1 and I2C). If not, legacy code
(eeprom only) will be selected.
config GENSDBFS
depends on SDB_STORAGE
default y
boolean "Shell command for SDBFS generation"
help
This option adds _sdb fs_ command to write empty SDBFS filesystem
image in Flash/EEPROM.
config LEGACY_EEPROM
depends on WR_NODE
boolean
default !SDB_STORAGE
config VLAN
depends on WR_NODE
boolean "Filter and rx/tx frames in a VLAN (as opposed to untagged)"
config VLAN_NR
......@@ -244,8 +262,22 @@ config VLAN_FOR_CLASS6
depends on VLAN
int "Route this VLAN too to fabric class 6 (Streamer/NIC)"
config WR_NODE_SIM
config WR_DIAG
depends on WR_NODE
boolean "Write of WRPC diagnostics to dedicated WB registers"
default n
help
This is a software part of new (additional) diagnostics for WR PTP
Core. It allows to access diagnostics values through WB registers
(e.g. PCI bus). It allows the host machine (of SPEC/SVEC/etc.) to
easily access information about the health of WR PTP Core.
Please note that other option to access the status of WRPC, which
is direct access to the WRPC's memory does not provide any mechanism
to ensure the data consistency.
config WR_NODE_SIM
depends on WR_NODE && !HOST_PROCESS
boolean "Build simple software for test of WR PTP Core in simulation"
default n
help
......@@ -256,12 +288,32 @@ config WR_NODE_SIM
MAC address destination and expects the simulation to return
these frames.
config ABSCAL
depends on WR_NODE
default y
boolean "Support absolute calibration"
help
If you select this, you'll be able to do absolute calibration
using a loop-back SFP adapter, according to the procedure
described and documented by Peter Jansweijer.
config LLDP
depends on WR_NODE
boolean "Include LLDP protocol transmit-only"
default n
help
This enable LLDP support. LLDP is a vendor-neutral link layer protocol
used by network devices for advertising their identity, capabilities,
and neighbors on local area network.
#
# This is a set of configuration options that should not be changed by
# normal users. If the "developer" menu is used, the binary is tainted.
comment "wrpc-sw is tainted if you change the following options"
config DEVELOPER
depends on WR_NODE
bool "Advanced configurations, only for developers"
help
The following options are new features under testing, or
......@@ -270,7 +322,7 @@ config DEVELOPER
you are a developer of wrpc-sw.
config PPSI_FORCE_CONFIG
depends on DEVELOPER && WR_NODE
depends on DEVELOPER
bool "Reconfigure ppsi from wrpc-sw at every build"
default y
help
......@@ -280,11 +332,11 @@ config PPSI_FORCE_CONFIG
peer-to-peer here, the change is propagated to the ppsi build.
config HOST_PROCESS
depends on DEVELOPER && WR_NODE
depends on DEVELOPER
boolean "Build as a host process, to develop/debug network"
config RAMSIZE
depends on DEVELOPER && EMBEDDED_NODE
depends on DEVELOPER && LM32
int "Size of the RAM in the FPGA for this program"
default 90112
help
......@@ -294,7 +346,7 @@ config RAMSIZE
choose your preferred value here.
config STACKSIZE
depends on DEVELOPER && EMBEDDED_NODE
depends on DEVELOPER && LM32
int "Size of the stack area needed by this program"
default 2048
help
......@@ -303,7 +355,7 @@ config STACKSIZE
at run time. (However, we have a detector for overflows).
config PRINT_BUFSIZE
depends on DEVELOPER && WR_NODE
depends on DEVELOPER
int "Size for the temporary output string of pp_printf"
default 128
help
......@@ -312,21 +364,19 @@ config PRINT_BUFSIZE
in a single call to printf.
config TEMP_POLL_INTERVAL
depends on DEVELOPER && WR_NODE
depends on DEVELOPER
int "Poll interval, in seconds, for temperature sensors"
config TEMP_HIGH_THRESHOLD
depends on DEVELOPER && WR_NODE && SYSLOG
default 70
depends on DEVELOPER && SYSLOG
int "Threshold for temperature: tell syslog if higher"
config TEMP_HIGH_RAPPEL
depends on DEVELOPER && WR_NODE && SYSLOG
default 60
depends on DEVELOPER && SYSLOG
int "Remember over-temperature every that many seconds"
config CMD_LL
depends on DEVELOPER && EMBEDDED_NODE
depends on DEVELOPER && LM32
bool "Build low-level commands for development/testing"
help
This enables low-level commands: "devmem" to read/write memory
......@@ -335,14 +385,22 @@ config CMD_LL
on the master, because they are just sent to the slave
during the initial handshake
config FLASH_INIT
config DAC_LOG
depends on DEVELOPER && EMBEDDED_NODE
bool "Be able send DAC values through UDP"
help
If you want to see the dac output, input to the VCXO main
oscillator, enable this. You'll have a "daclog" shell command
to set ipaddress and mac of the target host. UDP port is 1050.
config FLASH_INIT
depends on DEVELOPER && LM32
default y
boolean "Read init commands from flash storage"
# CHECK_RESET for switch and node
config CHECK_RESET
depends on DEVELOPER && !HOST_PROCESS
depends on DEVELOPER && LM32 || WR_SWITCH
bool "Print a stack trace if reset happens"
help
If the CPU is following a NULL pointer, the program will
......@@ -351,7 +409,7 @@ config CHECK_RESET
then clears the stack (for next time) and restarts again.
config SPLL_FIFO_LOG
depends on DEVELOPER && !HOST_PROCESS
depends on DEVELOPER && LM32
bool "Add a circular buffer for spll logging, used by tools/wrpc-dump"
help
This option addrs 256 bytes to the wrpc bynary, to log
......@@ -361,7 +419,7 @@ config SPLL_FIFO_LOG
choice
prompt "Implementation of pp_printf"
depends on DEVELOPER && WR_NODE
depends on DEVELOPER
config PRINTF_IS_XINT
bool "hex-and-int"
......@@ -406,7 +464,7 @@ config ASSERT
with no Kconfig -- and it does the same, unconditionally.
config DETERMINISTIC_BINARY
depends on DEVELOPER && EMBEDDED_NODE
depends on DEVELOPER || WR_SWITCH
boolean "Build a binary that is the same every time"
help
This option is used to #ifdef __DATE__ and __TIME__ strings
......@@ -418,27 +476,8 @@ config DETERMINISTIC_BINARY
If in doubt, say No.
config UART
boolean "Use hardware uart (and/or vuart if available)"
depends on (DEVELOPER && EMBEDDED_NODE) || WR_SWITCH
help
This option selects the serial driver, connected to either
the USB socket, or "vuart" (software fifo) or both, according
to how the gateware is built.
config UART_SW
depends on DEVELOPER && EMBEDDED_NODE
default !UART
boolean "Use software uart"
help
The software uart is made up of two circular buffers. It can
be used either as an alternative to the harwdare UART or as
an addition. If the option is turned on, ppsi log messages
are routed to the software uart. The interactive wrpc shell
and diagnostics run on the hardware UART if available.
config NET_VERBOSE
depends on DEVELOPER && WR_NODE
depends on DEVELOPER
boolean "Extra verbose messages for networking"
help
This is mainly a debug tool, to be left off unless you hack
......@@ -458,7 +497,7 @@ config PFILTER_VERBOSE
A debug tool for people changing the packet filter rules
config WRC_VERBOSE
depends on DEVELOPER
depends on DEVELOPER || WR_SWITCH
boolean "More verbose messages in wr core"
default y if WR_SWITCH
help
......@@ -501,6 +540,18 @@ config LATENCY_SYSLOG
bool "Report latency problems to syslog"
default y
config DEFAULT_PRINT_TASK_TIME_THRESHOLD
depends on DEVELOPER
default 0
int "Default threshold of printing task execution time"
help
If a task executes longer than a given number, its name and
an execution time will be printed to the console. Additionally,
setting this value triggers printing messages if particular task
runs longer than ever before. Setting to 0 disabled this
functionality. This value can be changed in run-time by the command
"ps max <msecs>".
# This is needed to size the pp_instance data strucuture. Instead of
# including the ppsi autoconf.h, with duplicate definitions, define it
......
Makefile
View file @ 55309172
......@@ -8,6 +8,7 @@ ifdef CONFIG_HOST_PROCESS
endif
export CROSS_COMPILE
export CONFIG_ABSCAL
CC = $(CROSS_COMPILE)gcc
LD = $(CROSS_COMPILE)ld
......@@ -75,6 +76,10 @@ pfilter-y := rules-novlan.bin
pfilter-$(CONFIG_VLAN) += rules-vlan.bin
export pfilter-y
# sdbfs image
sdbfsimg-y := sdbfs-default.bin
export sdbfsimg-y
all:
include shell/shell.mk
......@@ -129,7 +134,7 @@ endif
all: tools $(OUTPUT).elf $(arch-files-y)
.PRECIOUS: %.elf %.bin
.PHONY: all tools clean gitmodules $(PPSI)/ppsi.o
.PHONY: all tools clean gitmodules $(PPSI)/ppsi.o extest liblinux
# we need to remove "ptpdump" support for ppsi if RAM size is small and
# we include etherbone
......@@ -139,8 +144,6 @@ ifneq ($(CONFIG_RAMSIZE),131072)
endif
endif
PPSI_USER_CFLAGS += -DDIAG_PUTS=uart_sw_write_string
PPSI-CFG-y = wrpc_defconfig
PPSI-CFG-$(CONFIG_P2P) = wrpc_pdelay_defconfig
PPSI-CFG-$(CONFIG_HOST_PROCESS) = unix_defconfig
......@@ -209,6 +212,8 @@ clean:
$(MAKE) -C $(PPSI) clean
$(MAKE) -C sdb-lib clean
$(MAKE) -C tools clean
$(MAKE) -C liblinux clean
$(MAKE) -C liblinux/extest clean
distclean: clean
rm -rf include/config
......@@ -219,9 +224,18 @@ distclean: clean
%.o: %.c
${CC} $(CFLAGS) $(PTPD_CFLAGS) $(INCLUDE_DIR) $(LIB_DIR) -c $*.c -o $@
tools: .config gitmodules
liblinux:
$(MAKE) -C liblinux
extest:
$(MAKE) -C liblinux/extest
tools: .config gitmodules liblinux extest
$(MAKE) -C tools
tools-diag: liblinux extest
$(MAKE) -C tools wrpc-diags wrpc-vuart wr-streamers
# if needed, check out the submodules (first time only), so users
# who didn't read carefully the manual won't get confused
gitmodules:
......
configs/devel_build_test_defconfig
View file @ 55309172
......@@ -8,6 +8,8 @@ CONFIG_PPSI_FORCE_CONFIG=y
CONFIG_PRINT_BUFSIZE=128
CONFIG_RAMSIZE=131072
CONFIG_TEMP_POLL_INTERVAL=15
CONFIG_TEMP_HIGH_THRESHOLD=70
CONFIG_TEMP_HIGH_RAPPEL=60
CONFIG_PLL_VERBOSE=y
CONFIG_PFILTER_VERBOSE=y
CONFIG_WRC_VERBOSE=y
......@@ -22,7 +24,6 @@ CONFIG_EMBEDDED_NODE=y
# CONFIG_WR_NODE_PCS16 is not set
CONFIG_STACKSIZE=2048
CONFIG_PPSI=y
CONFIG_UART=y
CONFIG_W1=y
CONFIG_LATENCY_ETHTYPE=4455
CONFIG_LATENCY_SYSLOG=y
......@@ -30,9 +31,9 @@ CONFIG_P2P=y
CONFIG_IP=y
CONFIG_CMD_CONFIG=y
CONFIG_SYSLOG=y
# CONFIG_PUTS_SYSLOG is not set
CONFIG_SNMP=y
CONFIG_SNMP_SET=y
CONFIG_SNMP_HW_TYPE="spec"
CONFIG_BUILD_INIT=y
CONFIG_INIT_COMMAND="help"
CONFIG_HAS_BUILD_INIT=1
......@@ -40,16 +41,18 @@ CONFIG_HAS_FLASH_INIT=1
CONFIG_FLASH_INIT=y
# CONFIG_AUX_DIAG is not set
CONFIG_SDB_STORAGE=y
CONFIG_GENSDBFS=y
# CONFIG_LEGACY_EEPROM is not set
# CONFIG_WR_DIAG is not set
# CONFIG_WR_NODE_SIM is not set
CONFIG_ABSCAL=y
#
# wrpc-sw is tainted if you change the following options
#
CONFIG_DEVELOPER=y
CONFIG_TEMP_HIGH_THRESHOLD=70
CONFIG_TEMP_HIGH_RAPPEL=60
CONFIG_CMD_LL=y
# CONFIG_DAC_LOG is not set
CONFIG_CHECK_RESET=y
CONFIG_SPLL_FIFO_LOG=y
CONFIG_PRINTF_IS_XINT=y
......@@ -58,13 +61,14 @@ CONFIG_PRINTF_IS_XINT=y
# CONFIG_PRINTF_IS_NONE is not set
CONFIG_ASSERT=y
CONFIG_DETERMINISTIC_BINARY=y
CONFIG_UART_SW=y
CONFIG_NET_VERBOSE=y
# CONFIG_SNMP_VERBOSE is not set
CONFIG_FAKE_TEMPERATURES=y
CONFIG_LATENCY_PROBE=y
CONFIG_DEFAULT_PRINT_TASK_TIME_THRESHOLD=0
CONFIG_VLAN_ARRAY_SIZE=1
CONFIG_PRINTF_XINT=y
# CONFIG_PRINTF_FULL is not set
# CONFIG_PRINTF_MINI is not set
# CONFIG_PRINTF_NONE is not set
# CONFIG_LLDP is not set
configs/gsi_defconfig
View file @ 55309172
......@@ -8,6 +8,8 @@ CONFIG_PPSI_FORCE_CONFIG=y
CONFIG_PRINT_BUFSIZE=128
CONFIG_RAMSIZE=131072
CONFIG_TEMP_POLL_INTERVAL=15
CONFIG_TEMP_HIGH_THRESHOLD=70
CONFIG_TEMP_HIGH_RAPPEL=60
# CONFIG_PLL_VERBOSE is not set
# CONFIG_PFILTER_VERBOSE is not set
# CONFIG_WRC_VERBOSE is not set
......@@ -22,7 +24,6 @@ CONFIG_EMBEDDED_NODE=y
# CONFIG_WR_NODE_PCS16 is not set
CONFIG_STACKSIZE=10240
CONFIG_PPSI=y
CONFIG_UART=y
CONFIG_W1=y
CONFIG_LATENCY_ETHTYPE=291
CONFIG_LATENCY_SYSLOG=y
......@@ -30,6 +31,7 @@ CONFIG_LATENCY_SYSLOG=y
CONFIG_IP=y
CONFIG_CMD_CONFIG=y
CONFIG_SYSLOG=y
# CONFIG_PUTS_SYSLOG is not set
# CONFIG_SNMP is not set
# CONFIG_BUILD_INIT is not set
CONFIG_INIT_COMMAND=""
......@@ -38,16 +40,18 @@ CONFIG_HAS_FLASH_INIT=1
CONFIG_FLASH_INIT=y
# CONFIG_AUX_DIAG is not set
CONFIG_SDB_STORAGE=y
CONFIG_GENSDBFS=y
# CONFIG_LEGACY_EEPROM is not set
# CONFIG_WR_DIAG is not set
# CONFIG_WR_NODE_SIM is not set
CONFIG_ABSCAL=y
#
# wrpc-sw is tainted if you change the following options
#
CONFIG_DEVELOPER=y
CONFIG_TEMP_HIGH_THRESHOLD=70
CONFIG_TEMP_HIGH_RAPPEL=60
CONFIG_CMD_LL=y
# CONFIG_DAC_LOG is not set
CONFIG_CHECK_RESET=y
# CONFIG_SPLL_FIFO_LOG is not set
CONFIG_PRINTF_IS_XINT=y
......@@ -56,12 +60,13 @@ CONFIG_PRINTF_IS_XINT=y
# CONFIG_PRINTF_IS_NONE is not set
# CONFIG_ASSERT is not set
# CONFIG_DETERMINISTIC_BINARY is not set
# CONFIG_UART_SW is not set
# CONFIG_NET_VERBOSE is not set
# CONFIG_FAKE_TEMPERATURES is not set
CONFIG_LATENCY_PROBE=y
CONFIG_DEFAULT_PRINT_TASK_TIME_THRESHOLD=0
CONFIG_VLAN_ARRAY_SIZE=1
CONFIG_PRINTF_XINT=y
# CONFIG_PRINTF_FULL is not set
# CONFIG_PRINTF_MINI is not set
# CONFIG_PRINTF_NONE is not set
# CONFIG_LLDP is not set
configs/gsi_pdelay_defconfig
View file @ 55309172
......@@ -8,6 +8,8 @@ CONFIG_PPSI_FORCE_CONFIG=y
CONFIG_PRINT_BUFSIZE=128
CONFIG_RAMSIZE=131072
CONFIG_TEMP_POLL_INTERVAL=15
CONFIG_TEMP_HIGH_THRESHOLD=70
CONFIG_TEMP_HIGH_RAPPEL=60
# CONFIG_PLL_VERBOSE is not set
# CONFIG_PFILTER_VERBOSE is not set
# CONFIG_WRC_VERBOSE is not set
......@@ -22,7 +24,6 @@ CONFIG_EMBEDDED_NODE=y
# CONFIG_WR_NODE_PCS16 is not set
CONFIG_STACKSIZE=10240
CONFIG_PPSI=y
CONFIG_UART=y
CONFIG_W1=y
CONFIG_LATENCY_ETHTYPE=291
CONFIG_LATENCY_SYSLOG=y
......@@ -30,6 +31,7 @@ CONFIG_P2P=y
CONFIG_IP=y
CONFIG_CMD_CONFIG=y
CONFIG_SYSLOG=y
# CONFIG_PUTS_SYSLOG is not set
# CONFIG_SNMP is not set
# CONFIG_BUILD_INIT is not set
CONFIG_INIT_COMMAND=""
......@@ -38,16 +40,18 @@ CONFIG_HAS_FLASH_INIT=1
CONFIG_FLASH_INIT=y
# CONFIG_AUX_DIAG is not set
CONFIG_SDB_STORAGE=y
CONFIG_GENSDBFS=y
# CONFIG_LEGACY_EEPROM is not set
# CONFIG_WR_DIAG is not set
# CONFIG_WR_NODE_SIM is not set
CONFIG_ABSCAL=y
#
# wrpc-sw is tainted if you change the following options
#
CONFIG_DEVELOPER=y
CONFIG_TEMP_HIGH_THRESHOLD=70
CONFIG_TEMP_HIGH_RAPPEL=60
CONFIG_CMD_LL=y
# CONFIG_DAC_LOG is not set
CONFIG_CHECK_RESET=y
# CONFIG_SPLL_FIFO_LOG is not set
CONFIG_PRINTF_IS_XINT=y
......@@ -56,12 +60,13 @@ CONFIG_PRINTF_IS_XINT=y
# CONFIG_PRINTF_IS_NONE is not set
# CONFIG_ASSERT is not set
# CONFIG_DETERMINISTIC_BINARY is not set
# CONFIG_UART_SW is not set
# CONFIG_NET_VERBOSE is not set
# CONFIG_FAKE_TEMPERATURES is not set
CONFIG_LATENCY_PROBE=y
CONFIG_DEFAULT_PRINT_TASK_TIME_THRESHOLD=0
CONFIG_VLAN_ARRAY_SIZE=1
CONFIG_PRINTF_XINT=y
# CONFIG_PRINTF_FULL is not set
# CONFIG_PRINTF_MINI is not set
# CONFIG_PRINTF_NONE is not set
# CONFIG_LLDP is not set
configs/host_process_config
View file @ 55309172
......@@ -39,6 +39,7 @@ CONFIG_FLASH_INIT=y
# CONFIG_AUX_DIAG is not set
CONFIG_SDB_STORAGE=y
# CONFIG_LEGACY_EEPROM is not set
# CONFIG_WR_DIAG is not set
# CONFIG_WR_NODE_SIM is not set
#
......
configs/spec_defconfig
View file @ 55309172
......@@ -8,18 +8,19 @@ CONFIG_PPSI_FORCE_CONFIG=y
CONFIG_PRINT_BUFSIZE=128
CONFIG_RAMSIZE=131072
CONFIG_TEMP_POLL_INTERVAL=15
# CONFIG_VLAN is not set
CONFIG_VLAN_NR=0
CONFIG_VLAN_1_FOR_CLASS7=0
CONFIG_VLAN_2_FOR_CLASS7=0
CONFIG_VLAN_FOR_CLASS6=0
CONFIG_TEMP_HIGH_THRESHOLD=70
CONFIG_TEMP_HIGH_RAPPEL=60
CONFIG_VLAN=y
CONFIG_VLAN_NR=1
CONFIG_VLAN_1_FOR_CLASS7=10
CONFIG_VLAN_2_FOR_CLASS7=11
CONFIG_VLAN_FOR_CLASS6=20
# CONFIG_HOST_PROCESS is not set
CONFIG_LM32=y
CONFIG_EMBEDDED_NODE=y
# CONFIG_WR_NODE_PCS16 is not set
CONFIG_STACKSIZE=2048
CONFIG_PPSI=y
CONFIG_UART=y
CONFIG_W1=y
CONFIG_LATENCY_ETHTYPE=291
# CONFIG_P2P is not set
......@@ -29,16 +30,19 @@ CONFIG_IP=y
CONFIG_SNMP=y
CONFIG_SNMP_SET=y
CONFIG_SNMP_AUX_DIAG=y
CONFIG_SNMP_HW_TYPE="spec"
# CONFIG_BUILD_INIT is not set
CONFIG_INIT_COMMAND=""
CONFIG_HAS_BUILD_INIT=0
CONFIG_BUILD_INIT=y
CONFIG_INIT_COMMAND="vlan off;ptp stop;sfp match;mode slave;ptp start"
CONFIG_HAS_BUILD_INIT=1
CONFIG_HAS_FLASH_INIT=1
CONFIG_FLASH_INIT=y
CONFIG_AUX_DIAG=y
CONFIG_SDB_STORAGE=y
CONFIG_GENSDBFS=y
# CONFIG_LEGACY_EEPROM is not set
CONFIG_WR_DIAG=y
# CONFIG_WR_NODE_SIM is not set
CONFIG_ABSCAL=y
CONFIG_LLDP=y
#
# wrpc-sw is tainted if you change the following options
......
configs/spec_pdelay_defconfig
View file @ 55309172
......@@ -8,32 +8,41 @@ CONFIG_PPSI_FORCE_CONFIG=y
CONFIG_PRINT_BUFSIZE=128
CONFIG_RAMSIZE=131072
CONFIG_TEMP_POLL_INTERVAL=15
# CONFIG_VLAN is not set
CONFIG_VLAN_NR=0
CONFIG_VLAN_1_FOR_CLASS7=0
CONFIG_VLAN_2_FOR_CLASS7=0
CONFIG_VLAN_FOR_CLASS6=0
CONFIG_TEMP_HIGH_THRESHOLD=70
CONFIG_TEMP_HIGH_RAPPEL=60
CONFIG_VLAN=y
CONFIG_VLAN_NR=1
CONFIG_VLAN_1_FOR_CLASS7=10
CONFIG_VLAN_2_FOR_CLASS7=11
CONFIG_VLAN_FOR_CLASS6=20
# CONFIG_HOST_PROCESS is not set
CONFIG_LM32=y
CONFIG_EMBEDDED_NODE=y
# CONFIG_WR_NODE_PCS16 is not set
CONFIG_STACKSIZE=2048
CONFIG_PPSI=y
CONFIG_UART=y
CONFIG_W1=y
CONFIG_LATENCY_ETHTYPE=291
CONFIG_P2P=y
# CONFIG_IP is not set
CONFIG_IP=y
# CONFIG_CMD_CONFIG is not set
# CONFIG_BUILD_INIT is not set
CONFIG_INIT_COMMAND=""
CONFIG_HAS_BUILD_INIT=0
# CONFIG_SYSLOG is not set
CONFIG_SNMP=y
CONFIG_SNMP_SET=y
CONFIG_SNMP_AUX_DIAG=y
CONFIG_BUILD_INIT=y
CONFIG_INIT_COMMAND="vlan off;ptp stop;sfp match;mode slave;ptp start"
CONFIG_HAS_BUILD_INIT=1
CONFIG_HAS_FLASH_INIT=1
CONFIG_FLASH_INIT=y
# CONFIG_AUX_DIAG is not set
CONFIG_AUX_DIAG=y
CONFIG_SDB_STORAGE=y
CONFIG_GENSDBFS=y
# CONFIG_LEGACY_EEPROM is not set
CONFIG_WR_DIAG=y
# CONFIG_WR_NODE_SIM is not set
CONFIG_ABSCAL=y
CONFIG_LLDP=y
#
# wrpc-sw is tainted if you change the following options
......
configs/wr_switch_defconfig
View file @ 55309172
......@@ -8,9 +8,10 @@ CONFIG_PPSI_FORCE_CONFIG=y
CONFIG_PRINT_BUFSIZE=128
CONFIG_RAMSIZE=65536
CONFIG_TEMP_POLL_INTERVAL=15
CONFIG_TEMP_HIGH_THRESHOLD=70
CONFIG_TEMP_HIGH_RAPPEL=60
CONFIG_PLL_VERBOSE=y
CONFIG_WRC_VERBOSE=y
# CONFIG_VLAN is not set
CONFIG_VLAN_NR=0
CONFIG_VLAN_1_FOR_CLASS7=0
CONFIG_VLAN_2_FOR_CLASS7=0
......@@ -18,18 +19,17 @@ CONFIG_VLAN_FOR_CLASS6=0
# CONFIG_HOST_PROCESS is not set
CONFIG_LM32=y
# CONFIG_EMBEDDED_NODE is not set
CONFIG_UART=y
CONFIG_LATENCY_ETHTYPE=291
CONFIG_INIT_COMMAND=""
CONFIG_HAS_BUILD_INIT=0
CONFIG_HAS_FLASH_INIT=0
# CONFIG_FLASH_INIT is not set
# CONFIG_AUX_DIAG is not set
#
# wrpc-sw is tainted if you change the following options
#
# CONFIG_DEVELOPER is not set
# CONFIG_CHECK_RESET is not set
# CONFIG_DETERMINISTIC_BINARY is not set
CONFIG_VLAN_ARRAY_SIZE=1
CONFIG_PRINTF_XINT=y
# CONFIG_PRINTF_FULL is not set
......
configs/wrnic_defconfig
View file @ 55309172
......@@ -8,34 +8,39 @@ CONFIG_PPSI_FORCE_CONFIG=y
CONFIG_PRINT_BUFSIZE=128
CONFIG_RAMSIZE=131072
CONFIG_TEMP_POLL_INTERVAL=15
# CONFIG_VLAN is not set
CONFIG_VLAN_NR=0
CONFIG_VLAN_1_FOR_CLASS7=0
CONFIG_VLAN_2_FOR_CLASS7=0
CONFIG_VLAN_FOR_CLASS6=0
CONFIG_TEMP_HIGH_THRESHOLD=70
CONFIG_TEMP_HIGH_RAPPEL=60
CONFIG_VLAN=y
CONFIG_VLAN_NR=1
CONFIG_VLAN_1_FOR_CLASS7=10
CONFIG_VLAN_2_FOR_CLASS7=11
CONFIG_VLAN_FOR_CLASS6=20
# CONFIG_HOST_PROCESS is not set
CONFIG_LM32=y
CONFIG_EMBEDDED_NODE=y
# CONFIG_WR_NODE_PCS16 is not set
CONFIG_STACKSIZE=2048
CONFIG_PPSI=y
CONFIG_UART=y
CONFIG_W1=y
CONFIG_LATENCY_ETHTYPE=291
# CONFIG_P2P is not set
CONFIG_IP=y
# CONFIG_CMD_CONFIG is not set
# CONFIG_SYSLOG is not set
# CONFIG_SNMP is not set
# CONFIG_BUILD_INIT is not set
CONFIG_INIT_COMMAND=""
CONFIG_HAS_BUILD_INIT=0
CONFIG_SNMP=y
CONFIG_SNMP_SET=y
CONFIG_BUILD_INIT=y
CONFIG_INIT_COMMAND="vlan off;ptp stop;sfp match;mode slave;ptp start"
CONFIG_HAS_BUILD_INIT=1
CONFIG_HAS_FLASH_INIT=1
CONFIG_FLASH_INIT=y
# CONFIG_AUX_DIAG is not set
CONFIG_SDB_STORAGE=y
CONFIG_GENSDBFS=y
# CONFIG_LEGACY_EEPROM is not set
# CONFIG_WR_DIAG is not set
# CONFIG_WR_NODE_SIM is not set
CONFIG_ABSCAL=y
#
# wrpc-sw is tainted if you change the following options
......
configs/wrpc_sim_defconfig
View file @ 55309172
......@@ -8,6 +8,8 @@ CONFIG_PPSI_FORCE_CONFIG=y
CONFIG_PRINT_BUFSIZE=128
CONFIG_RAMSIZE=131072
CONFIG_TEMP_POLL_INTERVAL=15
CONFIG_TEMP_HIGH_THRESHOLD=70
CONFIG_TEMP_HIGH_RAPPEL=60
# CONFIG_PLL_VERBOSE is not set
# CONFIG_PFILTER_VERBOSE is not set
# CONFIG_WRC_VERBOSE is not set
......@@ -22,7 +24,6 @@ CONFIG_EMBEDDED_NODE=y
# CONFIG_WR_NODE_PCS16 is not set
CONFIG_STACKSIZE=2048
CONFIG_PPSI=y
CONFIG_UART=y
CONFIG_W1=y
CONFIG_LATENCY_ETHTYPE=291
# CONFIG_P2P is not set
......@@ -35,14 +36,18 @@ CONFIG_HAS_FLASH_INIT=1
CONFIG_FLASH_INIT=y
# CONFIG_AUX_DIAG is not set
CONFIG_SDB_STORAGE=y
CONFIG_GENSDBFS=y
# CONFIG_LEGACY_EEPROM is not set
# CONFIG_WR_DIAG is not set
CONFIG_WR_NODE_SIM=y
CONFIG_ABSCAL=y
#
# wrpc-sw is tainted if you change the following options
#
CONFIG_DEVELOPER=y
# CONFIG_CMD_LL is not set
# CONFIG_DAC_LOG is not set
# CONFIG_CHECK_RESET is not set
# CONFIG_SPLL_FIFO_LOG is not set
CONFIG_PRINTF_IS_XINT=y
......@@ -51,12 +56,13 @@ CONFIG_PRINTF_IS_XINT=y
# CONFIG_PRINTF_IS_NONE is not set
# CONFIG_ASSERT is not set
# CONFIG_DETERMINISTIC_BINARY is not set
# CONFIG_UART_SW is not set
# CONFIG_NET_VERBOSE is not set
# CONFIG_FAKE_TEMPERATURES is not set
# CONFIG_LATENCY_PROBE is not set
CONFIG_DEFAULT_PRINT_TASK_TIME_THRESHOLD=0
CONFIG_VLAN_ARRAY_SIZE=1
CONFIG_PRINTF_XINT=y
# CONFIG_PRINTF_FULL is not set
# CONFIG_PRINTF_MINI is not set
# CONFIG_PRINTF_NONE is not set
# CONFIG_LLDP is not set
dev/dac_log.c 0 → 100644
View file @ 55309172
#include <wrc.h>
#include <wrpc.h>
#include <string.h>
#include <shell.h>
#include <lib/ipv4.h>
/* a tx-only socket: no queue is there */
static struct wrpc_socket __static_daclog_socket = {
.queue.buff = NULL,
.queue.size = 0,
};
static struct wrpc_socket *daclog_socket;
static struct wr_udp_addr daclog_addr;
unsigned char daclog_mac[6];
/* alternate between two buffers */
#define BSIZE 512
struct daclog_buf {
unsigned char hdr[UDP_END];
uint16_t data[BSIZE];
};
static struct daclog_buf buffers[2];
static int ready[2];
void spll_log_dac(int y);
void spll_log_dac(int y)
{
static int bindex, bcount;
buffers[bindex].data[bcount++] = y;
if (bcount == BSIZE) {
ready[bindex] = 1;
bindex = !bindex;
bcount = 0;
}
}
static void daclog_init(void)
{
daclog_socket = ptpd_netif_create_socket(&__static_daclog_socket, NULL,
PTPD_SOCK_UDP, 1050);
daclog_addr.sport = daclog_addr.dport = htons(1050);
}
static int configured;
static int daclog_poll(void)
{
struct wr_sockaddr addr;
int len = sizeof(struct daclog_buf);
struct daclog_buf *b = NULL;
if (!configured)
return 0;
if (ready[0]) {
b = buffers + 0;
ready[0] = 0;
} else if (ready[1]) {
b = buffers + 1;
ready[1] = 0;
}
if (!b)
return 0;
/* format and send */
getIP((void *)&daclog_addr.saddr); /* if we have no ip yet, 0 is ok */
fill_udp((void *)b, len, &daclog_addr);
memcpy(&addr.mac, daclog_mac, 6);
ptpd_netif_sendto(daclog_socket, &addr, b, len, 0);
return 1;
}
DEFINE_WRC_TASK(daclog) = {
.name = "daclog",
.init = daclog_init,
.job = daclog_poll,
};
static int cmd_daclog(const char *args[])
{
char b1[32], b2[32];
if (args[0] && !strcmp(args[0], "off")) {
configured = 0;
return 0;
}
if (!args[1]) {
pp_printf("use: daclog <ipaddr> <macaddr> (or just \"off\"\n");
return -1;
}
decode_ip(args[0], (void *)&daclog_addr.daddr);
decode_mac(args[1], daclog_mac);
pp_printf("Dac logger parameters: %s, %s, port 1050\n",
format_ip(b1, (void *)&daclog_addr.daddr),
format_mac(b2, daclog_mac));
configured = 1;
ready[0] = ready[1] = 0; /* try to ensure data ordering */
return 0;
}
DEFINE_WRC_COMMAND(daclog) = {
.name = "daclog",
.exec = cmd_daclog,
};
dev/dev.mk
View file @ 55309172
# Those hardware-specific files should not be built for the host, even if
# most of them give no error no warning. The host has different implementations
obj-$(CONFIG_LM32) += dev/uart.o
obj-$(CONFIG_EMBEDDED_NODE) += \
dev/endpoint.o \
dev/ep_pfilter.o \
......@@ -18,15 +20,15 @@ obj-$(CONFIG_WR_NODE) += \
dev/pps_gen.o
obj-$(CONFIG_WR_SWITCH) += dev/timer-wrs.o dev/ad9516.o
obj-$(CONFIG_PUTS_SYSLOG) += dev/puts-syslog.o
obj-$(CONFIG_LEGACY_EEPROM) += dev/eeprom.o
obj-$(CONFIG_SDB_STORAGE) += dev/sdb-storage.o
obj-$(CONFIG_DAC_LOG) += dev/dac_log.o
obj-$(CONFIG_W1) += dev/w1.o dev/w1-hw.o dev/w1-shell.o
obj-$(CONFIG_W1) += dev/w1-temp.o dev/w1-eeprom.o
obj-$(CONFIG_W1) += dev/temp-w1.o
obj-$(CONFIG_UART) += dev/uart.o
obj-$(CONFIG_UART_SW) += dev/uart-sw.o
obj-$(CONFIG_FAKE_TEMPERATURES) += dev/fake-temp.o
......@@ -38,5 +40,11 @@ obj-y += $(pfilter-y:.bin=.o)
rules-%.o: rules-%.bin
$(OBJCOPY) -I binary $(OBJCOPY-TARGET-y) $< $@
# sdbfs image
obj-y += $(sdbfsimg-y:.bin=.o)
sdbfs-default.o: tools/sdbfs-default.bin
$(OBJCOPY) -I binary $(OBJCOPY-TARGET-y) $< $@
$(pfilter-y): tools
tools/pfilter-builder
dev/fake-temp.c
View file @ 55309172
......@@ -42,16 +42,14 @@ static int cmd_faketemp(const char *args[])
}
for (i = 0; i < 3 && args[i]; i++) {
int sign = 1, val;
int val;
/* accept negative, and at most one decimal */
if (args[i][0] == '-')
sign = -1, args[i]++;
/* accept at most one decimal */
dot = fromdec(args[i], &val);
val <<= 16;
if (dot[0] == '.' && dot[1] >= '0' && dot[1] <= '9')
val += 0x10000 / 10 * (dot[1] - '0');
temp_fake_data[i].t = val * sign;
temp_fake_data[i].t = val;
}
return 0;
}
......
dev/flash.c
View file @ 55309172
......@@ -9,6 +9,7 @@
#include <wrc.h>
#include <flash.h>
#include <types.h>
#include <storage.h>
#define SDBFS_BIG_ENDIAN
#include <libsdbfs.h>
......@@ -19,6 +20,7 @@
static void delay(void)
{
int i;
for (i = 0; i < (int)(CPU_CLOCK/10000000); i++)
asm volatile ("nop");
}
......@@ -54,7 +56,7 @@ static uint8_t bbspi_transfer(int cspin, uint8_t val)
/*
* Init function (just set the SPI pins for idle)
*/
void flash_init()
void flash_init(void)
{
gpio_out(GPIO_SPI_NCS, 1);
gpio_out(GPIO_SPI_SCLK, 0);
......@@ -68,17 +70,17 @@ int flash_write(uint32_t addr, uint8_t *buf, int count)
{
int i;
bbspi_transfer(1,0);
bbspi_transfer(0,0x06);
bbspi_transfer(1,0);
bbspi_transfer(0,0x02);
bbspi_transfer(0,(addr & 0xFF0000) >> 16);
bbspi_transfer(0,(addr & 0xFF00) >> 8);
bbspi_transfer(0,(addr & 0xFF));
for ( i = 0; i < count; i++ ) {
bbspi_transfer(0,buf[i]);
bbspi_transfer(1, 0);
bbspi_transfer(0, 0x06);
bbspi_transfer(1, 0);
bbspi_transfer(0, 0x02);
bbspi_transfer(0, (addr & 0xFF0000) >> 16);
bbspi_transfer(0, (addr & 0xFF00) >> 8);
bbspi_transfer(0, (addr & 0xFF));
for (i = 0; i < count; i++) {
bbspi_transfer(0, buf[i]);
}
bbspi_transfer(1,0);
bbspi_transfer(1, 0);
/* make sure the write is complete */
while (flash_rsr() & 0x01) {
......@@ -94,16 +96,17 @@ int flash_write(uint32_t addr, uint8_t *buf, int count)
int flash_read(uint32_t addr, uint8_t *buf, int count)
{
int i;
bbspi_transfer(1,0);
bbspi_transfer(0,0x0b);
bbspi_transfer(0,(addr & 0xFF0000) >> 16);
bbspi_transfer(0,(addr & 0xFF00) >> 8);
bbspi_transfer(0,(addr & 0xFF));
bbspi_transfer(0,0);
for ( i = 0; i < count; i++ ) {
bbspi_transfer(1, 0);
bbspi_transfer(0, 0x0b);
bbspi_transfer(0, (addr & 0xFF0000) >> 16);
bbspi_transfer(0, (addr & 0xFF00) >> 8);
bbspi_transfer(0, (addr & 0xFF));
bbspi_transfer(0, 0);
for (i = 0; i < count; i++) {
buf[i] = bbspi_transfer(0, 0);
}
bbspi_transfer(1,0);
bbspi_transfer(1, 0);
return count;
}
......@@ -114,15 +117,16 @@ int flash_erase(uint32_t addr, int count)
int sectors;
/*calc number of sectors to be removed*/
if(count % FLASH_BLOCKSIZE > 0)
if (count % storage_cfg.blocksize > 0)
sectors = 1;
else
sectors = 0;
sectors += (count / FLASH_BLOCKSIZE);
sectors += (count / storage_cfg.blocksize);
for(i=0; i<sectors; ++i) {
flash_serase(addr + i*FLASH_BLOCKSIZE);
while(flash_rsr() & 0x01);
for (i = 0; i < sectors; ++i) {
flash_serase(addr + i*storage_cfg.blocksize);
while (flash_rsr() & 0x01)
;
}
return count;
......@@ -133,45 +137,46 @@ int flash_erase(uint32_t addr, int count)
*/
void flash_serase(uint32_t addr)
{
bbspi_transfer(1,0);
bbspi_transfer(0,0x06);
bbspi_transfer(1,0);
bbspi_transfer(0,0xD8);
bbspi_transfer(0,(addr & 0xFF0000) >> 16);
bbspi_transfer(0,(addr & 0xFF00) >> 8);
bbspi_transfer(0,(addr & 0xFF));
bbspi_transfer(1,0);
bbspi_transfer(1, 0);
bbspi_transfer(0, 0x06);
bbspi_transfer(1, 0);
bbspi_transfer(0, 0xD8);
bbspi_transfer(0, (addr & 0xFF0000) >> 16);
bbspi_transfer(0, (addr & 0xFF00) >> 8);
bbspi_transfer(0, (addr & 0xFF));
bbspi_transfer(1, 0);
}
/*
* Bulk erase
*/
void
flash_berase()
flash_berase(void)
{
bbspi_transfer(1,0);
bbspi_transfer(0,0x06);
bbspi_transfer(1,0);
bbspi_transfer(0,0xc7);
bbspi_transfer(1,0);
bbspi_transfer(1, 0);
bbspi_transfer(0, 0x06);
bbspi_transfer(1, 0);
bbspi_transfer(0, 0xc7);
bbspi_transfer(1, 0);
}
/*
* Read status register
*/
uint8_t flash_rsr()
uint8_t flash_rsr(void)
{
uint8_t retval;
bbspi_transfer(1,0);
bbspi_transfer(0,0x05);
retval = bbspi_transfer(0,0);
bbspi_transfer(1,0);
bbspi_transfer(1, 0);
bbspi_transfer(0, 0x05);
retval = bbspi_transfer(0, 0);
bbspi_transfer(1, 0);
return retval;
}
/*****************************************************************************/
/* SDB */
/* SDB */
/*****************************************************************************/
/* The sdb filesystem itself */
......@@ -202,7 +207,8 @@ static void flash_sdb_list(struct sdbfs *fs)
{
struct sdb_device *d;
int new = 1;
while ( (d = sdbfs_scan(fs, new)) != NULL) {
while ((d = sdbfs_scan(fs, new)) != NULL) {
d->sdb_component.product.record_type = '\0';
pp_printf("file 0x%08x @ %4i, name %19s\n",
(int)(d->sdb_component.product.device_id),
......@@ -215,19 +221,19 @@ static void flash_sdb_list(struct sdbfs *fs)
/*
* Check for SDB presence on flash
*/
int flash_sdb_check()
int flash_sdb_check(void)
{
uint32_t magic = 0;
int i;
uint32_t entry_point[] = {
0x000000, // flash base
0x100, // second page in flash
0x200, // IPMI with MultiRecord
0x300, // IPMI with larger MultiRecord
0x170000, // after first FPGA bitstream
0x2e0000 // after MultiBoot bitstream
};
0x000000, /* flash base */
0x100, /* second page in flash */
0x200, /* IPMI with MultiRecord */
0x300, /* IPMI with larger MultiRecord */
0x170000, /* after first FPGA bitstream */
0x2e0000 /* after MultiBoot bitstream */
};
for (i = 0; i < ARRAY_SIZE(entry_point); i++) {
flash_read(entry_point[i], (uint8_t *)&magic, 4);
......
dev/i2c.c
View file @ 55309172
......@@ -12,17 +12,15 @@
#include "syscon.h"
#include "i2c.h"
#define I2C_DELAY 300
void mi2c_delay(void)
void mi2c_delay(uint32_t delay)
{
int i;
for (i = 0; i < I2C_DELAY; i++)
for (i = 0; i < delay; i++)
asm volatile ("nop");
}
#define M_SDA_OUT(i, x) { gpio_out(i2c_if[i].sda, x); mi2c_delay(); }
#define M_SCL_OUT(i, x) { gpio_out(i2c_if[i].scl, x); mi2c_delay(); }
#define M_SDA_OUT(i, x) { gpio_out(i2c_if[i].sda, x); mi2c_delay(i2c_if[i].loop_delay); }
#define M_SCL_OUT(i, x) { gpio_out(i2c_if[i].scl, x); mi2c_delay(i2c_if[i].loop_delay); }
#define M_SDA_IN(i) gpio_in(i2c_if[i].sda)
void mi2c_start(uint8_t i2cif)
......
dev/minic.c
View file @ 55309172
......@@ -31,8 +31,6 @@
#define RX_OOB_SIZE 3 /* as the number of FIFO data words */
#define ETH_HEADER_SIZE 14
// extracts the values of TS rising and falling edge counters from the descriptor header
#define EXPLODE_WR_TIMESTAMP(raw, rc, fc) \
......@@ -199,7 +197,7 @@ int minic_rx_frame(struct wr_ethhdr *hdr, uint8_t * payload, uint32_t buf_size,
&& counter_ppsg < 250000000)
sec--;
hwts->sec = sec & 0x7fffffff;
hwts->sec = sec;
cntr_diff = (counter_r & F_COUNTER_MASK) - counter_f;
......
dev/puts-syslog.c 0 → 100644
View file @ 55309172
#include <wrc.h>
#include <string.h>
#include <uart.h>
#include <shell.h>
#include <lib/ipv4.h>
int puts(const char *s)
{
char new_s[CONFIG_PRINT_BUFSIZE + 4];
int l, ret;
ret = uart_write_string(s);
l = strlen(s);
/* avoid shell-interation stuff */
if (shell_is_interacting)
return ret;
if (l < 2 || s[0] == '\e')
return ret;
if (!strncmp(s, "wrc#", 4))
return ret;
/* if not terminating with newline, add a trailing "...\n" */
strcpy(new_s, s);
if (s[l-1] != '\n') {
new_s[l++] = '.';
new_s[l++] = '.';
new_s[l++] = '.';
new_s[l++] = '\n';
new_s[l++] = '\0';
}
syslog_report(new_s);
return ret;
}
dev/sdb-storage.c
View file @ 55309172
......@@ -7,6 +7,7 @@
*
* Released according to the GNU GPL, version 2 or any later version.
*/
#include <errno.h>
#include <wrc.h>
#include <w1.h>
#include <storage.h>
......@@ -15,6 +16,7 @@
#include "i2c.h"
#include "onewire.h"
#include "endpoint.h"
#include "syscon.h"
#include <sdb.h>
#define SDBFS_BIG_ENDIAN
......@@ -35,6 +37,8 @@
#define EEPROM_START_ADR 0
#define EEPROM_STOP_ADR 127
struct storage_config storage_cfg;
/* Functions for Flash access */
static int sdb_flash_read(struct sdbfs *fs, int offset, void *buf, int count)
{
......@@ -169,6 +173,7 @@ static void storage_sdb_list(struct sdbfs *fs)
{
struct sdb_device *d;
int new = 1;
while ((d = sdbfs_scan(fs, new)) != NULL) {
d->sdb_component.product.record_type = '\0';
pp_printf("file 0x%08x @ %4i, name %s\n",
......@@ -220,7 +225,7 @@ void storage_init(int chosen_i2cif, int chosen_i2c_addr)
pp_printf("sdbfs: found at %i in Flash\n",
entry_points_flash[i]);
wrc_sdb.drvdata = NULL;
wrc_sdb.blocksize = FLASH_BLOCKSIZE;
wrc_sdb.blocksize = storage_cfg.blocksize;
wrc_sdb.entrypoint = entry_points_flash[i];
wrc_sdb.read = sdb_flash_read;
wrc_sdb.write = sdb_flash_write;
......@@ -259,7 +264,7 @@ void storage_init(int chosen_i2cif, int chosen_i2c_addr)
i2c_params.addr = EEPROM_START_ADR;
while (i2c_params.addr <= EEPROM_STOP_ADR) {
/* First, we check if I2C EEPROM is there */
if (!mi2c_devprobe(i2c_params.ifnum, i2c_params.addr)) {
if (!mi2c_devprobe(i2c_params.ifnum, i2c_params.addr)) {
i2c_params.addr++;
continue;
}
......@@ -694,6 +699,7 @@ int storage_init_show(void)
if (sdbfs_open_id(&wrc_sdb, SDB_VENDOR, SDB_DEV_INIT) < 0)
return -1;
pp_printf("-- user-defined script --\n");
used = 0;
do {
if (sdbfs_fread(&wrc_sdb, sizeof(used) + used, &byte, 1) != 1)
......@@ -705,7 +711,7 @@ int storage_init_show(void)
} while (byte != 0xff);
if (used == 0)
pp_printf("Empty init script...\n");
pp_printf("(empty)\n");
ret = 0;
out:
sdbfs_close(&wrc_sdb);
......@@ -737,3 +743,160 @@ out:
sdbfs_close(&wrc_sdb);
return ret;
}
int storage_read_hdl_cfg(void)
{
get_storage_info(&storage_cfg.memtype, &storage_cfg.baseadr,
&storage_cfg.blocksize);
if (storage_cfg.memtype == MEM_FLASH && storage_cfg.blocksize == 0) {
storage_cfg.valid = 0;
/* keep default blocksize for backwards compatibility */
storage_cfg.blocksize = FLASH_BLOCKSIZE;
} else
storage_cfg.valid = 1;
return 0;
}
extern uint32_t _binary_tools_sdbfs_default_bin_start[];
extern uint32_t _binary_tools_sdbfs_default_bin_end[];
static inline unsigned long SDB_ALIGN(unsigned long x, int blocksize)
{
return (x + (blocksize - 1)) & ~(blocksize - 1);
}
int storage_sdbfs_erase(int mem_type, uint32_t base_adr, uint32_t blocksize,
uint8_t i2c_adr)
{
if (!HAS_GENSDBFS || (mem_type == MEM_FLASH && blocksize == 0))
return -EINVAL;
if (mem_type == MEM_FLASH) {
pp_printf("Erasing Flash(0x%x)...\n", base_adr);
sdb_flash_erase(NULL, base_adr, SDBFS_REC * blocksize);
} else if (mem_type == MEM_EEPROM) {
pp_printf("Erasing EEPROM %d (0x%x)...\n", i2c_adr, base_adr);
i2c_params.ifnum = WRPC_FMC_I2C;
i2c_params.addr = i2c_adr;
wrc_sdb.drvdata = &i2c_params;
sdb_i2c_erase(&wrc_sdb, base_adr, SDBFS_REC *
sizeof(struct sdb_device));
} else if (mem_type == MEM_1W_EEPROM) {
pp_printf("Erasing 1-W EEPROM (0x%x)...\n", base_adr);
wrc_sdb.drvdata = &wrpc_w1_bus;
sdb_w1_erase(&wrc_sdb, base_adr, SDBFS_REC *
sizeof(struct sdb_device));
}
return 0;
}
int storage_gensdbfs(int mem_type, uint32_t base_adr, uint32_t blocksize,
uint8_t i2c_adr)
{
struct sdb_device *sdbfs =
(struct sdb_device *) _binary_tools_sdbfs_default_bin_start;
struct sdb_interconnect *sdbfs_dir = (struct sdb_interconnect *)
_binary_tools_sdbfs_default_bin_start;
/* struct sdb_device sdbfs_buf[SDBFS_REC]; */
int i;
char buf[19] = {0};
int cur_adr, size;
uint32_t val;
if (!HAS_GENSDBFS || (mem_type == MEM_FLASH && base_adr == 0))
return -EINVAL;
if (mem_type == MEM_FLASH && blocksize == 0)
return -EINVAL;
/* first file starts after the SDBFS description */
cur_adr = base_adr + SDB_ALIGN(SDBFS_REC*sizeof(struct sdb_device),
blocksize);
/* scan through files */
for (i = 1; i < SDBFS_REC; ++i) {
/* relocate each file depending on base address and block size*/
size = sdbfs[i].sdb_component.addr_last -
sdbfs[i].sdb_component.addr_first;
sdbfs[i].sdb_component.addr_first = cur_adr;
sdbfs[i].sdb_component.addr_last = cur_adr + size;
cur_adr = SDB_ALIGN(cur_adr + (size + 1), blocksize);
}
/* update the directory */
sdbfs_dir->sdb_component.addr_first = base_adr;
sdbfs_dir->sdb_component.addr_last =
sdbfs[SDBFS_REC-1].sdb_component.addr_last;
for (i = 0; i < SDBFS_REC; ++i) {
strncpy(buf, (char *)sdbfs[i].sdb_component.product.name, 18);
pp_printf("filename: %s; first: %x; last: %x\n", buf,
(int)sdbfs[i].sdb_component.addr_first,
(int)sdbfs[i].sdb_component.addr_last);
}
size = sizeof(struct sdb_device);
if (mem_type == MEM_FLASH) {
pp_printf("Formatting SDBFS in Flash(0x%x)...\n", base_adr);
/* each file is in a separate block, therefore erase SDBFS_REC
* number of blocks */
sdb_flash_erase(NULL, base_adr, SDBFS_REC * blocksize);
for (i = 0; i < SDBFS_REC; ++i) {
sdb_flash_write(NULL, base_adr + i*size, &sdbfs[i],
size);
}
/*
pp_printf("Verification...");
sdb_flash_read(NULL, base_adr, sdbfs_buf, SDBFS_REC *
sizeof(struct sdb_device));
if(memcmp(sdbfs, sdbfs_buf, SDBFS_REC *
sizeof(struct sdb_device)))
pp_printf("Error.\n");
else
pp_printf("OK.\n");
*/
} else if (mem_type == MEM_EEPROM) {
/* First, check if EEPROM is really there */
if (!mi2c_devprobe(WRPC_FMC_I2C, i2c_adr)) {
pp_printf("I2C EEPROM not found\n");
return -EINVAL;
}
i2c_params.ifnum = WRPC_FMC_I2C;
i2c_params.addr = i2c_adr;
pp_printf("Formatting SDBFS in I2C EEPROM %d (0x%x)...\n",
i2c_params.addr, base_adr);
wrc_sdb.drvdata = &i2c_params;
sdb_i2c_erase(&wrc_sdb, base_adr, SDBFS_REC * size);
for (i = 0; i < SDBFS_REC; ++i) {
sdb_i2c_write(&wrc_sdb, base_adr + i*size, &sdbfs[i],
size);
}
/*
pp_printf("Verification...");
sdb_i2c_read(&wrc_sdb, base_adr, sdbfs_buf, SDBFS_REC *
sizeof(struct sdb_device));
if(memcmp(sdbfs, sdbfs_buf, SDBFS_REC *
sizeof(struct sdb_device)))
pp_printf("Error.\n");
else
pp_printf("OK.\n");
*/
} else if (mem_type == MEM_1W_EEPROM) {
wrc_sdb.drvdata = &wrpc_w1_bus;
if (sdb_w1_read(&wrc_sdb, 0, &val, sizeof(val)) !=
sizeof(val)) {
pp_printf("1-Wire EEPROM not found\n");
return -EINVAL;
}
pp_printf("Formatting SDBFS in 1-W EEPROM (0x%x)...\n",
base_adr);
sdb_w1_erase(&wrc_sdb, base_adr, SDBFS_REC * size);
for (i = 0; i < SDBFS_REC; ++i) {
sdb_w1_write(&wrc_sdb, base_adr + i*size, &sdbfs[i],
size);
}
}
/* re-initialize storage after writing sdbfs image */
storage_init(WRPC_FMC_I2C, FMC_EEPROM_ADR);
return mem_type;
}
dev/sfp.c
View file @ 55309172
......@@ -26,12 +26,12 @@ int32_t sfp_in_db = 0;
char sfp_pn[SFP_PN_LEN];
int sfp_present(void)
static int sfp_present(void)
{
return !gpio_in(GPIO_SFP_DET);
}
int sfp_read_part_id(char *part_id)
static int sfp_read_part_id(char *part_id)
{
int i;
uint8_t data, sum;
......
dev/syscon.c
View file @ 55309172
......@@ -8,14 +8,37 @@
*/
#include "syscon.h"
#include <errno.h>
#include <string.h>
struct s_i2c_if i2c_if[2] = {
{SYSC_GPSR_FMC_SCL, SYSC_GPSR_FMC_SDA},
{SYSC_GPSR_SFP_SCL, SYSC_GPSR_SFP_SDA}
{SYSC_GPSR_FMC_SCL, SYSC_GPSR_FMC_SDA, FMC_I2C_DELAY},
{SYSC_GPSR_SFP_SCL, SYSC_GPSR_SFP_SDA, SFP_I2C_DELAY}
};
volatile struct SYSCON_WB *syscon;
/****************************
* BOARD NAME
***************************/
void get_hw_name(char *str)
{
uint32_t val;
val = syscon->HWIR;
memcpy(str, &val, HW_NAME_LENGTH-1);
}
/****************************
* Flash info
***************************/
void get_storage_info(int *memtype, uint32_t *sdbfs_baddr, uint32_t *blocksize)
{
/* convert sector size from KB to bytes */
*blocksize = SYSC_HWFR_STORAGE_SEC_R(syscon->HWFR) * 1024;
*sdbfs_baddr = syscon->SDBFS;
*memtype = SYSC_HWFR_STORAGE_TYPE_R(syscon->HWFR);
}
/****************************
* TIMER
***************************/
......@@ -38,7 +61,9 @@ void timer_delay(uint32_t tics)
{
uint32_t t_end;
// timer_init(1);
/*
timer_init(1);
*/
t_end = timer_get_tics() + tics;
while (time_before(timer_get_tics(), t_end))
......@@ -110,3 +135,80 @@ void net_rst(void)
syscon->GPSR |= SYSC_GPSR_NET_RST;
}
int wdiag_set_valid(int enable)
{
if (enable)
syscon->WDIAG_CTRL |= SYSC_WDIAG_CTRL_DATA_VALID;
if (!enable)
syscon->WDIAG_CTRL &= ~SYSC_WDIAG_CTRL_DATA_VALID;
return (int)(syscon->WDIAG_CTRL & SYSC_WDIAG_CTRL_DATA_VALID);
}
int wdiag_get_valid(void)
{
if (syscon->WDIAG_CTRL & SYSC_WDIAG_CTRL_DATA_VALID)
return 1;
else
return 0;
}
int wdiag_get_snapshot(void)
{
if (syscon->WDIAG_CTRL & SYSC_WDIAG_CTRL_DATA_SNAPSHOT)
return 1;
else
return 0;
}
void wdiags_write_servo_state(int wr_mode, uint8_t servostate, uint64_t mu,
uint64_t dms, int32_t asym, int32_t cko,
int32_t setp, int32_t ucnt)
{
syscon->WDIAG_SSTAT = wr_mode ? SYSC_WDIAG_SSTAT_WR_MODE:0;
syscon->WDIAG_SSTAT |= SYSC_WDIAG_SSTAT_SERVOSTATE_W(servostate);
syscon->WDIAG_MU_MSB = 0xFFFFFFFF & (mu>>32);
syscon->WDIAG_MU_LSB = 0xFFFFFFFF & mu;
syscon->WDIAG_DMS_MSB = 0xFFFFFFFF & (dms>>32);
syscon->WDIAG_DMS_LSB = 0xFFFFFFFF & dms;
syscon->WDIAG_ASYM = asym;
syscon->WDIAG_CKO = cko;
syscon->WDIAG_SETP = setp;
syscon->WDIAG_UCNT = ucnt;
}
void wdiags_write_port_state(int link, int locked)
{
uint32_t val = 0;
val = link ? SYSC_WDIAG_PSTAT_LINK : 0;
val |= locked ? SYSC_WDIAG_PSTAT_LOCKED : 0;
syscon->WDIAG_PSTAT = val;
}
void wdiags_write_ptp_state(uint8_t ptpstate)
{
syscon->WDIAG_PTPSTAT = SYSC_WDIAG_PTPSTAT_PTPSTATE_W(ptpstate);
}
void wdiags_write_aux_state(uint32_t aux_states)
{
syscon->WDIAG_ASTAT = SYSC_WDIAG_ASTAT_AUX_W(aux_states);
}
void wdiags_write_cnts(uint32_t tx, uint32_t rx)
{
syscon->WDIAG_TXFCNT = tx;
syscon->WDIAG_RXFCNT = rx;
}
void wdiags_write_time(uint64_t sec, uint32_t nsec)
{
syscon->WDIAG_SEC_MSB = 0xFFFFFFFF & (sec>>32);
syscon->WDIAG_SEC_LSB = 0xFFFFFFFF & sec;
syscon->WDIAG_NS = nsec;
}
void wdiags_write_temp(uint32_t temp)
{
syscon->WDIAG_TEMP = temp;
}
dev/uart-sw.c deleted 100644 → 0
View file @ 62d60bf4
/*
* This work is part of the White Rabbit project
*
* Copyright (C) 2013 CERN (www.cern.ch)
* Author: Alessandro Rubini <rubini@gnudd.com>
*
* Released according to the GNU GPL, version 2 or any later version.
*/
#include <wrc.h>
#include <uart-sw.h>
static struct wrc_uart_sw __attribute__((aligned(16))) uart_sw_dev = {
.magic = UART_SW_MAGIC,
.wsize = CONFIG_UART_SW_WSIZE,
.rsize = CONFIG_UART_SW_RSIZE,
};
static uint16_t nreturned;
void uart_init_sw(void)
{
/* zero fields, as we may be reloaded */
uart_sw_dev.nwritten = uart_sw_dev.nread = 0;
}
void __attribute__((weak)) uart_init_hw(void)
{}
static void uart_sw_write_byte(int b)
{
int index;
if (b == '\n')
uart_sw_write_byte('\r');
index = uart_sw_dev.nwritten % CONFIG_UART_SW_WSIZE;
uart_sw_dev.wbuffer[index] = b;
uart_sw_dev.nwritten++;
/* fake a real uart, so user-space can poll not-too-fast */
usleep(1000 * 1000 / 11520);
}
int uart_sw_write_string(const char *s)
{
const char *t = s;
while (*s)
uart_sw_write_byte(*(s++));
return s - t;
}
static int uart_sw_read_byte(void)
{
int index;
if (nreturned == uart_sw_dev.nread) /* nread == written by host */
return -1;
index = (nreturned++) % CONFIG_UART_SW_RSIZE;
return uart_sw_dev.rbuffer[index];
}
/* alias the "hw" names to these, so this applies if !CONFIG_UART */
int puts(const char *s)
__attribute__((alias("uart_sw_write_string"), weak));
void uart_write_byte(int b)
__attribute__((alias("uart_sw_write_byte"), weak));
int uart_write_string(const char *s)
__attribute__((alias("uart_sw_write_string"), weak));
int uart_read_byte(void)
__attribute__((alias("uart_sw_read_byte"), weak));
dev/uart.c
View file @ 55309172
......@@ -11,7 +11,7 @@
#include "board.h"
#include "uart.h"
#include <hw/wb_vuart.h>
#include <hw/wb_uart.h>
#define CALC_BAUD(baudrate) \
( ((( (unsigned long long)baudrate * 8ULL) << (16 - 7)) + \
......@@ -25,10 +25,6 @@ void uart_init_hw()
uart->BCR = CALC_BAUD(UART_BAUDRATE);
}
void __attribute__((weak)) uart_init_sw(void)
{}
void uart_write_byte(int b)
{
if (b == '\n')
......@@ -60,8 +56,4 @@ int uart_read_byte(void)
}
int puts(const char *s)
__attribute__((alias("uart_write_string")));
/* The next alias is for ppsi log messages, that go to sw_uart if built */
int uart_sw_write_string(const char *s)
__attribute__((alias("uart_write_string"), weak));
__attribute__((weak,alias("uart_write_string")));
doc/HDLdoc/timecode.tex
View file @ 55309172
......@@ -2,6 +2,6 @@
\label{sec:wrpc_timecode}
Timecode interface provides current time to the other HDL modules in a form that
can be easily used. It consists of: a 1-PPS and a UTC timecode
can be easily used. It consists of: a 1-PPS and a TAI timecode
aligned to the time of WR Master.
doc/HDLdoc/wrc_board.tex
View file @ 55309172
......@@ -66,6 +66,12 @@ their own BSP, can find the board-common module under:
\cline{1-3}
g\_with\_external\_clock\_input & boolean & true & \\
\cline{1-3}
g\_board\_name & string & "NA " & \\
\cline{1-3}
g\_flash\_secsz\_kb & integer & 256 & \\
\cline{1-3}
g\_flash\_sdbfs\_baddr & integer & 0x600000 & \\
\cline{1-3}
g\_aux\_clks & integer & 0 & \\
\cline{1-3}
g\_dpram\_initf & string & "" & \\
......@@ -78,10 +84,17 @@ their own BSP, can find the board-common module under:
\cline{1-3}
g\_diag\_rw\_size & integer & 0 & \\
\hline
g\_tx\_streamer\_width & integer & 32 & \multirowpar{2}{TX/RX
data width when \tts{g\_fabric\_iface = STREAMERS} (otherwise ignored)}\\
g\_streamers\_op\_mode & enum & TX\_AND\_RX & Selects whether both TX and RX
streamer modules should be instantiated or only one of them when
\tts{g\_fabric\_iface = STREAMERS} (otherwise ignored)\\
\hline
g\_tx\_streamer\_params & record & default record & \multirowpar{2}{various TX/RX
streamers parameters when \tts{g\_fabric\_iface = STREAMERS} (otherwise
ignored)\footnote{See Streamers wiki page for detailed description of the
configuration records:
\url{http://www.ohwr.org/projects/wr-cores/wiki/TxRx_Streamers}}}\\
\cline{1-3}
g\_rx\_streamer\_width & integer & 32 & \\
g\_rx\_streamers\_params & record & default record & \\
\hline
g\_fabric\_iface & enum & PLAIN & optional module to be attached to the
fabric interface of WRPC \tts{[PLAIN/STREAMERS/ETHERBONE]}\\
......@@ -109,7 +122,7 @@ their own BSP, can find the board-common module under:
rst\_62m5\_n\_o & out & 1 & Active low reset output, synchronous to \tts{clk\_sys\_62m5\_o}\\
\hline
rst\_125m\_n\_o & out & 1 & Active low reset output, synchronous to \tts{clk\_ref\_125m\_o}\\
\hline\pagebreak
\hline
\hdltablesection{Interface with SFP}\\
\hline
sfp\_tx\_fault\_i & in & 1 & TX fault indicator\\
......@@ -142,6 +155,11 @@ their own BSP, can find the board-common module under:
\cline{1-3}
wb\_slave\_i & in & rec & \\
\hline
aux\_master\_o & out & rec & \multirowpar{2}{Mapped to WRPC auxiliary WB
master interface (see also Section~\ref{sec:wrpc_wb})}\\
\cline{1-3}
aux\_master\_i & in & rec & \\
\hline
\hdltablesection{WR fabric interface (when \tts{g\_fabric\_iface = plain})}\\
\hline
wrf\_src\_o & out & rec & \multirowpar{4}{Mapped to WRPC fabric interface
......@@ -168,6 +186,13 @@ their own BSP, can find the board-common module under:
wrs\_tx\_flush\_i & in & 1 & When asserted, the streamer will immediatly send
out all the data that is stored in its TX buffer\\
\hline
wrs\_tx\_cfg\_i & in & rec & \multirowpar{2}{Networking configuration of Tx/Rx
Streamers\footnote{See Streamers wiki page for detailed description of the
network configuration:
\url{http://www.ohwr.org/projects/wr-cores/wiki/TxRx_Streamers}}}\\
\cline{1-3}
wrs\_rx\_cfg\_i & in & rec & \\
\hline
wrs\_rx\_first\_o & out & 1 & Indicates the first word of the data block on \tts{wrs\_rx\_data\_o}\\
\hline
wrs\_rx\_last\_o & out & 1 & Indicates the last word of the data block on \tts{wrs\_rx\_data\_o}\\
......@@ -208,7 +233,7 @@ their own BSP, can find the board-common module under:
\hline
tm\_clk\_aux\_locked\_o & out & var & auxiliary clock locked to internal WR
clock. Size is equal to \tts{g\_aux\_clks}\\
\hline
\hline \pagebreak
\hdltablesection{External TX timestamp interface}\\
\hline
timestamps\_o & out & rec & Record-based output ports for
......@@ -217,6 +242,11 @@ their own BSP, can find the board-common module under:
txtsu\_ack\_i & in & 1 & acknowledge, indicating that user-defined module
has received the timestamp\\
\hline
abscal\_txts\_o & out & 1 & \multirowpar{2}{[optional] Endpoint timestamping
triggers used in the absolute calibration procedure} \\
\cline{1-3}
abscal\_rxts\_o & out & 1 & \\
\hline
\hdltablesection{Pause frame control}\\
\hline
fc\_tx\_pause\_req\_i & in & 1 & [optional] Ethernet flow control, request sending
......@@ -295,6 +325,10 @@ Section~\ref{sec:hdl_board_common_param} for a the list of common BSP parameters
\hline
areset\_n\_i & in & 1 & Reset input (active low, can be async)\\
\hline
areset\_edge\_n\_i & in & 1 & [optional] Reset input edge sensitive (active
rising-edge, can be async). Should be connected to PCIe reset if the board
should be able to operate both in hosted and standalone configuration.\\
\hline
clk\_20m\_vcxo\_i & in & 1 & 20MHz clock input from board VCXO\\
\hline
clk\_125m\_pllref\_p\_i & in & 1 & \multirowpar{2}{125MHz PLL reference
......@@ -389,6 +423,9 @@ Section~\ref{sec:hdl_board_common_param} for a the list of common BSP parameters
\hline
areset\_n\_i & in & 1 & Reset input (active low, can be async)\\
\hline
areset\_edge\_n\_i & in & 1 & [optional] Reset input edge sensitive (active
rising-edge, can be async).\\
\hline
clk\_20m\_vcxo\_i & in & 1 & 20MHz clock input from board VCXO\\
\hline
clk\_125m\_pllref\_p\_i & in & 1 & \multirowpar{2}{125MHz PLL reference
......@@ -490,6 +527,9 @@ Parameters and ports common to all BSPs are described in Section~\ref{sec:hdl_bo
\hline
areset\_n\_i & in & 1 & Reset input (active low, can be async)\\
\hline
areset\_edge\_n\_i & in & 1 & [optional] Reset input edge sensitive (active
rising-edge, can be async).\\
\hline
clk\_board\_20m\_i & in & 1 & 20MHz clock input from board\\
\hline
clk\_board\_125m\_i & in & 1 & 125MHz reference clock input from board\\
......
doc/HDLdoc/wrc_generics.tex
View file @ 55309172
......@@ -8,6 +8,17 @@
g\_with\_external\_clock\_input & boolean & false &
enable external clock and 1-PPS inputs. The PLL inside WRPC will lock to
external 10 MHz and 1-PPS signal when operating in GrandMaster mode\\
\hline
g\_board\_name & string & "NA " & board name, exported by WRPC software as
SNMP object for diagnostics\\
\hline
g\_flash\_secsz\_kb & integer & 256 & Flash memory sector size in kilobytes.
Available through a Wishbone register, used by WRPC software to read/write
SDBFS image\\
\hline
g\_flash\_sdbfs\_baddr & integer & 0x600000 & Default base address in Flash
memory where \code{sdb fs} command should store an empty SDBFS image\\
\hline
g\_phys\_uart & boolean & true & enable physical UART interface\\
\hline
g\_virtual\_uart & boolean & false & enable virtual UART interface\\
......
doc/HDLdoc/wrc_platform.tex
View file @ 55309172
......@@ -165,18 +165,19 @@ PSP. Parameters and ports common to all PSPs are described in Section~\ref{sec:h
\subsubsection{Xilinx}
\label{sec:hdl_platform_xilinx}
The Xilinx PSP currently supports the Spartan 6 family of FPGAs.
The Xilinx PSP currently supports the Spartan 6 and Kintex 7 (also inside Zynq) family of FPGAs.
The top-level VHDL module is located under:\\ \hrefwrpc{platform/xilinx/xwrc\_platform\_xilinx.vhd}
A VHDL package with the definition of the module can be found
under:\\ \hrefwrpc{platform/wr\_xilinx\_pkg.vhd}
Examples of (VHDL) instantiation of this module can be found in the SPEC and SVEC board support
packages (see also Sections~\ref{sec:hdl_board_spec}
Examples of (VHDL) instantiation of this module can be found in the SPEC, SVEC
and FASEC board support packages (see also Sections~\ref{sec:hdl_board_spec}
and~\ref{sec:hdl_board_svec}):\\
\hrefwrpc{board/spec/xwrc\_board\_spec.vhd}\\
\hrefwrpc{board/svec/xwrc\_board\_svec.vhd}
\hrefwrpc{board/svec/xwrc\_board\_svec.vhd}\\
\hrefwrpc{board/fasec/xwrc\_board\_fasec.vhd}\\
This section describes the generic parameters and ports which are
specific to the Xilinx PSP. Parameters and ports common to all PSPs
......
doc/HDLdoc/wrc_ports.tex
View file @ 55309172
......@@ -29,7 +29,7 @@
\hline
rst\_n\_i & in & 1 & main reset input, active-low (hold for at least 5
\tts{clk\_sys\_i} cycles)\\
\hline
\hline\pagebreak
\hdltablesection{Timing system}\\
\hline
dac\_hpll\_load\_p1\_o & out & 1 & validates DAC value on data port \\
......@@ -89,7 +89,7 @@
when \tts{g\_pcs\_16bit = true}}\\
\cline{1-3}
phy16\_i & in & rec & \\
\hline
\hline\pagebreak
\hdltablesection{GPIO}\\
\hline
led\_act\_o & out & 1 & signal for driving Ethernet activity LED\\
......@@ -103,7 +103,7 @@
scl\_i & in & 1 & \\
\cline{1-3}
scl\_o & out & 1 & \\
\hline\pagebreak
\hline
sfp\_sda\_i & in & 1 & \multirowpar{4}{I2C interface for EEPROM inside SFP module}\\
\cline{1-3}
sfp\_sda\_o & out & 1 & \\
......
doc/wbgen/wr_streamers_wb.tex 0 → 100644
View file @ 55309172
This diff is collapsed.
doc/wbgen/wrc_diags.tex 0 → 100644
View file @ 55309172
This diff is collapsed.
doc/wrpc.tex
View file @ 55309172
This diff is collapsed.
doc/wrpc_failures/.gitignore 0 → 100644
View file @ 55309172
revinfo.tex
wrpc_failures.pdf
doc/wrpc_failures/Makefile 0 → 100644
View file @ 55309172
all : wrpc_failures.pdf
.PHONY : all clean
RELEASE = $(shell git describe --always --dirty)
wrpc_failures.pdf : wrpc_failures.tex fail.tex intro.tex snmp_objects.tex snmp_exports.tex
@echo '\\newcommand{\\gitrevinfo}{'$(RELEASE)'}' > revinfo.tex
pdflatex wrpc_failures.tex
pdflatex wrpc_failures.tex
# To speed up generation of document for development, please comment out:
# % print alphabetical list
# \printnoidxglossary[type=snmp_all,style=tree,sort=letter]
# from doc/wrpc_failures/snmp_exports.tex file.
clean :
rm -f *.eps *.dat *.log *.out *.aux *.dvi *.ps *.toc *.pdf revinfo.tex
doc/wrpc_failures/fail.tex 0 → 100644
View file @ 55309172
This diff is collapsed.
doc/wrpc_failures/intro.tex 0 → 100644
View file @ 55309172
\section{Introduction}
This document provides information about the diagnostics of the White Rabbit
PTP Core (WRPC) - an HDL module present in every White Rabbit node. It is a
complementary documentation to the official \emph{White Rabbit PTP Core User's
Manual} published with every stable release. Please refer to this user manual
for the information about the WRPC, its interfaces and building instructions for
the official reference designs.\\
White Rabbit PTP Core starting from \emph{v4.0} provides diagnostic mechanisms
in the form of SNMP objects and optional Syslog messages (depending on the build
time LM32 software configuration). The implementation of an SNMP agent in the
WRPC is very basic comparing to the diagnostics offered by the White Rabbit
Switch. Since we are very constraint on the code size running inside the WR PTP
Core, almost all of the logic to detect and report errors has to be implemented
on the SNMP Manager's side.\\
This document has many internal hyperlinks that associate SNMP objects with
related problems description and the other way round. These links can be easily
used when reading the document on a computer.
doc/wrpc_failures/snmp_exports.tex 0 → 100644
View file @ 55309172
\section{List of exported SNMP objects}
This section lists all the SNMP objects exported by the WR PTP Core. The objects
provide read-only values unless stated otherwise in their description.\\
\printnoidxglossary[type=snmp_status,title=,style=objtree,sort=def]
doc/wrpc_failures/snmp_objects.tex 0 → 100644
View file @ 55309172
This diff is collapsed.
doc/wrpc_failures/wrpc_failures.tex 0 → 100644
View file @ 55309172
This diff is collapsed.
dump-info.c
View file @ 55309172
......@@ -196,7 +196,6 @@ struct dump_info dump_info[] = {
DUMP_FIELD(int, mode),
DUMP_FIELD(int, seq_state),
DUMP_FIELD(int, dac_timeout),
DUMP_FIELD(int, default_dac_main),
DUMP_FIELD(int, delock_count),
DUMP_FIELD(uint32_t, irq_count),
DUMP_FIELD(int, mpll_shift_ps),
......@@ -205,7 +204,6 @@ struct dump_info dump_info[] = {
DUMP_FIELD(int, helper.tag_d0),
DUMP_FIELD(int, helper.ref_src),
DUMP_FIELD(int, helper.sample_n),
DUMP_FIELD(int, helper.delock_count),
/* FIXME: missing helper.pi etc.. */
DUMP_FIELD(int, ext.enabled),
DUMP_FIELD(int, ext.align_state),
......@@ -221,16 +219,11 @@ struct dump_info dump_info[] = {
DUMP_FIELD(int, mpll.tag_out),
DUMP_FIELD(int, mpll.tag_ref_d),
DUMP_FIELD(int, mpll.tag_out_d),
DUMP_FIELD(uint32_t, mpll.seq_ref),
DUMP_FIELD(int, mpll.seq_out),
DUMP_FIELD(int, mpll.match_state),
DUMP_FIELD(int, mpll.match_seq),
DUMP_FIELD(int, mpll.phase_shift_target),
DUMP_FIELD(int, mpll.phase_shift_current),
DUMP_FIELD(int, mpll.id_ref),
DUMP_FIELD(int, mpll.id_out),
DUMP_FIELD(int, mpll.sample_n),
DUMP_FIELD(int, mpll.delock_count),
DUMP_FIELD(int, mpll.dac_index),
DUMP_FIELD(int, mpll.enabled),
......
host/misc.c
View file @ 55309172
......@@ -73,10 +73,6 @@ void uart_init_hw(void)
}
void uart_init_sw(void)
{ printf("%s\n", __func__); }
void uart_exit(int i)
{
system("stty sane");
......
include/endpoint.h
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......@@ -6,9 +6,6 @@
#ifndef __ENDPOINT_H
#define __ENDPOINT_H
#define DMTD_AVG_SAMPLES 256
#define DMTD_MAX_PHASE 16384
#include <stdint.h>
typedef enum {
......
include/hw/wb_uart.h
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include/hw/wrc_diags_regs.h 0 → 100644
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include/hw/wrc_syscon_regs.h
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include/i2c.h
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......@@ -14,7 +14,7 @@ void mi2c_stop(uint8_t i2cif);
void mi2c_get_byte(uint8_t i2cif, unsigned char *data, uint8_t last);
unsigned char mi2c_put_byte(uint8_t i2cif, unsigned char data);
void mi2c_delay(void);
void mi2c_delay(uint32_t delay);
//void mi2c_scan(uint8_t i2cif);
#endif
include/revision.h
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......@@ -11,7 +11,7 @@
/* Please increment WRPC_SHMEM_VERSION if you change any exported data
* structure */
#define WRPC_SHMEM_VERSION 1 /* first version */
#define WRPC_SHMEM_VERSION 2 /* removed some unused fields */
#ifndef __ASSEMBLY__
extern const char *build_revision;
......
include/sfp.h
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......@@ -23,12 +23,6 @@ extern int32_t sfp_alpha;
extern int32_t sfp_deltaTx;
extern int32_t sfp_deltaRx;
/* Returns 1 if there's a SFP transceiver inserted in the socket. */
int sfp_present(void);
/* Reads the part ID of the SFP from its configuration EEPROM */
int sfp_read_part_id(char *part_id);
/* Match plugged SFP with a DB entry */
int sfp_match(void);
......
include/shell.h
View file @ 55309172
......@@ -13,6 +13,7 @@ extern int wrc_ui_mode;
extern int wrc_stat_running;
const char *fromhex(const char *hex, int *v);
const char *fromhex64(const char *hex, int64_t *v);
const char *fromdec(const char *dec, int *v);
void decode_mac(const char *str, unsigned char *mac);
char *format_mac(char *s, const unsigned char *mac);
......@@ -36,7 +37,9 @@ void env_init(void);
int shell_exec(const char *buf);
int shell_interactive(void);
extern int shell_is_interacting;
void shell_boot_script(void);
void shell_show_build_init(void);
#endif
include/storage.h
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include/syscon.h
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include/uart.h
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......@@ -6,15 +6,10 @@
#ifndef __UART_H
#define __UART_H
void uart_init_sw(void);
void uart_init_hw(void);
void uart_write_byte(int b);
int uart_write_string(const char *s);
int puts(const char *s);
int uart_read_byte(void);
/* uart-sw is used by ppsi (but may be wrapped to normal uart) */
int uart_sw_write_string(const char *s);
#endif
include/wrc-task.h
View file @ 55309172
......@@ -21,6 +21,7 @@ struct wrc_task {
unsigned long nrun;
unsigned long seconds;
unsigned long nanos;
unsigned long max_run_ticks; /* in ticks */
};
/* An helper for periodic tasks, relying on a static varible */
......
include/wrc_ptp.h
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lib/WR-WRPC-MIB.txt
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lib/arp.c
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lib/ipv4.h
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lib/lib.mk
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lib/net.c
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lib/snmp.c
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lib/syslog.c
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.depend
\ No newline at end of file
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monitor/monitor_ppsi.c
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ppsi @ cb5934e8
Subproject commit 325a277479110cde0e99edfd62f7c99a778be21d
Subproject commit cb5934e8dac07c21572d335a5691ea714eeebf57
shell/cmd_init.c
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shell/shell.mk
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softpll/softpll_ng.c
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test/snmp/wrpc_test_config
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tools/.gitignore
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tools/trivial-init/main.c
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wrc_main.c
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wrc_main_sim.c
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