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Software for White Rabbit PTP Core
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5c66fba6
Commit
5c66fba6
authored
Mar 10, 2017
by
Dimitris Lampridis
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hdldoc: update port name for clk_ext_i in board-common
parent
ca022efb
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wrc_board.tex
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doc/HDLdoc/wrc_board.tex
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5c66fba6
...
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@@ -95,7 +95,7 @@ their own BSP, can find the board-common module under:
clk
\_
aux
\_
i
&
in
&
var
&
[optional] vector of auxiliary
clocks that will be disciplined to WR timebase. Size is equal to
\tts
{
g
\_
aux
\_
clks
}
\\
\hline
clk
\_
ext
\_
i
&
in
&
1
&
10MHz external reference clock input
clk
\_
10m
\_
ext
\_
i
&
in
&
1
&
10MHz external reference clock input
(used when
\tts
{
g
\_
with
\_
external
\_
clock
\_
input = true
}
)
\\
\hline
pps
\_
ext
\_
i
&
in
&
1
&
external 1-PPS input (used when
...
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