Commit 616e4c34 authored by Peter Jansweijer's avatar Peter Jansweijer

spll KP parameters times 5 due to VCXOs range 20 ppm

parent 780ed522
......@@ -17,7 +17,7 @@ void helper_init(struct spll_helper_state *s, int ref_channel)
/* Phase branch PI controller */
s->pi.y_min = 5;
s->pi.y_max = (1 << DAC_BITS) - 5;
s->pi.kp = -150;//(int)(0.3 * 32.0 * 16.0); // / 2;
s->pi.kp = -750;//(int)(0.3 * 32.0 * 16.0); // / 2;
s->pi.ki = -2;//(int)(0.03 * 32.0 * 3.0); // / 2;
s->pi.anti_windup = 1;
......
......@@ -34,7 +34,7 @@ void mpll_init(struct spll_main_state *s, int id_ref,
s->pi.kp = -1100; // / 2;
s->pi.ki = -30; // / 2;
#elif defined(CONFIG_WR_NODE)
s->pi.kp = -1100; // / 2;
s->pi.kp = -5500; // / 2;
s->pi.ki = -30; // / 2;
#else
#error "Please set CONFIG for wr switch or wr node"
......
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