Commit d3d11dd8 authored by li hongming's avatar li hongming

solve calibration bug. Port 1 should be calibrated once

  before it acts as master.
    A known bug is sync cannot build after link reset.
parent 11a3cf2a
......@@ -115,8 +115,8 @@ static int lookup_transition(struct trans_detect_state *state, int flip_bit,
return 0;
}
static struct trans_detect_state det_rising, det_falling;
static int cal_cur_phase;
static struct trans_detect_state det_rising[wr_num_ports], det_falling[wr_num_ports];
static int cal_cur_phase[wr_num_ports];
/* Starts RX timestamper calibration process state machine. Invoked by
ptpnetif's check lock function when the PLL has already locked, to avoid
......@@ -124,13 +124,13 @@ static int cal_cur_phase;
void rxts_calibration_start(uint8_t port)
{
cal_cur_phase = 0;
det_rising.prev_val = det_falling.prev_val = -1;
det_rising.state = det_falling.state = TD_WAIT_INACTIVE;
det_rising.sample_count = 0;
det_falling.sample_count = 0;
det_rising.trans_phase = 0;
det_falling.trans_phase = 0;
cal_cur_phase[port] = 0;
det_rising[port].prev_val = det_falling[port].prev_val = -1;
det_rising[port].state = det_falling[port].state = TD_WAIT_INACTIVE;
det_rising[port].sample_count = 0;
det_falling[port].sample_count = 0;
det_rising[port].trans_phase = 0;
det_falling[port].trans_phase = 0;
spll_set_phase_shift(0, 0);
}
......@@ -148,28 +148,28 @@ int rxts_calibration_update(uint32_t *t24p_value, int port)
int flip = ep_timestamper_cal_pulse(port);
/* look for transitions (with deglitching) */
lookup_transition(&det_rising, flip, cal_cur_phase, 1);
lookup_transition(&det_falling, flip, cal_cur_phase, 0);
lookup_transition(&det_rising[port], flip, cal_cur_phase[port], 1);
lookup_transition(&det_falling[port], flip, cal_cur_phase[port], 0);
if (cal_cur_phase >= CAL_SCAN_RANGE) {
if (det_rising.state != TD_DONE || det_falling.state != TD_DONE)
if (cal_cur_phase[port] >= CAL_SCAN_RANGE) {
if (det_rising[port].state != TD_DONE || det_falling[port].state != TD_DONE)
{
wrc_verbose("RXTS calibration error.\n");
return -1;
}
/* normalize */
while (det_falling.trans_phase >= REF_CLOCK_PERIOD_PS)
det_falling.trans_phase -= REF_CLOCK_PERIOD_PS;
while (det_rising.trans_phase >= REF_CLOCK_PERIOD_PS)
det_rising.trans_phase -= REF_CLOCK_PERIOD_PS;
while (det_falling[port].trans_phase >= REF_CLOCK_PERIOD_PS)
det_falling[port].trans_phase -= REF_CLOCK_PERIOD_PS;
while (det_rising[port].trans_phase >= REF_CLOCK_PERIOD_PS)
det_rising[port].trans_phase -= REF_CLOCK_PERIOD_PS;
/* Use falling edge as second sample of rising edge */
if (det_falling.trans_phase > det_rising.trans_phase)
ttrans = det_falling.trans_phase - REF_CLOCK_PERIOD_PS/2;
else if(det_falling.trans_phase < det_rising.trans_phase)
ttrans = det_falling.trans_phase + REF_CLOCK_PERIOD_PS/2;
ttrans += det_rising.trans_phase;
if (det_falling[port].trans_phase > det_rising[port].trans_phase)
ttrans = det_falling[port].trans_phase - REF_CLOCK_PERIOD_PS/2;
else if(det_falling[port].trans_phase < det_rising[port].trans_phase)
ttrans = det_falling[port].trans_phase + REF_CLOCK_PERIOD_PS/2;
ttrans += det_rising[port].trans_phase;
ttrans /= 2;
/*normalize ttrans*/
......@@ -178,17 +178,16 @@ int rxts_calibration_update(uint32_t *t24p_value, int port)
wrc_verbose("RXTS calibration: R@%dps, F@%dps, transition@%dps\n",
det_rising.trans_phase, det_falling.trans_phase,
det_rising[port].trans_phase, det_falling[port].trans_phase,
ttrans);
*t24p_value = (uint32_t)ttrans;
return 1;
}
cal_cur_phase += CAL_SCAN_STEP;
spll_set_phase_shift(0, cal_cur_phase);
cal_cur_phase[port] += CAL_SCAN_STEP;
spll_set_phase_shift(0, cal_cur_phase[port]);
return 0;
}
......@@ -262,7 +261,7 @@ int calib_t24p(int mode, uint32_t *value, int port)
{
int ret;
if (mode == WRC_MODE_SLAVE)
if ((mode == WRC_MODE_SLAVE) && (port==0))
ret = calib_t24p_slave(value, port);
else
ret = calib_t24p_master(value, port);
......
......@@ -606,6 +606,7 @@ int storage_phtrans(uint32_t *valp, uint8_t write, int port)
if (sdbfs_open_id(&wrc_sdb, SDB_VENDOR, sdb_dev_addr) < 0)
return -1;
if (write) {
pp_printf("Port %d Updating t2/t4 phase transition...\n", port);
sdbfs_ferase(&wrc_sdb, 0, wrc_sdb.f_len);
value = *valp | VALIDITY_BIT;
if (sdbfs_fwrite(&wrc_sdb, 0, &value, sizeof(value))
......
......@@ -89,6 +89,7 @@ extern struct storage_config storage_cfg;
#define MEM_FLASH 0
#define MEM_EEPROM 1
#define MEM_1W_EEPROM 2
// Add two devices for Dualport
#define SDBFS_REC 7
int storage_read_hdl_cfg(void);
......
......@@ -22,29 +22,39 @@
static int cmd_calibration(const char *args[])
{
uint32_t trans;
int port=0;
uint32_t trans[wr_num_ports];
int port = 0;
int ret=0;
if (args[0] && !strcasecmp(args[0], "force")) {
if (measure_t24p(&trans, port) < 0)
return -1;
return storage_phtrans(&trans, 1, port);
} else if (!args[0]) {
if (storage_phtrans(&trans, 0, port) > 0) {
pp_printf("Port %d Found phase transition in EEPROM: %dps\n",
port, trans);
cal_phase_transition[port] = trans;
return 0;
} else {
for (port = 0; port < wr_num_ports; port++) {
pp_printf("Port %d Measuring t2/t4 phase transition...\n", port);
if (measure_t24p(&trans, port) < 0)
return -1;
cal_phase_transition[port] = trans;
return storage_phtrans(&trans, 1, port);
if (measure_t24p(&trans[port], port) < 0)
ret = -1;
else
{
ret = storage_phtrans(&trans[port], 1, port);
}
}
return ret;
} else if (!args[0]) {
for (port = 0; port < wr_num_ports; port++) {
if (storage_phtrans(&trans[port], 0, port) > 0) {
pp_printf("Port %d Found phase transition in EEPROM: %dps\n",
port, trans[port]);
cal_phase_transition[port] = trans[port];
} else {
pp_printf("Port %d Measuring t2/t4 phase transition...\n", port);
if (measure_t24p(&trans[port], port) < 0)
ret =-1;
else {
cal_phase_transition[port] = trans[port];
ret = storage_phtrans(&trans[port], 1, port);
}
}
}
}
return 0;
return ret;
}
DEFINE_WRC_COMMAND(calibration) = {
......
......@@ -40,32 +40,33 @@ char *format_mac(char *s, const unsigned char *mac)
static int cmd_mac(const char *args[])
{
unsigned char mac[6];
int port;
unsigned char mac[wr_num_ports][6];
char buf[32];
if (!args[0] || !strcasecmp(args[0], "get")) {
/* get current MAC */
get_mac_addr(mac, 0);
get_mac_addr(mac, 1);
for (port = 0; port < wr_num_ports; ++port)
get_mac_addr(mac[port], port);
} else if (!strcasecmp(args[0], "getp")) {
/* get persistent MAC */
get_mac_addr(mac, 0);
get_persistent_mac(ONEWIRE_PORT, mac);
get_persistent_mac(ONEWIRE_PORT, mac[0]);
pp_printf("Persistent MAC-address: %s\n", format_mac(buf, mac[0]));
} else if (!strcasecmp(args[0], "set") && args[1]) {
decode_mac(args[1], mac);
set_mac_addr(mac, 0);
pfilter_init_default(0);
mac[0]=mac[0]+1;
set_mac_addr(mac, 1);
pfilter_init_default(1);
decode_mac(args[1], mac[0]);
for (port = 0; port < wr_num_ports; ++port) {
mac[0][0]=mac[0][0]+port;
set_mac_addr(mac[0], port);
pfilter_init_default(port);
}
} else if (!strcasecmp(args[0], "setp") && args[1]) {
decode_mac(args[1], mac);
set_persistent_mac(ONEWIRE_PORT, mac);
decode_mac(args[1], mac[0]);
set_persistent_mac(ONEWIRE_PORT, mac[0]);
} else {
return -EINVAL;
}
pp_printf("MAC-address: %s\n", format_mac(buf, mac));
for (port = 0; port < wr_num_ports; ++port)
pp_printf("Port %d MAC-address: %s\n", port, format_mac(buf, mac[port]));
return 0;
}
......
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