- 29 Jan, 2020 1 commit
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Grzegorz Daniluk authored
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- 28 Jan, 2020 2 commits
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Tomasz Wlostowski authored
rt_cpu: disable PLL verbose mode by default (output on UART is blocking and greatly slows down LDPC port calibration in the WR Switch)
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Tomasz Wlostowski authored
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- 17 Dec, 2019 1 commit
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Grzegorz Daniluk authored
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- 26 Nov, 2019 1 commit
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Grzegorz Daniluk authored
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- 31 Oct, 2019 6 commits
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Miguel Jimenez Lopez authored
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Benoit Rat authored
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Benoit Rat authored
In order to have a more similar wrpc-sw using wrnic_defconfig or using spec_defconfig
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Miguel Jimenez Lopez authored
In case we are using the WR_NIC_CPU option we redirect ARP & ICMP to external fabric (controlled by NIC driver on host CPU). We have also add this option to Kconfig and update the wrnic_defconfig used by wr-starting-kit
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Miguel Jimenez Lopez authored
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Miguel Jimenez Lopez authored
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- 20 Aug, 2019 1 commit
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Grzegorz Daniluk authored
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- 19 Aug, 2019 7 commits
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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- 16 Aug, 2019 2 commits
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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- 15 Aug, 2019 11 commits
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Mattia Rizzi authored
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Mattia Rizzi authored
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Mattia Rizzi authored
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Mattia Rizzi authored
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Mattia Rizzi authored
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Mattia Rizzi authored
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Mattia Rizzi authored
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Mattia Rizzi authored
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- 06 Jun, 2019 1 commit
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Grzegorz Daniluk authored
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- 24 May, 2019 1 commit
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Maciej Lipinski authored
- updated WB-generated file - added info about configurable clock domain of streamers data
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- 23 May, 2019 4 commits
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Maciej Lipinski authored
- hdl software reset - fixed latency timeout - fixed latency statistics
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Maciej Lipinski authored
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Maciej Lipinski authored
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Maciej Lipinski authored
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- 21 May, 2019 2 commits
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
This is needed for PPSGen handling cleanup. Now PPSGen is controlled by PPSi.
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