White Rabbit Switch Prepared for the Low-jitter Daughterboard
TEMPLATE - copied from
https://www.ohwr.org/project/wrs-fl-hw/wiki*
Only contact info is correct*
Project description
White Rabbit Switch is the central element of a White Rabbit network and was designed as a part of the White Rabbit project. The current version of WRS 3.4 is built with two fans to provide force air cooling. *Measurement* shows that when the fans fail, temperature inside the WRS increases significantly, especially the FPGA chip.
WRS-Fan-less is a fan-less version of the WRS, specifically designed for long-term service-less operation and originated at the LHAASO project. The temperature test results of WRS-FL are presented in this document.
It is an open hardware design of an 18-ports Ethernet switch licensed under CERN OHL 1.2. As the design is open it can also be used as the hardware platform for other, non-White Rabbit projects.
WR Switch Fan-Less*
Main Features
In bold the features that are different from WRS-3.4
- Front Panel
- 5 SMA connectors ****
- 1-PPS input
- 1-PPS output
- 62.5 MHz output
- 10 MHz output (software configurable)
- 10 MHz input
- 18 cages for Gigabit SFP transceivers with EMI Shield (connected to Xilinx GTXs)
- 10/100 RJ45 Ethernet management port (connected to ARM CPU)
- 10/100 SFP Ethernet management port (converted from the USB of the ARM CPU)
- USB port (connected to ARM CPU)
- 2x USB-uart debugging port (connected to ARM CPU and FPGA I/O pins) (was on back panel on WRS-3.4)
- Power and Status LEDs
- Link and Act LEDs for each SFP cage through light guide pipe
- Power reboot button
- 5 SMA connectors ****
- Back Panel
-
2x USB-uart debugging port (connected to ARM CPU and FPGA I/O pins)move to front panel - power button
-
2x cooling fanremoved in WRS_FL -
2x microswitchremoved in WRS_FL - 1x grounding connector
-
- Xilinx Virtex-6 FPGA (XC6VLX240T as default, XC6VLX365T can be
mounted upon request)
-
18Mb QDRII memory (CY7C1314KV18)not mounted in WRS_v3.4, removed in WRS_FL -
256Mb parallel configuration memory (PC28F256)not mounted in WRS_v3.4, removed in WRS_FL
-
- Clocking resources
- Integrated Low-jitter WRS daughterboard for improved clock outputs
- VM53S3-25.00 as default Internal Oscillator
- T604-025.0M, IVT32000C,DOT050V-020.0M, CVHD-950-100.000 can be mounted for evaluation.
- refer to SCB_clock_tree
- ARM Atmel AT91 SAM9G45 CPU
- Memory:
- 64MB DDR2
- 256MB NAND
- 8MB boot flash
- Others:
- 1x FPGA JTAG connector
- 1x ARM JTAG connector
- 1x SYS_ADMIN header (orignial P10 on WRS_3.4, with manual reset signals)
- 1x UART & PWR_Mon header (original P2 on WRS_3.4, with additional USB-UART and Power signals)
- 2x QSS/QSH high speed connectors between SCB and backplane
- 4x Ultra Small Surface Mount Male Coaxial Connectors for clock circuit test
-
1x QSS-016 high speed SMI link connectornot mounted in WRS_v3.4, removed in WRS_FL -
1x gold-finger uTCA edge connectorremoved in WRS_FL
- Power supply 100-240VAC, 2.0A, 50-60Hz input, 12V DC, 6.66A, 80W output
- Box dimensions 482.8 x 42.34 x 222 mm
- Certification (TBD)
- IPC-610 Rev E Class 2
- ISO-9001
- ISO-14001
- CE
- RoHS
- CCC (China Compulsory Certification)
WRSwitch fan-less hardware consists of three elements:
- SCB_FL PCB - contains main electronics components, ARM processor, Xilinx FPGA chip, oscillators, memories, etc. - This is a redesigned board, different from the one used in the original WRS-3.4.
- backplane PCB - electrical connections to 18 SFP cages, debug USB-uart ports, LEDs, etc. - This board is redesigned for different panel arrangement.
- WR Switch Box - is a 19'' 1U case. There are no cooling fans in the back - This box is specifically designed for passive cooling. The panel arrangement is different from WRS-3.4.
for the fan-less, constructive heat dissipation plays an important role too.
Project information
- Production documentation
-
Gateware for WR Switch
- compatible to WRS-3.4
-
Software for WR Switch
- compatible to WRS-3.4
- Frequently Asked Questions
- Low jitter function, coming soon
- Gallery
Releases
Contacts
Commercial producers
General question about project
Status
Date | Event |
05-11-2018 | Device commercially available. |
14 November 2018