Commit 35a0c4a9 authored by Tristan Gingold's avatar Tristan Gingold

Minor changes to ensure hdlmake completion.

parent 42deced5
target = "xilinx"
action = "synthesis"
fetchto = "../../../ip_cores"
# fetchto = "../../../ip_cores"
syn_device = "xc6slx150t"
syn_grade = "-3"
......
......@@ -3,9 +3,9 @@ files = [ "synthesis_descriptor.vhd", "svec_top.vhd", "svec_top.ucf" ]
fetchto = "../../ip_cores"
modules = {
"local" : [ "../../../rtl/wrnc",
"../node_template",
"../../../ip_cores/fine-delay/hdl",
"local" : [ "../../../ip_cores/mock-turtle",
"../node_template",
"../../../ip_cores/fine-delay/hdl",
"../../../ip_cores/fmc-tdc/hdl/rtl",
"../../../ip_cores/vme64x-core" ],
}
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