Commit 4dcd8371 authored by Dimitris Lampridis's avatar Dimitris Lampridis

switch to latest FMC-TDC gateware (development branch)

parent cd7bc999
Subproject commit 1dda0aa5d9d1fbb53d1092b884e65d307899837b Subproject commit 84ffc99fcd77897a9610b7736a2f95a353d10717
...@@ -243,14 +243,6 @@ entity wrtd_ref_svec_tdc_fd is ...@@ -243,14 +243,6 @@ entity wrtd_ref_svec_tdc_fd is
fmc0_tdc_led_trig4_o : out std_logic; fmc0_tdc_led_trig4_o : out std_logic;
fmc0_tdc_led_trig5_o : out std_logic; fmc0_tdc_led_trig5_o : out std_logic;
-- TDC1 Input channels
-- also arriving to the FPGA (not used for the moment)
fmc0_tdc_in_fpga_1_i : in std_logic;
fmc0_tdc_in_fpga_2_i : in std_logic;
fmc0_tdc_in_fpga_3_i : in std_logic;
fmc0_tdc_in_fpga_4_i : in std_logic;
fmc0_tdc_in_fpga_5_i : in std_logic;
fmc0_prsntm2c_n_i : in std_logic; fmc0_prsntm2c_n_i : in std_logic;
fmc0_scl_b : inout std_logic; fmc0_scl_b : inout std_logic;
...@@ -876,11 +868,6 @@ begin -- architecture arch ...@@ -876,11 +868,6 @@ begin -- architecture arch
tdc_led_trig3_o => fmc0_tdc_led_trig3_o, tdc_led_trig3_o => fmc0_tdc_led_trig3_o,
tdc_led_trig4_o => fmc0_tdc_led_trig4_o, tdc_led_trig4_o => fmc0_tdc_led_trig4_o,
tdc_led_trig5_o => fmc0_tdc_led_trig5_o, tdc_led_trig5_o => fmc0_tdc_led_trig5_o,
tdc_in_fpga_1_i => fmc0_tdc_in_fpga_1_i,
tdc_in_fpga_2_i => fmc0_tdc_in_fpga_2_i,
tdc_in_fpga_3_i => fmc0_tdc_in_fpga_3_i,
tdc_in_fpga_4_i => fmc0_tdc_in_fpga_4_i,
tdc_in_fpga_5_i => fmc0_tdc_in_fpga_5_i,
mezz_scl_i => fmc0_scl_b, mezz_scl_i => fmc0_scl_b,
mezz_sda_i => fmc0_sda_b, mezz_sda_i => fmc0_sda_b,
mezz_scl_o => fmc0_scl_out, mezz_scl_o => fmc0_scl_out,
......
...@@ -256,19 +256,13 @@ static void tdc_input(struct wrtd_tdc_dev *tdc) ...@@ -256,19 +256,13 @@ static void tdc_input(struct wrtd_tdc_dev *tdc)
ev.ts.ns = tdc_readl(tdc, BASE_DP_TDC_DIRECT + DR_REG_FIFO_R1) * 8; ev.ts.ns = tdc_readl(tdc, BASE_DP_TDC_DIRECT + DR_REG_FIFO_R1) * 8;
meta = tdc_readl(tdc, BASE_DP_TDC_DIRECT + DR_REG_FIFO_R2); meta = tdc_readl(tdc, BASE_DP_TDC_DIRECT + DR_REG_FIFO_R2);
/* Convert from ACAM bins (81ps) to WR time format. Numerical /* Conversion from ACAM TDC bins to WR already done in gateware
hack used to avoid time-consuming division. (including overflow checks), result is in 2e-9 ns ticks */
1 frac = 1 tick / 4096 = 8ns / 4096. uint32_t frac = meta & 0x3ffff;
1bin * 5308 / 128 * 1 frac = 0.0809937ns */
uint32_t frac = ( (meta & 0x3ffff) * 5308 ) >> 7; /* Change frac resolution from 2e-9 ns to 2e-32 ns */
ev.ts.ns += frac >> 9;
ev.ts.frac = frac << (32 - 9); ev.ts.frac = frac << (32 - 9);
/* Make sure there's no overflow after conversion */
if (ev.ts.ns >= 1000000000) {
ev.ts.ns -= 1000000000;
ev.ts.seconds ++;
}
int channel = (meta >> 19) & 0x7; int channel = (meta >> 19) & 0x7;
memset(ev.id, 0, WRTD_ID_LEN); memset(ev.id, 0, WRTD_ID_LEN);
......
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