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White Rabbit Trigger Distribution
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White Rabbit Trigger Distribution
Commits
987f4c60
Commit
987f4c60
authored
Jan 21, 2019
by
Tristan Gingold
Committed by
Dimitris Lampridis
Jan 23, 2019
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Add svec_tdc_fd files.
parent
76b8de8b
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4 changed files
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+1930
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Manifest.py
builder/hdl/syn/svec_tdc_fd/Manifest.py
+34
-0
svec_tdc_fd.ucf
builder/hdl/syn/svec_tdc_fd/svec_tdc_fd.ucf
+769
-0
Manifest.py
builder/hdl/top/svec_tdc_fd/Manifest.py
+18
-0
svec_tdc_fd_top.vhd
builder/hdl/top/svec_tdc_fd/svec_tdc_fd_top.vhd
+1109
-0
No files found.
builder/hdl/syn/svec_tdc_fd/Manifest.py
0 → 100644
View file @
987f4c60
# HDLMake 'develop' branch required.
#
# Due to bugs in release v3.0 of hdlmake it is necessary to use the "develop"
# branch of hdlmake, commit db4e1ab.
board
=
"svec"
target
=
"xilinx"
action
=
"synthesis"
syn_device
=
"xc6slx150t"
syn_grade
=
"-3"
syn_package
=
"fgg900"
syn_top
=
"svec_tdc_fd_top"
syn_project
=
"svec_tdc_fd.xise"
syn_tool
=
"ise"
fetchto
=
"../../../../dependencies"
syn_post_project_cmd
=
(
"$(TCL_INTERPRETER) "
+
\
fetchto
+
"/general-cores/tools/sdb_desc_gen.tcl "
+
\
syn_tool
+
" $(PROJECT_FILE);"
\
"$(TCL_INTERPRETER) syn_extra_steps.tcl $(PROJECT_FILE)"
)
files
=
[
"svec_tdc_fd.ucf"
,
]
modules
=
{
"local"
:
[
"../../top/svec_tdc_fd"
,
],
}
builder/hdl/syn/svec_tdc_fd/svec_tdc_fd.ucf
0 → 100644
View file @
987f4c60
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builder/hdl/top/svec_tdc_fd/Manifest.py
0 → 100644
View file @
987f4c60
files
=
[
"svec_tdc_fd_top.vhd"
,
]
fetchto
=
"../../../../dependencies"
modules
=
{
"git"
:
[
"git://ohwr.org/hdl-core-lib/general-cores.git"
,
"git://ohwr.org/hdl-core-lib/wr-cores.git"
,
"git://ohwr.org/hdl-core-lib/vme64x-core.git"
,
"git://ohwr.org/hdl-core-lib/urv-core.git"
,
"git://ohwr.org/hdl-core-lib/mock-turtle.git"
,
"git://ohwr.org/fmc-projects/fmc-tdc/fmc-tdc-1ns-5cha-gw.git"
,
"git://ohwr.org/fmc-projects/fmc-delay-1ns-8cha.git"
,
],
}
builder/hdl/top/svec_tdc_fd/svec_tdc_fd_top.vhd
0 → 100644
View file @
987f4c60
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