Complete status
Date | Event |
---|---|
09-12-2011 | Kicking off the project. Samples of RS-485 transceivers requested from different vendors. |
20-01-2012 | Functional Specifications agreed. |
27-01-2012 | First prototype added to repo. Tests will be done next week. |
30-01-2012 | RTM Piggyback for RS-485 up in repo |
06-03-2012 | DEM layout is done with RS-485 piggyback, upon some modification discussed the last week. |
07-03-2012 | Prototype detects cable is not plugged. |
14-03-2012 | CONV-TTL-RS485 schematics up in repo. Front Panel connectors should be discussed. |
04-04-2012 | Revision of the Front Panel held. Will be the same as CONV-TTL-BLO. Schematics ready. |
29-04-2012 | Schematics revision 0 ready to review. They can be found in the repo |
10-05-2012 | Schematics revision 1. Review notes of schematics revision 0 available in repo |
16-05-2012 | Outputs are 5V legacy capable now. All logic is adapted to be 5V compliant. Revision 1 ready for review. |
30-05-2012 | Add selectable switch and LEDs for multicast group. |
18-07-2012 | Received a final proposal of layout from DEM (Bruno Recordon). Pending approval upon peer review. |
The front LEDs should be replaced by Dialight 568 ones. | |
19-07-2012 | Added layout review by CGS. Download from here. |
20-07-2012 | All the components for the prototype have been gathered by Benjamin Ninet. |
02-08-2012 | Still waiting for symbols to be added to the library to finish the layout. |
17-08-2012 | Design is finished by DEM. Front panels added to the project: EDA-02541 . Pending upon section approval for manufacturing of the prototypes. |
29-08-2012 | Design modified and accepted. Moving into prototype assembly. |
24-10-2012 | Three prototypes received. Project on hold (lower priority than conv-ttl-blo) |
29-05-2014 | Restarting work on project |
14-08-2014 | Identified an error with RTM piggyback cards, launching V2 design and production order (also including RTM) with DEM |
29-08-2014 | Placed design and fabrication order for a V2 version of front module |
25-09-2014 | RTM piggyback V2 cards in EDMS |
25-09-2014 | Starting RTM with piggyback V2 production |
23-10-2014 | Front module V2 in EDMS |
24-10-2014 | Start of production of 3x front module V2 prototypes |
05-11-2014 | Received 3x RTM with piggyback RS485 prototypes |
19-11-2014 | Received 3x front module V2 prototypes |
06-01-2015 | Golden gateware v0.0 released |
06-01-2015 | Release gateware v1.0 released |
07-01-2015 | Identified possible changes for a V3 front module card, issuing design and production order with DEM |
12-01-2015 | Front module V3 in EDMS |
12-01-2015 | Start of production of 3x front module V3 prototypes |
15-01-2015 | Production order for 3x RTM prototype cards, in support of 3x front module prototypes |
15-03-2015 | Received 3x front module V2 prototypes |
13-06-2017 | v3 prototypes powered up and working |
30-06-2017 | Launch design of new compatible D-Sub9 RTM |
30-06-2017 | Launch design of new compatible optical to optical RTM |
27-09-2017 | Held schematics review for conv-ttl-rs485 v4 motherboard and conv-ttl-rs485 RTM DB9-to-DB9 RTM |
13-11-2017 | Held layout review for conv-ttl-rs485 v4 motherboard and conv-ttl-rs485 RTM DB9-to-DB9 RTM |
04-12-2017 | Placed order for 10 prototypes of motherboard and 5 for the RTM in D-SUB 9 |
06-12-2018 | 5 prototypes for the RTM in D-SUB 9 received |
28-02-2018 | Launch layout modifications for v2 of DB9 panel |
15-03-2018 | Launch production of 5 prototypes of DB9 RTM with v2.0 of DB9 panel |
05-04-2018 | 10 prototypes of v4.0 of the motherboard and 5 prototypes of v1.0 of the optical RTM have been received |
03-05-2018 | Tests moved to various installations for complete kit |
27-07-2018 | v4-1 of the motherboard design ready. Start production of 320 boards. |
26-09-2018 | Pre-series of 20 DB9 RTM, v3.5, arrived. To be checked before production of 180 launched. |
Theodor-Adrian Stana, Carlos-Gil Soriano, Erik van der Bij, Sept, 26th 2018