Test results V2
The wiki page descripes the test results of the FMC DAC 250MSPS 16b 4CH V2. Test-results-V1 wiki page can be used for comparison.
The ML605 evaluation kit with a Xilinx Virtex 6 FPGA was used as a carrier card with a transition board between the mezzanine and the carrier cards. The FMC DAC 250MSPS 16b 4CH mezzanine was plugged on the HPC FMC connector of the ML605. A sine wave was generated with a signal generator and it was converted to a square wave with an evaluation kit AD9512. This square wave acts as a clock signal for the evaluation kit ML605 and for the transition board. A clock fanout on the transition board provides the two clock signals for the two Dual-DACs on the FMC DAC 250MSPS 16b 4CH mezzanine card. The transition board provides LVPECL clock signals for the mezzanine card, and the transition board also shifts some of the voltages between the carrier and the mezzanine card in order not to damage the carrier card FPGA. More information regarding the tests below.
Power supply and thermal tests
- Test report - Power supply and thermal V2
- Issue #550 - Reversed a diode
- Improvements to the power supply filtering
Fast Fourier Transform (FFT)
For the FFT results please refer to the Test-Results-V1 wiki page. The test report sub section 3.1 (Experiment 1) under the header FFT includes all the measurement regarding the FFT.
Analog front-end
- Spurious Free Dynamic Range (SFDR) of the DAC mezzanine card output
- Narrow band and wideband
- Passband flatness of the DAC mezzanine card output, (see Issue #553)
- Phase noise and jitter of the DAC mezzanine card
- Attenuator gain switching time and phase difference between 0dB and -18dB, (see Issue #554)
- Amplifier offset voltage compensation with a potentiometer, (see Issue #552)
- Front-panel LED driver and LEDs, power-good indication LEDs, (see Issues #565 and #581)
- See Issue #572 - Test of 10 prototypes
- Also refer to the Version 1 test results for comparison
- Transition board, EDA-02227-V1:
- An error with the decoupling in the last page of the schematic, page will be updated for the V2
Serial Peripheral interface (SPI)
For the SPI results please refer to the Test-Results-V1 wiki page.
Petri Leinonen - 4th of September 2012