FMC VME Test Suite
Specification
FMC I/O connectivity test
The FMC I/O connectivity test consists of the following steps:
-
Plug in the carrier tester board.
-
Load a VHDL core explicitly done for this test into carrier's FPGA.
-
Make a loop-back checking automatize by Python.
- Use the carrier tester board's 16-Bit I/O Expanders to write data
in
the LAxx pins. - Read back the corresponding values from the FPGA's pins.
The patterns to load are:
- LVDS differential pins will be considered as two independent pins.
The
patterns to load will be "01", "10", to check short-circuits between
them; "11" to check short-circuit with GND.
FMC Clock connectivity test
The FMC Clock connectivity test consists of the following steps:
-
Plug in the carrier tester board.
-
Load a VHDL core explicitly done for this test into carrier's FPGA.
-
Using carrier tester's ADN4600 to make the loop-back:
- Specify differential DPx_C2M as output and differential
DPx_M2C
as input pins in the FPGA. Check for DP0, DP1, DP2, DP3, DP4. - Specify differential CLK2_BDIR as output, check it through loop-back.
- Select the corresponding channels in ADN4600 to test the connectivity.
FMC SATA connectivity test
The FMC SATA connectivity test consists of the following steps:
-
Plug in the carrier tester board.
-
Plug a cable which connect carrier tester's SATA with carrier's SATA.
-
Load a VHDL core explicitly done for this test into carrier's FPGA.
-
Using carrier tester's ADN4600 to make the loop-back:
- Select the corresponding channels in ADN4600 to test the connectivity.
FMC Voltage connectivity test
The ADC present in the carrier tester board samples the voltage in the
power pins. The FMC Voltage connectivity test consists of the
following
steps:
-
Plug in the carrier tester board.
-
Load a VHDL core explicitly done for this test into carrier's FPGA.
-
After switch on the carrier board, wait settling-time and then check
the values:
- Using ADN4600 select the EEPROM. Read the values from it.