PCI to Wishbone Core
Project description
The PCI core implements a PCI slave on one side and a WishBone master on the other.
Status
Date | Event |
---|---|
05-05-2014 | First specification written (this core is part of GSI's PMC timing receiver - https://www.ohwr.org/project/tr-pmc) |
23-01-2015 | Created project and repository on OHWR. |
04-01-2016 | First test with an ARRIAV FPGA |