TimEX3 (Timing EXtension board version 3)
Description
The TimEX3 is a multipurpose 3U compact PCI board designed to perform
simple to medium complex logical functions.
This board is mainly used for the synchronization system of
SOLEIL.
The foreseen uses include:
- 1 TTL input to 4 TTL outputs signal duplication.
- 1 TTL input to 4 LVPECL outputs signal conversion and duplication.
- Top-up gating.
- Trigger monitoring.
These functions are done with a FPGA and by configuring the board during
the manufacturing.
The same PCB is used, but different components will be soldered
depending on the function
needed.
Architecture
The TimEX3 board is based on a Xilinx Spartan-6 FPGA.
It communicates with the compact PCI bus through a PLX PCI9030
interface. This chip is connected to the FPGA with a simple 60MHz, 32
bits microprocessor bus.
The board can be configured either in 1 TTL input / 4 TTL outputs, or 1
TTL input / 4 LVPECL outputs. This is done during the manufacturing by
soldering either the TTL buffers or the LVPECL buffers.
The board is powered by the cPCI bus. The power can also be supplied by an auxiliary connector. In this case, the board will function in standalone. This is useful for signal duplication or top-up gating where a cPCI crate is not required.
Download
Archived files can be downloaded at https://www.ohwr.org/project/timex3/wikis/documents
TimEX3_bin_xxxx.zip | FPGA and PCI9030 EEPROM binaries |
---|---|
TimEX3_fpga_xxxx.zip | FPGA VHDL sources and configuration files |
TimEX3_pdf_xxxx.zip | PDF files of the schematics, the PCB and the CAD |
TimEX3_SCH_PCB_CAD_xxxx.zip | Source files of the schematics, the PCB and the CAD |
Milestones
1 | [FR] Cahier des charges de la carte TimEX3 | SOU-DIA-CDC-3421-CDC_TimEX3-Ext.pdf |
---|---|---|
2 | [EN] TimEX3 design specifications | SOU-DIA-NT-3267-TimEX3_Spe.pdf |
3 | [FR] Test de la carte prototype TimEX3 | SOU-DIA-NT-3473-test_TimEX3.pdf |
4 | [FR] Evaluation du logiciel de CAO électronique KiCad | SOU-DIA-NT-3419-evaluation_KiCad-Ext.pdf |
5 | [EN] First Tests of the Top-up Gating at Synchrotron SOLEIL | WEPC39 |
6 | [FR] HSI de la carte TimEX3 | SOU-DIA-NT-P-3603-HSI_TimEX3.pdf |
Documents can be downloaded at https://www.ohwr.org/project/timex3/wikis/documents
KiCad
The TimEX3 board is designed with KiCad software
(http://www.kicad-pcb.org).
KiCad libraries for this board are available on Github
(https://github.com/Synchrotron-SOLEIL/KiCad-Lib)