HW: TTL input pulse is stretched by hw before arriving to FPGA
It was noticed that pulses coming in from the TTL inputs of the board
(in TTL) are wider on the output.
By probing, it was found that the signal was being stretched even before
reaching the schmidt trigger inverter IC4.
The oscilloscope showed a slow fall time of the pulse at the input of
IC4, which translated to a wide square (inverted) pulse on the output of
IC4.
Furthermore this effect is noticed only when the input voltage is above ~3.5V. when pulses are 3.3V the pulse width is the same.