V4 - PCB Via annular ring size too small for IPC Class 3
The smallest vias have a pad size of 0.45mm and a hole size of 0.20mm. This is outside IPC-A-600H class 3 (which is used in the PCB specification) as it may leave a too small annular ring.
According to IPC-A-600H, section 2.10.3 a minimum external annular ring must be 0.050mm. The same can be found in IPC-2221A, section 9.1.3.
More formally, according to IPC-2221A, section 9.1.1:
Land size, minimum = a + 2b + c
- a: max diam hole;
- b: min annular ring;
- c: fabrication allowance (for c: Level C (the best one) =0.2mm)
Land size, min = 0.20 + 2*0.05 + 0.2mm = 0.5mm. So indeed the 0.45mm we specify is too small.
With the pad size of 0.45mm and hole size of 0.20mm, a centrally drilled hole would leave an annular ring of 0.125mm, allowing for a 0.075mm offset of the drill in any direction. This may be enough for the drilling machine for small panels, but is dependent on the manufacturer and in any case out of IPC Class 3.
The design cannot enlarge the via pad sizes from 0.45 mm to 0.50 mm. The clearance to other tracks would become too low.
We cannot reduce the hole size to 0.15mm as with the circuit of 1.6mm thickness we would approach a 1:10 aspect ratio which is too much.
Therefore we have to accept allowing Class 2 level for the annular ring
requirement for the vias with a 0.2mm hole size.
Section 9.1.2 of IPC-2221A reads:
“An annular ring shall be required for all plated-through holes in Class
3 designs. The performance specification for Class 1 and Class 2
products may allow partial hole breakouts.”
*So CERN would accept Class 2 for the annular ring requirement for the
vias with a 0.2mm hole size.
The via pad sizes cannot be enlarged, nor can the drill size be
reduced.*
_The acceptance of Class 2 for this feature should be specified in the
production documentation.
It would need a major redesign to allow expanding the via pad size to
0.50 mm._