review done by KIT
In the previous Flesdaq meeting the participants were asked to have a look at the schematics of the AMC FMC Kintex board and give you some feedback.
We (KIT) had a look at it and did only find some minor issues which you potentially already fixed (floating connections).
FPGA_SDRAM.SchDoc, Page 18, VREF not connected at Bank 33 and 34
Clock_WR.SchDoc, Page 24, near OSC1, OSC2, OSC5 floating wire at output port
SUP_2.5_FMC.SchDoc, Page 26, near IC10 floating wire at Test1 port