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Welcome to the Open Hardware Repository, a place on the web for electronics designers to collaborate on open hardware designs, much in the philosophy of the free software movement. You can get more details about our vision by reading the OHR Manifesto.
Among the different projects hosted in this site, there is a special one called OHR Support which you can visit for some help in getting started, as well as to report any issues you might have while using OHR.
Latest news
NanoFIP Test Board:
Presence and id variables read using NanoFIP VHDL code
OHR Support:
OHWR maintenance on 2010-09-03 morning (Friday)
Upgrading Redmine form version 1.0.0 to 1.0.1
OHR Support:
OHWR maintenance on 2010-08-23 morning (Monday)
Adding Git repositories support.
OHR Support:
OHWR maintenance on 2010-08-06 morning (friday)
Upgrade to Redmine 1.0. Will require some downtime.
FMC ADC 100M 14b 4cha:
4-08-2010: The board is working
Basic functionality working. Modifications needed to improve thermal behaviour and research needed to improve THD.
Latest projects
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ADC Testing (01/09/2010 16:14)
ADC testing procedures and software.
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Miscellaneous Projects (01/09/2010 16:12)
Projects not directly identifiable with PCB or HDL core developments.
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DDR3 controller for Spartan6 (31/08/2010 13:53)
DDR3 controller with two pipelined Wishbone slave ports. It is based on the Spartan6 hardware core and a management core generated by Xilinx CoreGen.
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EtherBone Core (19/08/2010 12:00)
A core to trigger reads and writes into a Wishbone bus from Ethernet. It is a slave on the Ethernet side and a master on the Wishbone side.
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FIP Converter (20/07/2010 15:57)
A converter between USB/Ethernet and WorldFIP, allowing the bus arbitration and control of a WorldFIP fieldbus segment from a USB or Ethernet-equipped computer.