User Documentation - 2016-07-18 14:01:18.751139
Here are our current LTSpice models for the front end. If you have any comments or observations please share them!
The model consists of three main blocks:
SiPM
Transimpedence front end amplifier
Two stage signal amplifier + Pulse shaping network
Items not modeled:
Vbias + Bias resistor
ADC input (simulated with a 50 ohm resistor)
4V DC/DC converter for front end
Note - all amplifiers are run from the 4V rail, rather than the 5V USB
rail to improve noise immunity.
Analysis conducted:
AC transient with 5ns rise and 34ns fall time (+/-) with 1V magnitude.
The front end transimpedance amplifier is inspired by the work of Johannes Schumacher, based on his master's thesis. https://web.physik.rwth-aachen.de/~hebbeker/theses/schumacher-master.pdf
- Ad8014.cir
- ad8057.cir
- pi1b80578602exp.asc - Updated circuit with improved linearity