Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
S
Simple PCIe FMC carrier SPEC
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
50
Issues
50
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Simple PCIe FMC carrier SPEC
Issues
Open
29
Closed
25
All
54
New issue
Recent searches
Press Enter or click to search
{{hint}}
{{tag}}
{{name}}
@{{username}}
No Assignee
{{name}}
@{{username}}
No Milestone
Upcoming
Started
{{title}}
No Label
{{title}}
{{name}}
Yes
No
Priority
Priority
Created date
Last updated
Milestone
Due date
Popularity
Label priority
V4 - Exposed pads IC5 and IC17 (TPS51200DRCT) not connected
#105
· opened
Dec 09, 2019
by
Erik van der Bij
feature
0
updated
Dec 09, 2019
Take into account simplification hints from Gennum Field Application Engineer
#101
· opened
Oct 19, 2010
by
Erik van der Bij
feature
2
updated
Feb 12, 2019
MAC address and storage
#67
· opened
Jun 10, 2011
by
Erik van der Bij
feature
6
updated
Apr 06, 2020
V4 - PCB Via annular ring size too small for IPC Class 3
#57
· opened
Sep 15, 2011
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Typo in schematic
#56
· opened
Sep 15, 2011
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Still OHL 1.0 in a production doc
#55
· opened
Sep 20, 2011
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Annular ring PTH for capacitors may be made larger?
#51
· opened
Dec 02, 2011
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Move capacitor to cooler area to improve reliability
#49
· opened
Dec 13, 2011
by
Erik van der Bij
feature
1
updated
Feb 12, 2019
V4 - update data for Si570
#48
· opened
Mar 26, 2012
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Order number of PCIe bracket not clear
#45
· opened
Apr 25, 2012
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Decoupling done different than Xilinx AN
#43
· opened
May 23, 2012
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Line impedances should be verified
#42
· opened
May 23, 2012
by
Erik van der Bij
feature
3
updated
Feb 12, 2019
V4 - DDR3 pending End-of-life
#38
· opened
Jul 10, 2012
by
Erik van der Bij
feature
1
updated
Feb 12, 2019
V4 - 3V3 regulator resistor values wrong
#36
· opened
Sep 21, 2012
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Add LED on FPGA DONE pin
#35
· opened
Nov 01, 2012
by
Projects
feature
0
updated
Feb 12, 2019
V4-0 - enlarge via size 450um to 550um
#32
· opened
Jan 11, 2013
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Consider adding connector to supply a fan
#31
· opened
Jun 19, 2013
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Reset timing of CDCM61004
#29
· opened
Feb 07, 2014
by
Tomasz Wlostowski
feature
0
updated
Feb 12, 2019
V4 - Manage T8 from P3V3_PCIE
#26
· opened
Mar 21, 2014
by
Projects
feature
0
updated
Feb 12, 2019
V4 - Automatic 1x PCIe
#25
· opened
Mar 21, 2014
by
Projects
feature
0
updated
Feb 12, 2019
Prev
1
2
Next