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Lucas Russo authored
In our design the UI interface *_rdy signals are only muxed to the DDR3 controller when the PCIe core had granted access to it. Otherwise, it keeps the signals low.
a35a97d0
In our design the UI interface *_rdy signals are only muxed to the DDR3 controller when the PCIe core had granted access to it. Otherwise, it keeps the signals low.