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  • Adrian Byszuk's avatar
    pcie_fpga: Add missing CS_N signal to the DDR SDRAM core. · 0c8d95de
    Adrian Byszuk authored
    Absence of this signal pin could lead to problems with DDR memory
    calibration (in other words: it didn't work).
    Also change adressing scheme from BANK_ROW_COLUMN to ROW_BANK_COLUMN.
    Theoretically it should give better performance in our use case.
    0c8d95de