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Lucas Russo authored
For some reason, generating the IPcore with Verilog causing problems when simulating. It appears that the AXI datamover cannot write anything to its AXI interface due to tready always low.
559b23aa
For some reason, generating the IPcore with Verilog causing problems when simulating. It appears that the AXI datamover cannot write anything to its AXI interface due to tready always low.