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Lucas Russo authored
In this way, we can use sparse structures (instead of FIFO/RAM primitives) to help synthesis/implementation tools achieve better timing. This mainly works as the FIFO is small (in depth and width) and could be placed near the source/receiving FFs. To be certain that the synthesis tools will use distributed structure for the FIFO/RAM , it's better to use the following constraint in your .xdc file: set_property RAM_STYLE DISTRIBUTED [ get_cells -hier -filter { NAME =~ */cmp_fmc_adc_iface/*/cmp_adc_data_async_fifo/mem_reg* } ]
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