Commit 003b0e0c authored by Lucas Russo's avatar Lucas Russo

{src,include}/boards/ml605/*: fix CHAN_ID/SAMPLE_SIZE typos

parent be7dccd5
......@@ -8,39 +8,39 @@
/************************ Acquistion 0 Channel Parameters **************/
/* ADC */
#define ADC0_CHAN_ID 0
#define ADC0_SAMPLE_SIZE 8 /* 8 Bytes -> ADC0 = 16-bit / ADC1 = 16-bit ... */
#define ADC_CHAN_ID 0
#define ADC_SAMPLE_SIZE 8 /* 8 Bytes -> ADC0 = 16-bit / ADC1 = 16-bit ... */
/* TBT AMP */
#define TBTAMP0_CHAN_ID (ADC0_CHAN_ID + 1)
#define TBTAMP0_SAMPLE_SIZE 16 /* 16 Bytes -> TBTAMP0 = 32-bit / TBTAMP1 = 32-bit ... */
#define TBTAMP_CHAN_ID (ADC_CHAN_ID + 1)
#define TBTAMP_SAMPLE_SIZE 16 /* 16 Bytes -> TBTAMP0 = 32-bit / TBTAMP1 = 32-bit ... */
/* TBT POS */
#define TBTPOS0_CHAN_ID (TBTAMP0_CHAN_ID + 1)
#define TBTPOS0_SAMPLE_SIZE 16 /* 16 Bytes -> X = 32-bit / Y = 32-bit ... */
#define TBTPOS_CHAN_ID (TBTAMP_CHAN_ID + 1)
#define TBTPOS_SAMPLE_SIZE 16 /* 16 Bytes -> X = 32-bit / Y = 32-bit ... */
/* FOFB AMP */
#define FOFBAMP0_CHAN_ID (TBTPOS0_CHAN_ID + 1)
#define FOFBAMP0_SAMPLE_SIZE 16 /* 16 Bytes -> FOFBAMP0 = 32-bit / FOFBAMP1 = 32-bit ... */
#define FOFBAMP_CHAN_ID (TBTPOS_CHAN_ID + 1)
#define FOFBAMP_SAMPLE_SIZE 16 /* 16 Bytes -> FOFBAMP0 = 32-bit / FOFBAMP1 = 32-bit ... */
/* FOFB POS */
#define FOFBPOS0_CHAN_ID (FOFBAMP0_CHAN_ID + 1)
#define FOFBPOS0_SAMPLE_SIZE 16 /* 16 Bytes -> X = 32-bit / Y = 32-bit ... */
#define FOFBPOS_CHAN_ID (FOFBAMP_CHAN_ID + 1)
#define FOFBPOS_SAMPLE_SIZE 16 /* 16 Bytes -> X = 32-bit / Y = 32-bit ... */
/* MONIT AMP */
#define MONITAMP0_CHAN_ID (FOFBPOS0_CHAN_ID + 1)
#define MONITAMP0_SAMPLE_SIZE 16 /* 16 Bytes -> FOFBAMP0 = 32-bit / FOFBAMP1 = 32-bit ... */
#define MONITAMP_CHAN_ID (FOFBPOS_CHAN_ID + 1)
#define MONITAMP_SAMPLE_SIZE 16 /* 16 Bytes -> FOFBAMP0 = 32-bit / FOFBAMP1 = 32-bit ... */
/* MONIT POS */
#define MONITPOS0_CHAN_ID (MONITAMP0_CHAN_ID + 1)
#define MONITPOS0_SAMPLE_SIZE 16 /* 16 Bytes -> X = 32-bit / Y = 32-bit ... */
#define MONITPOS_CHAN_ID (MONITAMP_CHAN_ID + 1)
#define MONITPOS_SAMPLE_SIZE 16 /* 16 Bytes -> X = 32-bit / Y = 32-bit ... */
/* MONIT1 POS */
#define MONIT1POS0_CHAN_ID (MONITPOS0_CHAN_ID + 1)
#define MONIT1POS0_SAMPLE_SIZE 16 /* 16 Bytes -> X = 32-bit / Y = 32-bit ... */
#define MONIT1POS_CHAN_ID (MONITPOS_CHAN_ID + 1)
#define MONIT1POS_SAMPLE_SIZE 16 /* 16 Bytes -> X = 32-bit / Y = 32-bit ... */
/* End of channels placeholder */
#define END_CHAN_ID (MONIT1POS0_CHAN_ID + 1)
#define END_CHAN_ID (MONIT1POS_CHAN_ID + 1)
#endif
......@@ -24,7 +24,7 @@
/* ADC 0
* Size: 2 DDR3 regions */
#define DDR3_ADC0_SAMPLE_SIZE ADC0_SAMPLE_SIZE
#define DDR3_ADC0_SAMPLE_SIZE ADC_SAMPLE_SIZE
#define DDR3_ADC0_MEM_SIZE 2
#define DDR3_ADC0_MEM_BOOL DDR3_MEM_BOOL(DDR3_ADC0_MEM_SIZE)
......@@ -34,7 +34,7 @@
/* TBT 0 AMP
* Size: 2 DDR3 regions */
#define DDR3_TBTAMP0_SAMPLE_SIZE TBTAMP0_SAMPLE_SIZE
#define DDR3_TBTAMP0_SAMPLE_SIZE TBTAMP_SAMPLE_SIZE
#define DDR3_TBTAMP0_MEM_SIZE 2
#define DDR3_TBTAMP0_MEM_BOOL DDR3_MEM_BOOL(DDR3_TBTAMP0_MEM_SIZE)
......@@ -44,7 +44,7 @@
/* TBT 0 POS
* Size: 0 DDR3 regions */
#define DDR3_TBTPOS0_SAMPLE_SIZE TBTPOS0_SAMPLE_SIZE
#define DDR3_TBTPOS0_SAMPLE_SIZE TBTPOS_SAMPLE_SIZE
#define DDR3_TBTPOS0_MEM_SIZE 0
#define DDR3_TBTPOS0_MEM_BOOL DDR3_MEM_BOOL(DDR3_TBTPOS0_MEM_SIZE)
......@@ -54,7 +54,7 @@
/* FOFB 0 AMP
* Size: 2 DDR3 regions */
#define DDR3_FOFBAMP0_SAMPLE_SIZE FOFBAMP0_SAMPLE_SIZE
#define DDR3_FOFBAMP0_SAMPLE_SIZE FOFBAMP_SAMPLE_SIZE
#define DDR3_FOFBAMP0_MEM_SIZE 2
#define DDR3_FOFBAMP0_MEM_BOOL DDR3_MEM_BOOL(DDR3_FOFBAMP0_MEM_SIZE)
......@@ -64,7 +64,7 @@
/* FOFB 0 POS
* Size: 0 DDR3 regions */
#define DDR3_FOFBPOS0_SAMPLE_SIZE FOFBPOS0_SAMPLE_SIZE
#define DDR3_FOFBPOS0_SAMPLE_SIZE FOFBPOS_SAMPLE_SIZE
#define DDR3_FOFBPOS0_MEM_SIZE 0
#define DDR3_FOFBPOS0_MEM_BOOL DDR3_MEM_BOOL(DDR3_FOFBPOS0_MEM_SIZE)
......@@ -74,7 +74,7 @@
/* MONIT 0 AMP
* Size: 0 DDR3 regions */
#define DDR3_MONITAMP0_SAMPLE_SIZE MONITAMP0_SAMPLE_SIZE
#define DDR3_MONITAMP0_SAMPLE_SIZE MONITAMP_SAMPLE_SIZE
#define DDR3_MONITAMP0_MEM_SIZE 0
#define DDR3_MONITAMP0_MEM_BOOL DDR3_MEM_BOOL(DDR3_MONITAMP0_MEM_SIZE)
......@@ -84,7 +84,7 @@
/* MONIT 0 POS
* Size: 0 DDR3 regions */
#define DDR3_MONITPOS0_SAMPLE_SIZE MONITPOS0_SAMPLE_SIZE
#define DDR3_MONITPOS0_SAMPLE_SIZE MONITPOS_SAMPLE_SIZE
#define DDR3_MONITPOS0_MEM_SIZE 0
#define DDR3_MONITPOS0_MEM_BOOL DDR3_MEM_BOOL(DDR3_MONITPOS0_MEM_SIZE)
......@@ -94,7 +94,7 @@
/* MONIT1 0 POS
* Size: 0 DDR3 regions */
#define DDR3_MONIT1POS0_SAMPLE_SIZE MONIT1POS0_SAMPLE_SIZE
#define DDR3_MONIT1POS0_SAMPLE_SIZE MONIT1POS_SAMPLE_SIZE
#define DDR3_MONIT1POS0_MEM_SIZE 0
#define DDR3_MONIT1POS0_MEM_BOOL DDR3_MEM_BOOL(DDR3_MONIT1POS0_MEM_SIZE)
......@@ -104,7 +104,7 @@
/* End 0 Dummy region
* Size: 0 DDR3 regions */
#define DDR3_DUMMY_END0_SAMPLE_SIZE MONIT1POS0_SAMPLE_SIZE
#define DDR3_DUMMY_END0_SAMPLE_SIZE MONIT1POS_SAMPLE_SIZE
#define DDR3_DUMMY_END0_MEM_SIZE 0
#define DDR3_DUMMY_END0_MEM_BOOL DDR3_MEM_BOOL(DDR3_DUMMY_END0_MEM_SIZE)
......
......@@ -15,56 +15,56 @@ const acq_buf_t __acq_buf[NUM_ACQ_CORE_SMIOS][END_CHAN_ID] = {
/*** Acquistion 0 Channel Parameters ***/
{
{
.id = ADC0_CHAN_ID,
.id = ADC_CHAN_ID,
.start_addr = DDR3_ADC0_START_ADDR,
.end_addr = DDR3_ADC0_END_ADDR,
.max_samples = DDR3_ADC0_MAX_SAMPLES,
.sample_size = DDR3_ADC0_SAMPLE_SIZE
},
{
.id = TBTAMP0_CHAN_ID,
.id = TBTAMP_CHAN_ID,
.start_addr = DDR3_TBTAMP0_START_ADDR,
.end_addr = DDR3_TBTAMP0_END_ADDR,
.max_samples = DDR3_TBTAMP0_MAX_SAMPLES,
.sample_size = DDR3_TBTAMP0_SAMPLE_SIZE
},
{
.id = TBTPOS0_CHAN_ID,
.id = TBTPOS_CHAN_ID,
.start_addr = DDR3_TBTPOS0_START_ADDR,
.end_addr = DDR3_TBTPOS0_END_ADDR,
.max_samples =DDR3_TBTPOS0_MAX_SAMPLES,
.sample_size = DDR3_TBTPOS0_SAMPLE_SIZE
},
{
.id = FOFBAMP0_CHAN_ID,
.id = FOFBAMP_CHAN_ID,
.start_addr = DDR3_FOFBAMP0_START_ADDR,
.end_addr = DDR3_FOFBAMP0_END_ADDR,
.max_samples = DDR3_FOFBAMP0_MAX_SAMPLES,
.sample_size = DDR3_FOFBAMP0_SAMPLE_SIZE
},
{
.id = FOFBPOS0_CHAN_ID,
.id = FOFBPOS_CHAN_ID,
.start_addr = DDR3_FOFBPOS0_START_ADDR,
.end_addr = DDR3_FOFBPOS0_END_ADDR,
.max_samples = DDR3_FOFBPOS0_MAX_SAMPLES,
.sample_size = DDR3_FOFBPOS0_SAMPLE_SIZE
},
{
.id = MONITAMP0_CHAN_ID,
.id = MONITAMP_CHAN_ID,
.start_addr = DDR3_MONITAMP0_START_ADDR,
.end_addr = DDR3_MONITAMP0_END_ADDR,
.max_samples = DDR3_MONITAMP0_MAX_SAMPLES,
.sample_size = DDR3_MONITAMP0_SAMPLE_SIZE
},
{
.id = MONITPOS0_CHAN_ID,
.id = MONITPOS_CHAN_ID,
.start_addr = DDR3_MONITPOS0_START_ADDR,
.end_addr = DDR3_MONITPOS0_END_ADDR,
.max_samples = DDR3_MONITPOS0_MAX_SAMPLES,
.sample_size = DDR3_MONITPOS0_SAMPLE_SIZE
},
{
.id = MONIT1POS0_CHAN_ID,
.id = MONIT1POS_CHAN_ID,
.start_addr = DDR3_MONIT1POS0_START_ADDR,
.end_addr = DDR3_MONIT1POS0_END_ADDR,
.max_samples = DDR3_MONIT1POS0_MAX_SAMPLES,
......
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