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Beam Positoning Monitor - Software
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03496289
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03496289
authored
Oct 26, 2015
by
Lucas Russo
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hw/wb_acq_core_regs.h: add new field for data-driven trigger channel
parent
bf683b03
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wb_acq_core_regs.h
include/hw/wb_acq_core_regs.h
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include/hw/wb_acq_core_regs.h
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03496289
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@@ -3,7 +3,7 @@
* File : wb_acq_core_regs.h
* Author : auto-generated by wbgen2 from acq_core.wb
* Created : T
ue Sep 8 19:12:36
2015
* Created : T
hu Oct 22 17:24:54
2015
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE acq_core.wb
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@@ -173,6 +173,24 @@
#define ACQ_CORE_ACQ_CHAN_CTL_WHICH_SHIFT 0
#define ACQ_CORE_ACQ_CHAN_CTL_WHICH_W(value) WBGEN2_GEN_WRITE(value, 0, 5)
#define ACQ_CORE_ACQ_CHAN_CTL_WHICH_R(reg) WBGEN2_GEN_READ(reg, 0, 5)
/* definitions for field: Reserved in reg: Acquisition channel control */
#define ACQ_CORE_ACQ_CHAN_CTL_RESERVED_MASK WBGEN2_GEN_MASK(5, 3)
#define ACQ_CORE_ACQ_CHAN_CTL_RESERVED_SHIFT 5
#define ACQ_CORE_ACQ_CHAN_CTL_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 5, 3)
#define ACQ_CORE_ACQ_CHAN_CTL_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 5, 3)
/* definitions for field: Data-driven channel selection in reg: Acquisition channel control */
#define ACQ_CORE_ACQ_CHAN_CTL_DTRIG_WHICH_MASK WBGEN2_GEN_MASK(8, 5)
#define ACQ_CORE_ACQ_CHAN_CTL_DTRIG_WHICH_SHIFT 8
#define ACQ_CORE_ACQ_CHAN_CTL_DTRIG_WHICH_W(value) WBGEN2_GEN_WRITE(value, 8, 5)
#define ACQ_CORE_ACQ_CHAN_CTL_DTRIG_WHICH_R(reg) WBGEN2_GEN_READ(reg, 8, 5)
/* definitions for field: Reserved1 in reg: Acquisition channel control */
#define ACQ_CORE_ACQ_CHAN_CTL_RESERVED1_MASK WBGEN2_GEN_MASK(13, 19)
#define ACQ_CORE_ACQ_CHAN_CTL_RESERVED1_SHIFT 13
#define ACQ_CORE_ACQ_CHAN_CTL_RESERVED1_W(value) WBGEN2_GEN_WRITE(value, 13, 19)
#define ACQ_CORE_ACQ_CHAN_CTL_RESERVED1_R(reg) WBGEN2_GEN_READ(reg, 13, 19)
/* FIXME: The FPGA firmware is BYTE/WORD addressed depending on the board */
/* [0x0]: REG Control register */
#define ACQ_CORE_REG_CTL (0x00000000 >> __WR_SHIFT_FIX__)
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