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Beam Positoning Monitor - Software
Commit 16fed061 authored by Lucas Russo's avatar Lucas Russo
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various: add FMC250M support for ML605

parent d4f10e87
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include/boards/ml605/chips_addr.h
View file @ 16fed061
......@@ -16,4 +16,14 @@ extern const uint32_t fmc130m_4ch_lm75a_addr[NUM_FMC130M_4CH_SMIOS][NUM_FMC130M_
extern const uint32_t fmc130m_4ch_pca9547_addr[NUM_FMC130M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_si571_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_ad9510_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_24aa64_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_amc7823_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_isla216p_addr[NUM_FMC250M_4CH_SMIOS][NUM_FMC250M_4CH_ISLA216P];
extern const uint32_t fmc250m_4ch_pca9547_addr[NUM_FMC250M_4CH_SMIOS];
#endif
include/boards/ml605/mem_layout.h
View file @ 16fed061
......@@ -9,6 +9,7 @@
#define NUM_MAX_BPMS (NUM_MAX_SLOTS * NUM_MAX_BPM_PER_SLOT)
#define NUM_FMC130M_4CH_SMIOS 1
#define NUM_FMC250M_4CH_SMIOS 1
/*********************** Static ML605 FPGA layout ***********************/
/* FMC_130M Components */
......@@ -18,6 +19,14 @@
#define FMC_130M_EEPROM_RAW_I2C_OFFS 0x0300
#define FMC_130M_LM75A_RAW_I2C_OFFS 0x0400
/* FMC_250M Components */
#define FMC_250M_CTRL_RAW_REGS_OFFS 0x0000
#define FMC_250M_AMC7823_RAW_SPI_OFFS 0x0100
#define FMC_250M_ISLA216P_RAW_SPI_OFFS 0x0200
#define FMC_250M_AD9510_RAW_SPI_OFFS 0x0300
#define FMC_250M_SI571_RAW_I2C_OFFS 0x0400
#define FMC_250M_EEPROM_RAW_I2C_OFFS 0x0500
/* DSP Components */
#define DSP_CTRL_RAW_REGS_OFFS 0x0000
#define DSP_BPM_RAW_SWAP_OFFS 0x0100
......@@ -41,6 +50,21 @@
#define FMC1_130M_LM75A_RAW_I2C (FMC1_130M_BASE_RAW_ADDR + \
FMC_130M_LM75A_RAW_I2C_OFFS)
#define FMC1_250M_BASE_RAW_ADDR 0x00310000
#define FMC1_250M_CTRL_RAW_REGS (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_CTRL_RAW_REGS_OFFS)
#define FMC1_250M_AMC7823_RAW_SPI (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_AMC7823_RAW_SPI_OFFS)
#define FMC1_250M_ISLA216P_RAW_SPI (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_ISLA216P_RAW_SPI_OFFS)
#define FMC1_250M_AD9510_RAW_SPI (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_AD9510_RAW_SPI_OFFS)
#define FMC1_250M_SI571_RAW_I2C (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_SI571_RAW_I2C_OFFS)
#define FMC1_250M_EEPROM_RAW_I2C (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_EEPROM_RAW_I2C_OFFS)
#define DSP1_BASE_RAW_ADDR 0x00308000
#define DSP1_CTRL_RAW_REGS (DSP1_BASE_RAW_ADDR + \
......@@ -81,6 +105,14 @@
#define FMC_130M_EEPROM_I2C_OFFS (/*BAR4_ADDR |*/ FMC_130M_EEPROM_RAW_I2C_OFFS)
#define FMC_130M_LM75A_I2C_OFFS (/*BAR4_ADDR |*/ FMC_130M_LM75A_RAW_I2C_OFFS)
/* FMC_250M Components */
#define FMC_250M_CTRL_REGS_OFFS (BAR4_ADDR | FMC_250M_CTRL_RAW_REGS_OFFS)
#define FMC_250M_AMC7823_SPI_OFFS (BAR4_ADDR | FMC_250M_AMC7823_RAW_SPI_OFFS)
#define FMC_250M_ISLA216P_SPI_OFFS (BAR4_ADDR | FMC_250M_ISLA216P_RAW_SPI_OFFS)
#define FMC_250M_AD9510_SPI_OFFS (BAR4_ADDR | FMC_250M_AD9510_RAW_SPI_OFFS)
#define FMC_250M_SI571_I2C_OFFS (BAR4_ADDR | FMC_250M_SI571_RAW_I2C_OFFS)
#define FMC_250M_EEPROM_I2C_OFFS (BAR4_ADDR | FMC_250M_EEPROM_RAW_I2C_OFFS)
/* DSP Components */
#define DSP_CTRL_REGS_OFFS (/*BAR4_ADDR |*/ DSP_CTRL_RAW_REGS_OFFS)
#define DSP_BPM_SWAP_OFFS (/*BAR4_ADDR |*/ DSP_BPM_RAW_SWAP_OFFS)
......@@ -97,6 +129,15 @@
#define FMC1_130M_EEPROM_I2C (/*BAR4_ADDR |*/ FMC1_130M_EEPROM_RAW_I2C)
#define FMC1_130M_LM75A_I2C (/*BAR4_ADDR |*/ FMC1_130M_LM75A_RAW_I2C)
#define FMC1_250M_BASE_ADDR (BAR4_ADDR | FMC1_250M_BASE_RAW_ADDR)
#define FMC1_250M_CTRL_REGS (/*BAR4_ADDR |*/ FMC1_250M_CTRL_RAW_REGS)
#define FMC1_250M_AMC7823_SPI (/*BAR4_ADDR |*/ FMC1_250M_AMC7823_RAW_SPI)
#define FMC1_250M_ISLA216P_SPI (/*BAR4_ADDR |*/ FMC1_250M_ISLA216P_RAW_SPI)
#define FMC1_250M_AD9510_SPI (/*BAR4_ADDR |*/ FMC1_250M_AD9510_RAW_SPI)
#define FMC1_250M_SI571_I2C (/*BAR4_ADDR |*/ FMC1_250M_SI571_RAW_I2C)
#define FMC1_250M_EEPROM_I2C (/*BAR4_ADDR |*/ FMC1_250M_EEPROM_RAW_I2C)
#define DSP1_BASE_ADDR (BAR4_ADDR | DSP1_BASE_RAW_ADDR)
#define DSP1_CTRL_REGS (/*BAR4_ADDR |*/ DSP1_CTRL_RAW_REGS)
......@@ -121,6 +162,19 @@ extern const uint32_t fmc130m_4ch_24aa64_addr[NUM_FMC130M_4CH_SMIOS];
extern const uint32_t fmc130m_4ch_lm75a_addr[NUM_FMC130M_4CH_SMIOS][NUM_FMC130M_4CH_LM75A];
extern const uint32_t fmc130m_4ch_pca9547_addr[NUM_FMC130M_4CH_SMIOS];
/********************* FMC250M_4CH SMIO Gateware Options ******************/
/* Chip SPI slave select lines and I2C address */
#define NUM_FMC250M_4CH_ISLA216P 4
extern const uint32_t fmc250m_4ch_amc7823_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_isla216p_addr[NUM_FMC250M_4CH_SMIOS][NUM_FMC250M_4CH_ISLA216P];
extern const uint32_t fmc250m_4ch_ad9510_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_si571_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_24aa64_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_pca9547_addr[NUM_FMC250M_4CH_SMIOS];
/*********************** SMIO ACQ Gateware Options ***********************/
/* FIXME: The Gateware does not support yet a way of reading which
* ACQ channels are valid. So, we hardcoded it here for now. This issue
......
src/boards/ml605/chips_addr.c
View file @ 16fed061
......@@ -20,3 +20,17 @@ const uint32_t fmc130m_4ch_lm75a_addr[NUM_FMC130M_4CH_SMIOS][NUM_FMC130M_4CH_LM7
/* This CI PCA9547 is located on the carrier, but it's controlled by the FMC130M_4CH */
const uint32_t fmc130m_4ch_pca9547_addr[NUM_FMC130M_4CH_SMIOS] = {0x70};
/* FMC250M_4CH chip addresses */
const uint32_t fmc250m_4ch_si571_addr[NUM_FMC250M_4CH_SMIOS] = {0x49};
const uint32_t fmc250m_4ch_ad9510_addr[NUM_FMC250M_4CH_SMIOS] = {0x01};
/* The FMC EEPROM was supposed to have address 0x50 and 0x52, but GA1 and GA0
* are all grounded on hardware */
const uint32_t fmc250m_4ch_24aa64_addr[NUM_FMC250M_4CH_SMIOS] = {0x50};
const uint32_t fmc250m_4ch_amc7823_addr[NUM_FMC250M_4CH_SMIOS] = {0x01};
const uint32_t fmc250m_4ch_isla216p_addr[NUM_FMC250M_4CH_SMIOS][NUM_FMC250M_4CH_ISLA216P] = {
{0x01, 0x02, 0x03, 0x04}
};
/* This CI PCA9547 is located on the carrier, but it's controlled by the FMC250M_4CH */
const uint32_t fmc250m_4ch_pca9547_addr[NUM_FMC250M_4CH_SMIOS] = {0x70};
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