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Beam Positoning Monitor - Software
Commits
30323471
Commit
30323471
authored
Apr 24, 2016
by
Lucas Russo
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include/boards/*: fix layout as lnls-dig/bpm-gw@61fb31ca5f changed it
parent
a8bb27f0
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2 changed files
with
6 additions
and
6 deletions
+6
-6
mem_layout.h
include/boards/afcv3/mem_layout.h
+3
-3
mem_layout.h
include/boards/afcv3_1/mem_layout.h
+3
-3
No files found.
include/boards/afcv3/mem_layout.h
View file @
30323471
...
...
@@ -16,7 +16,7 @@
/* Should be autodiscovered by SDB */
/* Wishbone RAW Addresses */
#define FMC1_130M_BASE_RAW_ADDR 0x003
1
0000
#define FMC1_130M_BASE_RAW_ADDR 0x003
2
0000
#define FMC1_130M_CTRL_RAW_REGS (FMC1_130M_BASE_RAW_ADDR + \
FMC_130M_CTRL_RAW_REGS_OFFS)
...
...
@@ -29,7 +29,7 @@
#define FMC1_130M_LM75A_RAW_I2C (FMC1_130M_BASE_RAW_ADDR + \
FMC_130M_LM75A_RAW_I2C_OFFS)
#define FMC1_250M_BASE_RAW_ADDR 0x003
1
0000
#define FMC1_250M_BASE_RAW_ADDR 0x003
2
0000
#define FMC1_250M_CTRL_RAW_REGS (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_CTRL_RAW_REGS_OFFS)
...
...
@@ -44,7 +44,7 @@
#define FMC1_250M_ISLA216P_RAW_SPI (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_ISLA216P_RAW_SPI_OFFS)
#define DSP1_BASE_RAW_ADDR 0x003
08
000
#define DSP1_BASE_RAW_ADDR 0x003
10
000
#define DSP1_CTRL_RAW_REGS (DSP1_BASE_RAW_ADDR + \
DSP_CTRL_RAW_REGS_OFFS)
...
...
include/boards/afcv3_1/mem_layout.h
View file @
30323471
...
...
@@ -16,7 +16,7 @@
/* Should be autodiscovered by SDB */
/* Wishbone RAW Addresses */
#define FMC1_130M_BASE_RAW_ADDR 0x003
1
0000
#define FMC1_130M_BASE_RAW_ADDR 0x003
2
0000
#define FMC1_130M_CTRL_RAW_REGS (FMC1_130M_BASE_RAW_ADDR + \
FMC_130M_CTRL_RAW_REGS_OFFS)
...
...
@@ -29,7 +29,7 @@
#define FMC1_130M_LM75A_RAW_I2C (FMC1_130M_BASE_RAW_ADDR + \
FMC_130M_LM75A_RAW_I2C_OFFS)
#define FMC1_250M_BASE_RAW_ADDR 0x003
1
0000
#define FMC1_250M_BASE_RAW_ADDR 0x003
2
0000
#define FMC1_250M_CTRL_RAW_REGS (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_CTRL_RAW_REGS_OFFS)
...
...
@@ -44,7 +44,7 @@
#define FMC1_250M_ISLA216P_RAW_SPI (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_ISLA216P_RAW_SPI_OFFS)
#define DSP1_BASE_RAW_ADDR 0x003
08
000
#define DSP1_BASE_RAW_ADDR 0x003
10
000
#define DSP1_CTRL_RAW_REGS (DSP1_BASE_RAW_ADDR + \
DSP_CTRL_RAW_REGS_OFFS)
...
...
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