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Beam Positoning Monitor - Software
Commit 3211f2aa authored by Lucas Russo's avatar Lucas Russo
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Merge branch 'sdb-support' into devel

parents db48dbdb b62b462b
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Showing with 1155 additions and 886 deletions
Makefile
View file @ 3211f2aa
......@@ -83,6 +83,7 @@ LIBHUTILS_DIR = src/libs/libhutils
LIBDISPTABLE_DIR = src/libs/libdisptable
LIBLLIO_DIR = src/libs/libllio
LIBBPMCLIENT_DIR = src/libs/libbpmclient
LIBSDBUTILS_DIR = src/libs/libsdbutils
LIBSDBFS_DIR = foreign/libsdbfs
# General C/CPP flags
......@@ -194,9 +195,9 @@ LIBS = -lm -lzmq -lczmq -lmlm
# FIXME: make the project libraries easily interchangeable, specifying
# the lib only a single time
PROJECT_LIBS_NAME = liberrhand libconvc libhutils libdisptable libllio libbpmclient \
libsdbfs libpcidriver
libsdbutils libsdbfs libpcidriver
PROJECT_LIBS = -lerrhand -lconvc -lhutils -ldisptable -lllio -lbpmclient \
-lsdbfs -lpcidriver
-lsdbutils -lsdbfs -lpcidriver
# General library flags -L<libdir>
LFLAGS = -Lforeign/libsdbfs
......@@ -284,6 +285,7 @@ revision_SRCS = $(patsubst %.o,%.c,$(revision_OBJS))
libdisptable libdisptable_install libdisptable_uninstall libdisptable_clean libdisptable_mrproper \
libllio libllio_install libllio_uninstall libllio_clean libllio_mrproper \
libbpmclient libbpmclient_install libbpmclient_uninstall libbpmclient_clean libbpmclient_mrproper \
libsdbutils libsdbutils_install libsdbutils_uninstall libsdbutils_clean libsdbutils_mrproper \
libsdbfs libsdbfs_install libsdbfs_uninstall libsdbfs_clean libsdbfs_mrproper \
libbsmp libbsmp_install libbsmp_uninstall libbsmp_clean libbsmp_mrproper \
core_install core_uninstall core_clean core_mrproper \
......@@ -479,6 +481,21 @@ libbpmclient_clean:
libbpmclient_mrproper:
$(MAKE) -C $(LIBBPMCLIENT_DIR) mrproper
libsdbutils:
$(MAKE) -C $(LIBSDBUTILS_DIR) all
libsdbutils_install:
$(MAKE) -C $(LIBSDBUTILS_DIR) PREFIX=${PREFIX} install
libsdbutils_uninstall:
$(MAKE) -C $(LIBSDBUTILS_DIR) PREFIX=${PREFIX} uninstall
libsdbutils_clean:
$(MAKE) -C $(LIBSDBUTILS_DIR) clean
libsdbutils_mrproper:
$(MAKE) -C $(LIBSDBUTILS_DIR) mrproper
libsdbfs:
$(MAKE) -C $(LIBSDBFS_DIR) all
......@@ -495,23 +512,29 @@ libsdbfs_mrproper:
$(MAKE) -C $(LIBSDBFS_DIR) mrproper
libs: liberrhand libconvc libhutils \
libdisptable libllio libbpmclient libsdbfs
libdisptable libllio libbpmclient libsdbutils \
libsdbfs
libs_install: liberrhand_install libconvc_install libhutils_install \
libdisptable_install libllio_install libbpmclient_install libsdbfs_install
libdisptable_install libllio_install libbpmclient_install libsdbutils_install \
libsdbfs_install
libs_compile_install: liberrhand liberrhand_install libconvc libconvc_install \
libhutils libhutils_install libdisptable libdisptable_install libllio libllio_install \
libbpmclient libbpmclient_install libsdbfs libsdbfs_install
libbpmclient libbpmclient_install libsdbutils libsdbutils_install \
libsdbfs libsdbfs_install
libs_uninstall: liberrhand_uninstall libconvc_uninstall libhutils_uninstall \
libdisptable_uninstall libllio_uninstall libbpmclient_uninstall libsdbfs_uninstall
libdisptable_uninstall libllio_uninstall libbpmclient_uninstall libsdbutils_uninstall \
libsdbfs_uninstall
libs_clean: liberrhand_clean libconvc_clean libhutils_clean \
libdisptable_clean libllio_clean libbpmclient_clean libsdbfs_clean
libdisptable_clean libllio_clean libbpmclient_clean libsdbutils_clean \
libsdbfs_clean
libs_mrproper: liberrhand_mrproper libconvc_mrproper libhutils_mrproper \
libdisptable_mrproper libllio_mrproper libbpmclient_mrproper libsdbfs_mrproper
libdisptable_mrproper libllio_mrproper libbpmclient_mrproper libsdbutils_mrproper \
libsdbfs_mrproper
# External project dependencies
......@@ -583,18 +606,18 @@ cfg_mrproper:
$(MAKE) -C cfg mrproper
install: core_install deps_install liberrhand_install libconvc_install \
libhutils_install libdisptable_install libllio_install libbpmclient_install \
cfg_install scripts_install
libsdbutils_install libhutils_install libdisptable_install libllio_install \
libbpmclient_install cfg_install scripts_install
uninstall: core_uninstall deps_uninstall liberrhand_uninstall libconvc_uninstall \
libhutils_uninstall libdisptable_uninstall libllio_uninstall libbpmclient_uninstall \
cfg_uninstall scripts_uninstall
libsdbutils_uninstall libhutils_uninstall libdisptable_uninstall libllio_uninstall \
libbpmclient_uninstall cfg_uninstall scripts_uninstall
clean: core_clean deps_clean liberrhand_clean libconvc_clean libhutils_clean \
libdisptable_clean libllio_clean libbpmclient_clean examples_clean tests_clean \
cfg_clean scripts_clean
clean: core_clean deps_clean liberrhand_clean libconvc_clean libsdbutils_clean \
libhutils_clean libdisptable_clean libllio_clean libbpmclient_clean examples_clean \
tests_clean cfg_clean scripts_clean
mrproper: clean core_mrproper deps_mrproper liberrhand_mrproper libconvc_mrproper \
libhutils_mrproper libdisptable_mrproper libllio_mrproper libbpmclient_mrproper \
examples_mrproper tests_mrproper cfg_mrproper scripts_mrproper
libsdbutils_mrproper libhutils_mrproper libdisptable_mrproper libllio_mrproper \
libbpmclient_mrproper examples_mrproper tests_mrproper cfg_mrproper scripts_mrproper
include/boards/afcv3/mem_layout.h
View file @ 3211f2aa
This diff is collapsed.
include/boards/afcv3_1/mem_layout.h
View file @ 3211f2aa
This diff is collapsed.
include/boards/ml605/mem_layout.h
View file @ 3211f2aa
......@@ -13,94 +13,7 @@
/*********************** Static ML605 FPGA layout ***********************/
/* Should be autodiscovered by SDB */
/* Wishbone RAW Addresses */
#define DSP1_BASE_RAW_ADDR 0x00308000
#define DSP1_CTRL_RAW_REGS (DSP1_BASE_RAW_ADDR + \
DSP_CTRL_RAW_REGS_OFFS)
#define DSP1_BPM_RAW_SWAP (DSP1_BASE_RAW_ADDR + \
DSP_BPM_RAW_SWAP_OFFS)
#define FMC1_130M_BASE_RAW_ADDR 0x00310000
#define FMC1_130M_CTRL_RAW_REGS (FMC1_130M_BASE_RAW_ADDR + \
FMC_130M_CTRL_RAW_REGS_OFFS)
#define FMC1_130M_SI571_RAW_I2C (FMC1_130M_BASE_RAW_ADDR + \
FMC_130M_SI571_RAW_I2C_OFFS)
#define FMC1_130M_AD9510_RAW_SPI (FMC1_130M_BASE_RAW_ADDR + \
FMC_130M_AD9510_RAW_SPI_OFFS)
#define FMC1_130M_EEPROM_RAW_I2C (FMC1_130M_BASE_RAW_ADDR + \
FMC_130M_EEPROM_RAW_I2C_OFFS)
#define FMC1_130M_LM75A_RAW_I2C (FMC1_130M_BASE_RAW_ADDR + \
FMC_130M_LM75A_RAW_I2C_OFFS)
#define FMC1_250M_BASE_RAW_ADDR 0x00310000
#define FMC1_250M_CTRL_RAW_REGS (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_CTRL_RAW_REGS_OFFS)
#define FMC1_250M_AMC7823_RAW_SPI (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_AMC7823_RAW_SPI_OFFS)
#define FMC1_250M_ISLA216P_RAW_SPI (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_ISLA216P_RAW_SPI_OFFS)
#define FMC1_250M_AD9510_RAW_SPI (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_AD9510_RAW_SPI_OFFS)
#define FMC1_250M_SI571_RAW_I2C (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_SI571_RAW_I2C_OFFS)
#define FMC1_250M_EEPROM_RAW_I2C (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_EEPROM_RAW_I2C_OFFS)
#define WB_ACQ1_BASE_RAW_ADDR 0x00330000
/* Large Memory RAW Addresses. It lives at address 0 */
#define LARGE_MEM_RAW_ADDR 0x00000000
/* The following is a bit of a hack.
* We employ a generic API for talking to the hardware.
* So, our transport layer (PCIe or Ethernet, for now)
* should be invisible to the SMIO instances.
*
* However, PCI devices generally employ multiple BAR
* registers mapped to different parts of the device.
* For instance, in the bpm-gw FPGA firmware, the PCIe
* core has 3 BARs (BAR0, BAR2 and BAR4) mapped to the
* following:
*
* BAR0 -> PCIe control registers
* BAR2 -> DDR3 SDRAM
* BAR4 -> Wishbone (necessary to use pages mechanism)
*
* So, we define our addresses as the logic address plus
* the BAR number. With this, the PCIe transport layer
* can differentiate between multiple bars and select
* the correct one to read or write
*/
/* Wishbone Addresses */
#define DSP1_BASE_ADDR (BAR4_ADDR | DSP1_BASE_RAW_ADDR)
#define DSP1_CTRL_REGS (BAR4_ADDR | DSP1_CTRL_RAW_REGS)
#define DSP1_BPM_SWAP (BAR4_ADDR | DSP1_BPM_RAW_SWAP)
#define FMC1_130M_BASE_ADDR (BAR4_ADDR | FMC1_130M_BASE_RAW_ADDR)
#define FMC1_130M_CTRL_REGS (BAR4_ADDR | FMC1_130M_CTRL_RAW_REGS)
#define FMC1_130M_FMC_ADC_COMMON (BAR4_ADDR | FMC1_130M_FMC_ADC_COMMON_RAW_REGS)
#define FMC1_130M_FMC_ACTIVE_CLK (BAR4_ADDR | FMC1_130M_FMC_ACTIVE_CLK_RAW)
#define FMC1_130M_EEPROM_I2C (BAR4_ADDR | FMC1_130M_EEPROM_RAW_I2C)
#define FMC1_130M_LM75A_I2C (BAR4_ADDR | FMC1_130M_LM75A_RAW_I2C)
#define FMC1_250M_BASE_ADDR (BAR4_ADDR | FMC1_250M_BASE_RAW_ADDR)
#define FMC1_250M_CTRL_REGS (BAR4_ADDR | FMC1_250M_CTRL_RAW_REGS)
#define FMC1_250M_FMC_ADC_COMMON (BAR4_ADDR | FMC1_250M_FMC_ADC_COMMON_RAW_REGS)
#define FMC1_250M_FMC_ACTIVE_CLK (BAR4_ADDR | FMC1_250M_FMC_ACTIVE_CLK_RAW)
#define FMC1_250M_EEPROM_I2C (BAR4_ADDR | FMC1_250M_EEPROM_RAW_I2C)
#define FMC1_250M_AMC7823_SPI (BAR4_ADDR | FMC1_250M_AMC7823_RAW_SPI)
#define FMC1_250M_ISLA216P_SPI (BAR4_ADDR | FMC1_250M_ISLA216P_RAW_SPI)
#define WB_ACQ1_BASE_ADDR (BAR4_ADDR | WB_ACQ1_BASE_RAW_ADDR)
#define SDB_ADDRESS 0x00300000UL
/************************* ML605 Gateware Options *************************/
......
include/bpm_server_classes.h
View file @ 3211f2aa
......@@ -17,6 +17,7 @@
#include <disptable.h>
#include <errhand.h>
#include <hutils.h>
#include <sdbutils.h>
#include <ll_io.h>
/* Internal libraries dependencies */
......
include/mem_layout_common.h
View file @ 3211f2aa
......@@ -46,6 +46,39 @@ extern "C" {
/* Large Memory RAW Addresses. It lives at address 0 */
#define LARGE_MEM_RAW_ADDR 0x00000000
/* FMC_ACTIVE_CLK Component */
#define FMC_ACTIVE_CLK_CTRL_REGS_OFFS (FMC_ACTIVE_CLK_CTRL_RAW_REGS_OFFS)
#define FMC_ACTIVE_CLK_SI571_I2C_OFFS (FMC_ACTIVE_CLK_SI571_RAW_I2C_OFFS)
#define FMC_ACTIVE_CLK_AD9510_SPI_OFFS (FMC_ACTIVE_CLK_AD9510_RAW_SPI_OFFS)
/* FMC_130M Components */
#define FMC_130M_CTRL_REGS_OFFS (FMC_130M_CTRL_RAW_REGS_OFFS)
#define FMC_130M_FMC_ADC_COMMON_OFFS (FMC_130M_FMC_ADC_COMMON_RAW_REGS_OFFS)
#define FMC_130M_FMC_ACTIVE_CLK_OFFS (FMC_130M_FMC_ACTIVE_CLK_RAW_OFFS)
#define FMC_130M_EEPROM_I2C_OFFS (FMC_130M_EEPROM_RAW_I2C_OFFS)
#define FMC_130M_LM75A_I2C_OFFS (FMC_130M_LM75A_RAW_I2C_OFFS)
/* FMC_250M Components */
#define FMC_250M_CTRL_REGS_OFFS (FMC_250M_CTRL_RAW_REGS_OFFS)
#define FMC_250M_FMC_ADC_COMMON_OFFS (FMC_250M_FMC_ADC_COMMON_RAW_REGS_OFFS)
#define FMC_250M_FMC_ACTIVE_CLK_OFFS (FMC_250M_FMC_ACTIVE_CLK_RAW_OFFS)
#define FMC_250M_EEPROM_I2C_OFFS (FMC_250M_EEPROM_RAW_I2C_OFFS)
#define FMC_250M_AMC7823_SPI_OFFS (FMC_250M_AMC7823_RAW_SPI_OFFS)
#define FMC_250M_ISLA216P_SPI_OFFS (FMC_250M_ISLA216P_RAW_SPI_OFFS)
/* DSP Components */
#define DSP_CTRL_REGS_OFFS (DSP_CTRL_RAW_REGS_OFFS)
#define DSP_BPM_SWAP_OFFS (DSP_BPM_RAW_SWAP_OFFS)
/* ACQ Components */
#define WB_ACQ_CORE_CTRL_REGS_OFFS (WB_ACQ_CORE_CTRL_RAW_REGS_OFFS)
/* Trigger Interface Components */
#define WB_TRIGGER_IFACE_REG_OFFS (WB_TRIGGER_IFACE_RAW_REG_OFFS)
/* Trigger Mux Components */
#define WB_TRIGGER_MUX_REG_OFFS (WB_TRIGGER_MUX_RAW_REG_OFFS)
/* The following is a bit of a hack.
* We employ a generic API for talking to the hardware.
* So, our transport layer (PCIe or Ethernet, for now)
......@@ -67,34 +100,8 @@ extern "C" {
* the correct one to read or write
*/
/* FMC_ACTIVE_CLK Component */
#define FMC_ACTIVE_CLK_CTRL_REGS_OFFS (BAR4_ADDR | FMC_ACTIVE_CLK_CTRL_RAW_REGS_OFFS)
#define FMC_ACTIVE_CLK_SI571_I2C_OFFS (BAR4_ADDR | FMC_ACTIVE_CLK_SI571_RAW_I2C_OFFS)
#define FMC_ACTIVE_CLK_AD9510_SPI_OFFS (BAR4_ADDR | FMC_ACTIVE_CLK_AD9510_RAW_SPI_OFFS)
/* FMC_130M Components */
#define FMC_130M_CTRL_REGS_OFFS (BAR4_ADDR | FMC_130M_CTRL_RAW_REGS_OFFS)
#define FMC_130M_FMC_ADC_COMMON_OFFS (BAR4_ADDR | FMC_130M_FMC_ADC_COMMON_RAW_REGS_OFFS)
#define FMC_130M_FMC_ACTIVE_CLK_OFFS (BAR4_ADDR | FMC_130M_FMC_ACTIVE_CLK_RAW_OFFS)
#define FMC_130M_EEPROM_I2C_OFFS (BAR4_ADDR | FMC_130M_EEPROM_RAW_I2C_OFFS)
#define FMC_130M_LM75A_I2C_OFFS (BAR4_ADDR | FMC_130M_LM75A_RAW_I2C_OFFS)
/* FMC_250M Components */
#define FMC_250M_CTRL_REGS_OFFS (BAR4_ADDR | FMC_250M_CTRL_RAW_REGS_OFFS)
#define FMC_250M_FMC_ADC_COMMON_OFFS (BAR4_ADDR | FMC_250M_FMC_ADC_COMMON_RAW_REGS_OFFS)
#define FMC_250M_FMC_ACTIVE_CLK_OFFS (BAR4_ADDR | FMC_250M_FMC_ACTIVE_CLK_RAW_OFFS)
#define FMC_250M_EEPROM_I2C_OFFS (BAR4_ADDR | FMC_250M_EEPROM_RAW_I2C_OFFS)
#define FMC_250M_AMC7823_SPI_OFFS (BAR4_ADDR | FMC_250M_AMC7823_RAW_SPI_OFFS)
#define FMC_250M_ISLA216P_SPI_OFFS (BAR4_ADDR | FMC_250M_ISLA216P_RAW_SPI_OFFS)
/* DSP Components */
#define DSP_CTRL_REGS_OFFS (BAR4_ADDR | DSP_CTRL_RAW_REGS_OFFS)
#define DSP_BPM_SWAP_OFFS (BAR4_ADDR | DSP_BPM_RAW_SWAP_OFFS)
/* ACQ Components */
#define WB_ACQ_CORE_CTRL_REGS_OFFS (BAR4_ADDR | WB_ACQ_CORE_CTRL_RAW_REGS_OFFS)
/* Large Memory Addresses */
/* FIXME. Large Memory Addresses. We should not have to specify BAR2_ADDR,
* as this is specific to PCIe */
#define LARGE_MEM_ADDR (BAR2_ADDR | LARGE_MEM_RAW_ADDR)
#ifdef __cplusplus
......
run_valgrind.sh
View file @ 3211f2aa
......@@ -25,7 +25,7 @@ valgrind --leak-check=yes --trace-children=yes \
--suppressions=valgrind.supp \
${PREFIX}/bin/ebpm -f ${PREFIX}/etc/bpm_sw/bpm_sw.cfg \
-n be -t pcie \
-i ${board_slot} -e /dev/fpga/${board_slot} -s 0 \
-i ${board_slot} \
-b tcp://127.0.0.1:8978 -l stdout > \
valgrind_report.txt 2>&1
src/apps/ebpm/ebpm.c
View file @ 3211f2aa
......@@ -65,7 +65,6 @@ static char *_create_log_filename (char *log_prefix, uint32_t dev_id,
const char *devio_type, uint32_t smio_inst_id);
static devio_err_e _spawn_platform_smios (void *pipe, devio_type_e devio_type,
uint32_t smio_inst_id, zhashx_t *hints, uint32_t dev_id);
static devio_err_e _spawn_be_platform_smios (void *pipe, zhashx_t *hints, uint32_t dev_id);
static devio_err_e _spawn_fe_platform_smios (void *pipe, uint32_t smio_inst_id);
static struct option long_options[] =
......@@ -610,12 +609,14 @@ static devio_err_e _spawn_platform_smios (void *pipe, devio_type_e devio_type,
uint32_t smio_inst_id, zhashx_t *hints, uint32_t dev_id)
{
assert (pipe);
(void) hints;
(void) dev_id;
devio_err_e err = DEVIO_SUCCESS;
switch (devio_type) {
case BE_DEVIO:
err = _spawn_be_platform_smios (pipe, hints, dev_id);
err = devio_register_all_sm (pipe);
break;
case FE_DEVIO:
......@@ -636,131 +637,6 @@ err_register_sm:
return err;
}
static devio_err_e _spawn_be_platform_smios (void *pipe, zhashx_t *hints, uint32_t dev_id)
{
const char *fmc_board_130m_4ch = "fmc130m_4ch";
const char *fmc_board_250m_4ch = "fmc250m_4ch";
uint32_t fmc130m_4ch_id = 0x7085ef15;
uint32_t fmc250m_4ch_id = 0x68e3b1af;
uint32_t acq_id = 0x4519a0ad;
uint32_t dsp_id = 0x1bafbf1e;
uint32_t swap_id = 0x12897592;
devio_err_e err = DEVIO_SUCCESS;
/* ML605 or AFCv3 */
#if defined (__BOARD_ML605__) || (__BOARD_AFCV3__)
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_INFO, "[ebpm] Spawning default SMIOs ...\n");
/* Look for which FMC board to spawn */
char hints_key [HUTILS_CFG_HASH_KEY_MAX_LEN];
snprintf (hints_key, sizeof (hints_key),
HUTILS_CFG_HASH_KEY_PATTERN_COMPL, dev_id, 0);
hutils_hints_t *cfg_item = zhashx_lookup (hints, hints_key);
/* If key is not found, assume the fmc130m default FMC board */
if (cfg_item == NULL || cfg_item->fmc_board == NULL ||
streq (cfg_item->fmc_board, "") || streq (cfg_item->fmc_board,
fmc_board_130m_4ch)) {
/* Default FMC Board */
err = devio_register_sm (pipe, fmc130m_4ch_id, FMC1_130M_BASE_ADDR, 0);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
}
else if (streq (cfg_item->fmc_board, fmc_board_250m_4ch)) {
/* FMC250m Board */
err = devio_register_sm (pipe, fmc250m_4ch_id, FMC1_250M_BASE_ADDR, 0);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
}
err = devio_register_sm (pipe, acq_id, WB_ACQ1_BASE_ADDR, 0);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
err = devio_register_sm (pipe, dsp_id, DSP1_BASE_ADDR, 0);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
err = devio_register_sm (pipe, swap_id, DSP1_BASE_ADDR, 0);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
/* AFCv3 spefific */
#if defined (__BOARD_AFCV3__)
uint32_t afc_diag_id = 0x51954750;
uint32_t trigger_iface_id = 0xbcbb78d2;
uint32_t trigger_mux_id = 0x84b6a5ac;
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_INFO, "[ebpm] Spawning AFCv3 specific SMIOs ...\n");
snprintf (hints_key, sizeof (hints_key),
HUTILS_CFG_HASH_KEY_PATTERN_COMPL, dev_id, 0);
cfg_item = zhashx_lookup (hints, hints_key);
/* If key is not found, assume the fmc130m default FMC board */
if (cfg_item == NULL || cfg_item->fmc_board == NULL ||
streq (cfg_item->fmc_board, "") || streq (cfg_item->fmc_board,
fmc_board_130m_4ch)) {
/* Default FMC Board */
err = devio_register_sm (pipe, fmc130m_4ch_id, FMC2_130M_BASE_ADDR, 1);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
}
else if (streq (cfg_item->fmc_board, fmc_board_250m_4ch)) {
/* FMC250m Board */
err = devio_register_sm (pipe, fmc250m_4ch_id, FMC2_250M_BASE_ADDR, 1);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
}
err = devio_register_sm (pipe, acq_id, WB_ACQ2_BASE_ADDR, 1);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
err = devio_register_sm (pipe, dsp_id, DSP2_BASE_ADDR, 1);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
err = devio_register_sm (pipe, swap_id, DSP2_BASE_ADDR, 1);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
err = devio_register_sm (pipe, afc_diag_id, WB_AFC_DIAG_BASE_ADDR, 0);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
err = devio_register_sm (pipe, trigger_iface_id, WB_TRIGGER_IFACE_BASE_ADDR, 0);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
err = devio_register_sm (pipe, trigger_mux_id, WB_TRIGGER_MUX1_BASE_ADDR, 0);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
err = devio_register_sm (pipe, trigger_mux_id, WB_TRIGGER_MUX2_BASE_ADDR, 1);
if (err != DEVIO_SUCCESS) {
DBE_DEBUG (DBG_DEV_IO | DBG_LVL_FATAL, "[ebpm] devio_register_sm error!\n");
}
#endif
#else
#error "BE FPGA Board not supported!"
#endif
return err;
}
static devio_err_e _spawn_fe_platform_smios (void *pipe, uint32_t smio_inst_id)
{
uint32_t rffe_id = 0x7af21909;
......
src/dev_io/dev_io_core.c
View file @ 3211f2aa
This diff is collapsed.
src/libs/liberrhand/include/errhand_print.h
View file @ 3211f2aa
......@@ -49,7 +49,7 @@ void errhand_log_print_zmq_msg (struct _zmsg_t *msg);
/* dbg has the following format:
* 31 - 4 3 - 1 0-0
* ERRHAND_SUBSYS ERRHAND_LVL ERRHAND_HALT
* ERRHAND_SUBSYS ERRHAND_LVL ERRHAND_SIMPLE
*/
#ifdef ERRHAND_DBG
......@@ -59,12 +59,8 @@ void errhand_log_print_zmq_msg (struct _zmsg_t *msg);
if (((dbg) & ERRHAND_SUBSYS_ON) && \
(((dbg) & ERRHAND_LVL_MASK) >= \
ERRHAND_MIN_LEVEL)) { \
errhand_log_print((dbg) & ERRHAND_LVL_MASK, \
errhand_log_print((dbg) & ERRHAND_LVL_SIMPLE_MASK, \
fmt, ## __VA_ARGS__); \
\
if ((dbg) & ERRHAND_LVL_HALT) { \
while(1); \
} \
} \
} while(0)
......@@ -74,9 +70,6 @@ void errhand_log_print_zmq_msg (struct _zmsg_t *msg);
(((dbg) & ERRHAND_LVL_MASK) >= \
ERRHAND_MIN_LEVEL)) { \
errhand_print_vec(fmt, data, len); \
\
if ((dbg) & ERRHAND_LVL_HALT) \
while(1); \
} \
} while(0)
......
src/libs/liberrhand/include/errhand_subsys.h
View file @ 3211f2aa
......@@ -112,31 +112,46 @@ extern "C" {
extern const char *errhand_lvl_str [ERRHAND_LVL_NUM];
char *errhand_lvl_to_str (int errhand_lvl);
/****************** Debug halt macros ******************/
/****************** Debug simple macros ******************/
/*
* ERRHAND_HALT variable is binary encoded in bit 0:
* ERRHAND_SIMPLE variable is binary encoded in bit 0:
* bit 31 ... bit 4 bit 3 ... bit 1 bit 0
* X X X X [1|0]
*/
/* Debug halt */
#define ERRHAND_HALT_SHIFT 0
#define ERRHAND_HALT_MAX 1
#define ERRHAND_HALT_MASK_RAW ((1 << ERRHAND_HALT_SHIFT)-1)
#define ERRHAND_HALT_MASK (ERRHAND_HALT_MASK_RAW << ERRHAND_HALT_SHIFT)
/* This bits sets the simple mode for writing without headers/prefix,
* just plain text */
/* 1 halt signal */
#define ERRHAND_HALT_GEN(val) ((val & ERRHAND_HALT_MASK_RAW) << ERRHAND_HALT_SHIFT)
#define ERRHAND_HALT_DEGEN(val) ((val & ERRHAND_HALT_MASK) >> ERRHAND_HALT_SHIFT)
/* Debug simple */
#define ERRHAND_SIMPLE_SHIFT 0
#define ERRHAND_SIMPLE_MAX 1
#define ERRHAND_SIMPLE_MASK_RAW ((1 << ERRHAND_SIMPLE_MAX)-1)
#define ERRHAND_SIMPLE_MASK (ERRHAND_SIMPLE_MASK_RAW << ERRHAND_SIMPLE_SHIFT)
/* Debug halt raw */
#define ERRHAND_LVL_HALT_RAW 0x1
/* 1 simple signal */
#define ERRHAND_SIMPLE_GEN(val) ((val & ERRHAND_SIMPLE_MASK_RAW) << ERRHAND_SIMPLE_SHIFT)
#define ERRHAND_SIMPLE_DEGEN(val) ((val & ERRHAND_SIMPLE_MASK) >> ERRHAND_SIMPLE_SHIFT)
/* Debug halt mask'ed and shift'ed */
#define ERRHAND_LVL_HALT ERRHAND_HALT_GEN(ERRHAND_LVL_HALT_RAW)
/* Debug simple raw */
#define ERRHAND_LVL_SIMPLE_RAW 0x1
/* Debug simple mask'ed and shift'ed */
#define ERRHAND_LVL_SIMPLE ERRHAND_SIMPLE_GEN(ERRHAND_LVL_SIMPLE_RAW)
/* For compatibility */
#define DBG_LVL_HALT ERRHAND_LVL_HALT
#define DBG_LVL_SIMPLE ERRHAND_LVL_SIMPLE
/****************** Debug levels + simple macros ******************/
/* Debug simple */
#define ERRHAND_LVL_SIMPLE_SHIFT 0
#define ERRHAND_LVL_SIMPLE_MAX 4
#define ERRHAND_LVL_SIMPLE_MASK_RAW ((1 << ERRHAND_LVL_SIMPLE_MAX)-1)
#define ERRHAND_LVL_SIMPLE_MASK (ERRHAND_LVL_SIMPLE_MASK_RAW << ERRHAND_LVL_SIMPLE_SHIFT)
/* 1 simple signal */
#define ERRHAND_LVL_SIMPLE_GEN(val) ((val & ERRHAND_LVL_SIMPLE_MASK_RAW) << ERRHAND_LVL_SIMPLE_SHIFT)
#define ERRHAND_LVL_SIMPLE_DEGEN(val) ((val & ERRHAND_LVL_SIMPLE_MASK) >> ERRHAND_LVL_SIMPLE_SHIFT)
#ifdef __cplusplus
}
......
src/libs/liberrhand/src/errhand_print.c
View file @ 3211f2aa
......@@ -8,6 +8,8 @@
#include "errhand.h"
#define ERRHAND_PRINT_PAD_FMT "-5"
#define ERRHAND_DATE_LENGTH 20
#define ERRHAND_TEXT_LENGTH 1024
/* Our logfile */
static FILE *_errhand_logfile = NULL;
......@@ -23,7 +25,7 @@ void errhand_print (const char *fmt, ...)
/* Based on CZMQ s_log () function. Available in
* https://github.com/zeromq/czmq/blob/master/src/zsys.c */
static void _errhand_log_write (char *errhand_lvl_str, char *msg)
static void _errhand_log_write (char *errhand_lvl_str, char *msg, bool verbose)
{
/* Default to stdout */
if (!_errhand_logfile) {
......@@ -32,13 +34,18 @@ static void _errhand_log_write (char *errhand_lvl_str, char *msg)
time_t curtime = time (NULL);
struct tm *loctime = localtime (&curtime);
char date [20];
char date [ERRHAND_DATE_LENGTH];
char log_text [ERRHAND_TEXT_LENGTH];
strftime (date, 20, "%y-%m-%d %H:%M:%S", loctime);
if (verbose) {
strftime (date, ERRHAND_DATE_LENGTH, "%y-%m-%d %H:%M:%S", loctime);
snprintf (log_text, ERRHAND_TEXT_LENGTH, "%" ERRHAND_PRINT_PAD_FMT "s: [%s] %s",
errhand_lvl_str, date, msg);
}
else {
snprintf (log_text, ERRHAND_TEXT_LENGTH, "%s", msg);
}
char log_text [1024];
snprintf (log_text, 1024, "%" ERRHAND_PRINT_PAD_FMT "s: [%s] %s",
errhand_lvl_str, date, msg);
fprintf (_errhand_logfile, "%s", log_text);
fflush (_errhand_logfile);
}
......@@ -52,9 +59,12 @@ void errhand_log_print (int errhand_lvl, const char *fmt, ...)
char *msg = errhand_lprint_vprintf (fmt, argptr);
va_end (argptr);
/* Check if we opted for the simple print (i.e., no warning level and date) */
bool verbose = !(ERRHAND_SIMPLE_DEGEN(errhand_lvl) & ERRHAND_LVL_SIMPLE_RAW);
/* Convert errhand level code to string */
char *errhand_lvl_str = errhand_lvl_to_str (errhand_lvl);
_errhand_log_write (errhand_lvl_str, msg);
_errhand_log_write (errhand_lvl_str, msg, verbose);
free (msg);
free (errhand_lvl_str);
}
......
src/libs/libllio/include/ll_io_core.h
View file @ 3211f2aa
......@@ -82,6 +82,12 @@ char *llio_clone_endpoint_name (llio_t *self);
llio_err_e llio_set_dev_handler (llio_t *self, void *dev_handler);
/* Get dev handler */
void *llio_get_dev_handler (llio_t *self);
/* Get type */
llio_type_e llio_get_type (llio_t *self);
/* Set SDB prefix ADDR */
llio_err_e llio_set_sdb_prefix_addr (llio_t *self, uint64_t sdb_prefix_addr);
/* Get SDB prefix ADDR */
uint64_t llio_get_sdb_prefix_addr (llio_t *self);
/************************************************************/
/**************** Low Level generic methods API *************/
......
src/libs/libllio/src/ll_io_core.c
View file @ 3211f2aa
......@@ -38,6 +38,8 @@ struct _llio_t {
devices functions */
char *name; /* Identification of this llio instance */
int verbose; /* Print activity to stdout */
uint64_t sdb_prefix_addr; /* SDB prefix address. Used to read/write to the
SDB address space. To be set by the specific ops */
/* Endpoint to connect to */
llio_endpoint_t *endpoint;
......@@ -69,6 +71,8 @@ llio_t * llio_new (char *name, char *endpoint, llio_type_e type, int verbose)
self->name = strdup (name);
ASSERT_ALLOC(self->name, err_name_alloc);
self->verbose = verbose;
/* This shoule be set by the specific operations (e.g., PCIe, ETH) */
self->sdb_prefix_addr = 0x0;
/* Initilialize llio_endpoint */
self->endpoint = NULL;
......@@ -189,6 +193,24 @@ void *llio_get_dev_handler (llio_t *self)
return self->dev_handler;
}
llio_type_e llio_get_type (llio_t *self)
{
return self->type;
}
llio_err_e llio_set_sdb_prefix_addr (llio_t *self, uint64_t sdb_prefix_addr)
{
assert (self);
self->sdb_prefix_addr = sdb_prefix_addr;
return LLIO_SUCCESS;
}
uint64_t llio_get_sdb_prefix_addr (llio_t *self)
{
assert (self);
return self->sdb_prefix_addr;
}
/**************** Static function ****************/
static bool _llio_get_endpoint_open (llio_t *self)
......
src/libs/libllio/src/ops/ll_io_eth.c
View file @ 3211f2aa
......@@ -195,6 +195,9 @@ static int eth_open (llio_t *self, llio_endpoint_t *endpoint)
/* Signal that the endpoint is opened and ready to work */
llio_set_endpoint_open (self, true);
/* Set SDB prefix adress */
llio_set_sdb_prefix_addr (self, 0x0);
DBE_DEBUG (DBG_LL_IO | DBG_LVL_INFO,
"[ll_io_eth] Opened ETH device located at %s\n",
llio_get_endpoint_name (self));
......
src/libs/libllio/src/ops/ll_io_pcie.c
View file @ 3211f2aa
......@@ -188,6 +188,9 @@ static int pcie_open (llio_t *self, llio_endpoint_t *endpoint)
DBE_DEBUG (DBG_LL_IO | DBG_LVL_INFO,
"[ll_io_pcie] Opened PCIe device located at %s\n",
llio_get_endpoint_name (self));
/* Set SDB prefix adress */
llio_set_sdb_prefix_addr (self, BAR4_ADDR);
/* Reset FPGA */
_pcie_reset_fpga (self);
......
src/libs/libsdbutils/Makefile 0 → 100644
View file @ 3211f2aa
# Set your cross compile prefix with CROSS_COMPILE variable
CROSS_COMPILE ?=
CMDSEP = ;
CC ?= $(CROSS_COMPILE)gcc
AR ?= $(CROSS_COMPILE)ar
LD ?= $(CROSS_COMPILE)ld
OBJDUMP ?= $(CROSS_COMPILE)objdump
OBJCOPY ?= $(CROSS_COMPILE)objcopy
SIZE ?= $(CROSS_COMPILE)size
MAKE ?= make
PWD = $(shell pwd)
LIBNAME_RAW = sdbutils
LIBNAME = lib$(LIBNAME_RAW)
# Config variables suitable for creating shared libraries
LIB_VER = $(shell ./version.sh $(LIBNAME_RAW))
LIB_VER_MAJOR = $(shell echo $(LIB_VER)| cut -d'.' -f1)
LIB_VER_MINOR = $(shell echo $(LIB_VER)| cut -d'.' -f2)
LIB_VER_REVESION = $(shell echo $(LIB_VER)| cut -d'.' -f3)
PREFIX ?= /usr/local
export PREFIX
# General C/CPP flags
CFLAGS_USR = -std=gnu99 -O2 -fPIC
# We expect tghese variables to be appended to the possible
# command-line options
override CPPFLAGS +=
override CXXFLAGS +=
# To enable this option, use: make ERRHAND_DBG=y
ifneq ($(ERRHAND_DBG),)
CFLAGS_DEBUG += -DERRHAND_DBG=$(ERRHAND_DBG)
endif
# To enable this option use: make ERRHAND_MIN_LEVEL=DBG_MIN_TRACE
ifneq ($(ERRHAND_MIN_LEVEL),)
CFLAGS_DEBUG += -DERRHAND_MIN_LEVEL=$(ERRHAND_MIN_LEVEL)
endif
# To enable this option use: make ERRHAND_SUBSYS_ON='"(DBG_DEV_MNGR | \
# DBG_DEV_IO | DBG_SM_IO | DBG_LIB_CLIENT | DBG_SM_PR | DBG_SM_CH | DBG_LL_IO | DBG_HAL_UTILS)"'
#
# You can also OR the available subsytems to enable debug messages in just the
# those subsytems. See file errhand_opts.h for more information
ifneq ($(ERRHAND_SUBSYS_ON),)
CFLAGS_DEBUG += -DERRHAND_SUBSYS_ON=$(ERRHAND_SUBSYS_ON)
endif
# Debug flags -D<flasg_name>=<value>
CFLAGS_DEBUG += -g
# Specific platform Flags
CFLAGS_PLATFORM = -Wall -Wextra -Werror
LDFLAGS_PLATFORM =
# Libraries
LIBS =
# General library flags -L<libdir>
LFLAGS =
# Source directory
SRC_DIR = src
# Include directory
INCLUDE_DIR = include
# Include directories
# FIXME. Needed so we can find libsdbfs headers
INCLUDE_DIRS = -Iinclude -I${PREFIX}/include \
-I../../../foreign/libsdbfs \
-I../../../include
# Merge all flags. We expect tghese variables to be appended to the possible
# command-line options
override CFLAGS += $(CFLAGS_USR) $(CFLAGS_PLATFORM) $(CFLAGS_DEBUG) $(CPPFLAGS) $(CXXFLAGS)
override LDFLAGS += $(LFLAGS) $(LDFLAGS_PLATFORM)
# Output library names
OUT = $(LIBNAME)
.SECONDEXPANSION:
# Library objects
$(LIBNAME)_OBJS_LIB = \
$(SRC_DIR)/sdbutils_core.o \
$(SRC_DIR)/sdbutils_err.o
# Objects common for this library
common_OBJS =
# Objects for each version of library
$(LIBNAME)_OBJS = $(common_OBJS) $($(LIBNAME)_OBJS_LIB)
$(LIBNAME)_CODE_HEADERS = \
$(INCLUDE_DIR)/sdbutils_classes.h \
$(INCLUDE_DIR)/sdbutils_prelude.h \
$(INCLUDE_DIR)/sdbutils.h \
$(INCLUDE_DIR)/sdbutils_core.h \
$(INCLUDE_DIR)/sdbutils_err.h
$(LIBNAME)_HEADERS = $($(LIBNAME)_CODE_HEADERS)
OBJS_all = $(common_OBJS) $($(LIBNAME)_OBJS)
# Libraries suffixes
LIB_STATIC_SUFFIX = .a
LIB_SHARED_SUFFIX = .so
# Generate suitable names for static libraries
# Generate suitable names for static libraries
TARGET_STATIC = $(addsuffix $(LIB_STATIC_SUFFIX), $(OUT))
TARGET_SHARED = $(addsuffix $(LIB_SHARED_SUFFIX), $(OUT))
TARGET_SHARED_VER = $(addsuffix $(LIB_SHARED_SUFFIX).$(LIB_VER), $(OUT))
.PHONY: all clean mrproper install uninstall
# Avoid deletion of intermediate files, such as objects
.SECONDARY: $(OBJS_all)
# Makefile rules
all: $(TARGET_STATIC) $(TARGET_SHARED_VER)
# Compile static library
%.a: $$($$*_OBJS)
$(AR) rcs $@ $^
# Compile dynamic library
%.so.$(LIB_VER): $$($$*_OBJS) $(OBJ_REVISION)
$(CC) $(LDFLAGS) -shared -fPIC -Wl,-soname,$@ -o $@ $^
# Pull in dependency info for *existing* .o files and don't complain if the
# corresponding .d file is not found
-include $(OBJS_all:.o=.d)
# Compile with position-independent objects.
# Autodependencies generatation by Scott McPeak, November 2001,
# from article "Autodependencies with GNU make"
%.o: %.c
$(CC) $(CFLAGS) $(INCLUDE_DIRS) -c $*.c -o $@
# create the dependency files "target: pre-requisites"
${CC} -MM $(CFLAGS) $(INCLUDE_DIRS) $*.c > $*.d
# Workaround to make objects in different folders have
# the correct target path. e.g., "dir/bar.o: dir/bar.c dir/foo.h"
# instead of "bar.o: dir/bar.c dir/foo.h"
@mv -f $*.d $*.d.tmp
@sed -e 's|.*:|$*.o:|' < $*.d.tmp > $*.d
# All prereqs listed will also become command-less,
# prereq-less targets. In this way, the prereq file will be
# treated as changed and the target will be rebuilt
# sed: strip the target (everything before colon)
# sed: remove any continuation backslashes
# fmt -1: list words one per line
# sed: strip leading spaces
# sed: add trailing colons
@sed -e 's/.*://' -e 's/\\$$//' < $*.d.tmp | fmt -1 | \
sed -e 's/^ *//' -e 's/$$/:/' >> $*.d
@rm -f $*.d.tmp
install:
$(foreach lib,$(TARGET_SHARED_VER),install -m 755 $(lib) $(PREFIX)/lib $(CMDSEP))
$(foreach lib,$(TARGET_SHARED),ln -sf $(lib).$(LIB_VER) $(PREFIX)/lib/$(lib) $(CMDSEP))
$(foreach lib,$(TARGET_SHARED),ln -sf $(lib).$(LIB_VER) $(PREFIX)/lib/$(lib).$(LIB_VER_MAJOR) $(CMDSEP))
$(foreach lib,$(TARGET_STATIC),install -m 755 $(lib) $(PREFIX)/lib $(CMDSEP))
$(foreach header,$($(LIBNAME)_HEADERS),install -m 755 $(header) $(PREFIX)/include $(CMDSEP))
uninstall:
$(foreach lib,$(TARGET_SHARED),rm -f $(PREFIX)/lib/$(lib).$(LIB_VER) $(CMDSEP))
$(foreach lib,$(TARGET_SHARED),rm -f $(PREFIX)/lib/$(lib) $(CMDSEP))
$(foreach lib,$(TARGET_SHARED),rm -f $(PREFIX)/lib/$(lib).$(LIB_VER_MAJOR) $(CMDSEP))
$(foreach lib,$(TARGET_STATIC),rm -f $(PREFIX)/lib/$(lib) $(CMDSEP))
$(foreach header,$(notdir $($(LIBNAME)_HEADERS)),rm -f \
$(PREFIX)/include/$(header) $(CMDSEP))
clean:
rm -f $(OBJS_all) $(OBJS_all:.o=.d)
mrproper: clean
rm -f *.a *.so.$(LIB_VER)
src/libs/libsdbutils/README.deps 0 → 100644
View file @ 3211f2aa
Project Dependencies:
liberrhand
Foreign Dependencies:
libsdbfs
src/libs/libsdbutils/compile.sh 0 → 100755
View file @ 3211f2aa
#!/usr/bin/env bash
#######################################
# All of our Makefile options
#######################################
EXTRA_FLAGS=$1
#Select if we want to compile with debug mode on. Options are: y(es) or n(o)
ERRHAND_DBG=y
# Select the minimum debug verbosity. See liberrhand file errhand_opts.h for more info.
ERRHAND_MIN_LEVEL=DBG_LVL_INFO
# Select the subsytems which will have the debug on. See liberrhand file errhand_opts.h for more info.
ERRHAND_SUBSYS_ON='"(DBG_DEV_MNGR | DBG_DEV_IO | DBG_SM_IO | DBG_LIB_CLIENT | DBG_SM_PR | DBG_SM_CH | DBG_LL_IO | DBG_HAL_UTILS)"'
# Select the FMC ADC board type. Options are: passive or active
COMMAND_LIBSDBUTILS="\
make \
${EXTRA_FLAGS} \
ERRHAND_DBG=${ERRHAND_DBG} \
ERRHAND_MIN_LEVEL=${ERRHAND_MIN_LEVEL} \
ERRHAND_SUBSYS_ON='"${ERRHAND_SUBSYS_ON}"' && \
sudo make install"
COMMAND_ARRAY=(
"${COMMAND_LIBSDBUTILS}"
)
for i in "${COMMAND_ARRAY[@]}"
do
echo "Executing: " $i
eval $i
# Check return value
rc=$?
if [[ $rc != 0 ]]; then
exit $rc
fi
done
src/libs/libsdbutils/include/sdbutils.h 0 → 100644
View file @ 3211f2aa
/*
* Copyright (C) 2016 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU GPL, version 3 or any later version.
*/
#ifndef _SDBUTILS_H_
#define _SDBUTILS_H_
#include "sdbutils_classes.h"
#endif
src/libs/libsdbutils/include/sdbutils_classes.h 0 → 100644
View file @ 3211f2aa
/*
* Copyright (C) 2016 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU GPL, version 3 or any later version.
*/
#ifndef _SDBUTILS_CLASSES_H_
#define _SDBUTILS_CLASSES_H_
/* External dependencies */
#include <czmq.h>
#include <errhand.h>
#include <libsdbfs.h>
/* version macros for compile-time API detection */
#define SDBUTILS_VERSION_MAJOR 0
#define SDBUTILS_VERSION_MINOR 1
#define SDBUTILS_VERSION_PATCH 0
#define SDBUTILS_MAKE_VERSION(major, minor, patch) \
((major) * 10000 + (minor) * 100 + (patch))
#define SDBUTILS_VERSION \
SDBUTILS_MAKE_VERSION(SDBUTILS_VERSION_MAJOR, SDBUTILS_VERSION_MINOR, \
SDBUTILS_VERSION_PATCH)
#if defined (__WINDOWS__)
# if defined LIBSDBUTILS_STATIC
# define SDBUTILS_EXPORT
# elif defined LIBSDBUTILS_EXPORTS
# define SDBUTILS_EXPORT __declspec(dllexport)
# else
# define SDBUTILS_EXPORT __declspec(dllimport)
# endif
#else
# define SDBUTILS_EXPORT
#endif
/* Opaque class structures to allow forward references */
/* Public API classes */
/* SDBUTILS */
#include "sdbutils_err.h"
#include "sdbutils_core.h"
#endif
src/libs/libsdbutils/include/sdbutils_core.h 0 → 100644
View file @ 3211f2aa
/*
* Copyright (C) 2016 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU GPL, version 3 or any later version.
*/
#ifndef _SDBUTILS_CORE_H_
#define _SDBUTILS_CORE_H_
#ifdef __cplusplus
extern "C" {
#endif
/* Print device as ASCII */
sdbutils_err_e sdbutils_list_device (struct sdb_device *d, int depth, int base,
int opt_long);
/* Print whole SDBFS as ASCII */
sdbutils_err_e sdbutils_do_list (struct sdbfs *fs, int opt_long);
/* Search for device name and print device */
sdbutils_err_e sdbutils_do_cat_name (struct sdbfs *fs, char *name);
/* Search for device Vendor/ID and print device */
sdbutils_err_e sdbutils_do_cat_id (struct sdbfs *fs, uint64_t vendor, uint32_t dev);
/* Return next device on current SDB position */
struct sdb_device *sdbutils_next_device (struct sdbfs *fs);
#ifdef __cplusplus
}
#endif
#endif
src/libs/libsdbutils/include/sdbutils_err.h 0 → 100644
View file @ 3211f2aa
/*
* Copyright (C) 2016 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU GPL, version 3 or any later version.
*/
/* Error definitions and output stringification based on the work available
* at the libsllp project repository: https://github.com/brunoseivam/libsllp */
#ifndef _SDBUTILS_ERR_H_
#define _SDBUTILS_ERR_H_
#ifdef __cplusplus
extern "C" {
#endif
enum _sdbutils_err_e
{
SDBUTILS_SUCCESS = 0, /* No error */
SDBUTILS_ERR_ALLOC, /* Could not allocate memory */
SDBUTILS_ERR_OPEN, /* Could not open SDBFS */
SDBUTILS_ERR_UNK_REC, /* Unknown record type */
SDBUTILS_ERR_END
};
typedef enum _sdbutils_err_e sdbutils_err_e;
/* Convert enumeration type to string */
const char * sdbutils_err_str (sdbutils_err_e err);
#ifdef __cplusplus
}
#endif
#endif
src/libs/libsdbutils/include/sdbutils_prelude.h 0 → 100644
View file @ 3211f2aa
/*
* Copyright (C) 2016 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU GPL, version 3 or any later version.
*/
#ifndef _SDBUTILS_PRELUDE_H_
#define _SDBUTILS_PRELUDE_H_
/* External dependencies */
#include <inttypes.h>
#include <sys/types.h>
#include <stdbool.h>
#endif
src/libs/libsdbutils/src/sdbutils_core.c 0 → 100644
View file @ 3211f2aa
/*
* Copyright (C) 2016 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU GPL, version 3 or any later version.
*/
#include "sdbutils.h"
/* Undef ASSERT_ALLOC to avoid conflicting with other ASSERT_ALLOC */
#ifdef ASSERT_TEST
#undef ASSERT_TEST
#endif
#define ASSERT_TEST(test_boolean, err_str, err_goto_label, /* err_core */ ...) \
ASSERT_HAL_TEST(test_boolean, HAL_UTILS, "[sdbutils:utils]", \
err_str, err_goto_label, /* err_core */ __VA_ARGS__)
#ifdef ASSERT_ALLOC
#undef ASSERT_ALLOC
#endif
#define ASSERT_ALLOC(ptr, err_goto_label, /* err_core */ ...) \
ASSERT_HAL_ALLOC(ptr, HAL_UTILS, "[sdbutils:utils]", \
sdbutils_err_str(SDBUTILS_ERR_ALLOC), \
err_goto_label, /* err_core */ __VA_ARGS__)
#ifdef CHECK_ERR
#undef CHECK_ERR
#endif
#define CHECK_ERR(err, err_type) \
CHECK_HAL_ERR(err, HAL_UTILS, "[sdbutils:utils]", \
sdbutils_err_str (err_type))
/*******************************************************************/
/********************* SDB Utilities functions ********************/
/*******************************************************************/
/* Copied from libsdbfs/tools/sdb-read, located at:
* git://ohwr.org/hdl-core-lib/fpga-config-space.git */
/* Boring ascii representation of a device */
sdbutils_err_e sdbutils_list_device (struct sdb_device *d, int depth, int base,
int opt_long)
{
sdbutils_err_e err = SDBUTILS_SUCCESS;
struct sdb_product *p;
struct sdb_component *c;
struct sdb_synthesis *s;
unsigned char *data;
int i;
c = &d->sdb_component;
p = &c->product;
s = (void *)d;
/* Different sdb items are listed in different ways */
switch(p->record_type) {
/* The following items are components, and are listed as such */
case sdb_type_interconnect:
case sdb_type_device:
case sdb_type_bridge:
if (!opt_long) {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "%.19s\n", p->name);
return SDBUTILS_SUCCESS;
}
/* hack: show directory level looking at the internals */
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "%016llx:%08x @ %08llx-%08llx ",
(long long)ntohll(p->vendor_id), ntohl(p->device_id),
(long long)base + ntohll(c->addr_first),
(long long)base + ntohll(c->addr_last));
for (i = 0; i < depth; i++) {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , " ");
}
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "%.19s\n", p->name);
return SDBUTILS_SUCCESS;
/* A product, but not a component (no address range) */
case sdb_type_integration:
if (!opt_long) {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "%.19s\n", p->name);
return SDBUTILS_SUCCESS;
}
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "%016llx:%08x ",
(long long)ntohll(p->vendor_id), ntohl(p->device_id));
/* like above, show directory level */
for (i = 0; i < depth; i++) {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , " ");
}
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "%.19s\n", p->name);
return SDBUTILS_SUCCESS;
/* Just a string */
case sdb_type_repo_url:
if (opt_long) {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "repo-url: %.63s\n",
((struct sdb_repo_url *)d)->repo_url);
}
return SDBUTILS_SUCCESS;
/* Some metadata */
case sdb_type_synthesis:
if (!opt_long) {
return SDBUTILS_SUCCESS;
}
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "synthesis-name: %.16s\n", s->syn_name);
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , " commit-id: ");
for (i = 0; i < (int) sizeof(s->commit_id); i++) {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "%02x", s->commit_id[i]);
}
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "\n");
/* Some of the following fields are sometimes empty */
if (s->tool_name[0] && s->tool_name[0] != ' ') {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , " tool-name: %.8s\n", s->tool_name);
}
if (s->tool_version) {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , " tool-version: 0x%08x\n",
ntohl(s->tool_version));
}
if (s->date) {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , " build-date: %08x\n", ntohl(s->date));
}
if (s->user_name[0] && s->tool_name[0] != ' ') {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , " build-user: %.15s\n", s->user_name);
}
return SDBUTILS_SUCCESS;
case sdb_type_empty:
return SDBUTILS_SUCCESS;
default:
break;
}
/* Unknown record type */
if (p->record_type & 0x80) {
err = SDBUTILS_SUCCESS;
} else {
err = SDBUTILS_ERR_UNK_REC;
}
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_WARN, "Unknown record type 0x%02x\n",
p->record_type);
if (!opt_long) {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "Unknown-record\n");
return err;
}
/* long listing of unknown record */
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "Unknown-record:\n");
data = (void *)d;
for (i = 0; i < (int) sizeof(struct sdb_empty); i++) {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "%s%02x%c",
(i & 0xf) == 0 ? " " : "",
data[i],
(i & 0xf) == 0xf ? '\n' : ' ');
}
return err;
}
sdbutils_err_e sdbutils_do_list (struct sdbfs *fs, int opt_long)
{
sdbutils_err_e err = SDBUTILS_SUCCESS;
struct sdb_device *d;
int new = 1;
while ( (d = sdbfs_scan(fs, new)) != NULL) {
err = sdbutils_list_device (d, fs->depth, fs->base[fs->depth], opt_long);
ASSERT_TEST(err == SDBUTILS_SUCCESS, "Could not list device",
err_list_device, SDBUTILS_ERR_ALLOC);
new = 0;
}
err_list_device:
return err;
}
sdbutils_err_e sdbutils_do_cat_name (struct sdbfs *fs, char *name)
{
sdbutils_err_e err = SDBUTILS_SUCCESS;
char buf[4096];
int i;
i = sdbfs_open_name (fs, name);
if (i < 0) {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_WARN, "%s: %s\n",
name, strerror(-i));
err = SDBUTILS_ERR_OPEN;
goto err_open_name;
}
while ( (i = sdbfs_fread (fs, -1, buf, sizeof(buf))) > 0) {
/* Convert bytes to C-string */
const int namesize = i;
char name[namesize + 1];
memcpy (name, buf, i);
name [namesize] = '\0';
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "%s\n", name);
}
sdbfs_close(fs);
err_open_name:
return err;
}
sdbutils_err_e sdbutils_do_cat_id (struct sdbfs *fs, uint64_t vendor, uint32_t dev)
{
sdbutils_err_e err = SDBUTILS_SUCCESS;
char buf[4096];
int i;
i = sdbfs_open_id (fs, htonll(vendor), htonl(dev));
if (i < 0) {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_WARN, "%016"PRIx64"-%08x: %s\n",
vendor, dev, strerror (-i));
err = SDBUTILS_ERR_OPEN;
goto err_open_id;
}
while ( (i = sdbfs_fread (fs, -1, buf, sizeof(buf))) > 0) {
/* Convert bytes to C-string */
const int namesize = i;
char name [namesize + 1];
memcpy (name, buf, i);
name [namesize] = '\0';
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO | DBG_LVL_SIMPLE , "%s\n", name);
}
sdbfs_close (fs);
err_open_id:
return err;
}
struct sdb_device *sdbutils_next_device (struct sdbfs *fs)
{
struct sdb_device *d;
struct sdb_product *p;
struct sdb_component *c;
/* Search for the next device and return it */
while ((d = sdbfs_scan (fs, 0)) != NULL) {
c = &d->sdb_component;
p = &c->product;
if (p->record_type == sdb_type_device) {
int base = fs->base[fs->depth];
/* hack: show directory level looking at the internals */
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO, "[sdbutils] Device \"%.19s\" found:\n"
"\t%016llx:%08x @ %08llx-%08llx ",
p->name,
(long long)ntohll(p->vendor_id), ntohl(p->device_id),
(long long)base + ntohll(c->addr_first),
(long long)base + ntohll(c->addr_last));
return d;
}
}
return NULL;
}
src/libs/libsdbutils/src/sdbutils_err.c 0 → 100644
View file @ 3211f2aa
/*
* Copyright (C) 2016 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU GPL, version 3 or any later version.
*/
/* Error definitions and output stringification based on the work available
* at the libsllp project repository: https://github.com/brunoseivam/libsllp */
#include "sdbutils.h"
static const char *sdbutils_err [SDBUTILS_ERR_END] =
{
[SDBUTILS_SUCCESS] = "Success",
[SDBUTILS_ERR_ALLOC] = "Could not allocate memory",
[SDBUTILS_ERR_OPEN] = "Could not open SDBFS",
[SDBUTILS_ERR_UNK_REC] = "Unknown record type"
};
/* Convert enumeration type to string */
const char * sdbutils_err_str (sdbutils_err_e err)
{
return sdbutils_err [err];
}
src/libs/libsdbutils/version.sh 0 → 100755
View file @ 3211f2aa
#!/usr/bin/env sh
#
# This script extracts the version from the project header file
#
# This script is based on CZMQ version.sh script located at:
# https://github.com/zeromq/czmq/blob/master/version.sh
project=$1
appendix="_classes"
if [ ! -f include/$project$appendix.h ]; then
echo "version.sh: error: could not open file include/$project$appendix.h" 1>&2
exit 1
fi
MAJOR=`egrep '^#define .*_VERSION_MAJOR +[0-9]+$' include/$project$appendix.h`
MINOR=`egrep '^#define .*_VERSION_MINOR +[0-9]+$' include/$project$appendix.h`
PATCH=`egrep '^#define .*_VERSION_PATCH +[0-9]+$' include/$project$appendix.h`
if [ -z "$MAJOR" -o -z "$MINOR" -o -z "$PATCH" ]; then
echo "version.sh: error: could not extract version from include/$project$appendix.h" 1>&2
exit 1
fi
MAJOR=`echo $MAJOR | awk '{ print $3 }'`
MINOR=`echo $MINOR | awk '{ print $3 }'`
PATCH=`echo $PATCH | awk '{ print $3 }'`
echo $MAJOR.$MINOR.$PATCH | tr -d '\n'
src/sm_io/modules/acq/sm_io_acq_exp.c
View file @ 3211f2aa
......@@ -673,7 +673,7 @@ err_inv_skip_trig:
#define ACQ_HW_DATA_TRIG_POL_MIN 0 /* positive slope: 0 -> 1 */
#define ACQ_HW_DATA_TRIG_POL_MAX 1 /* negative slope: 1 -> 0 */
RW_PARAM_FUNC(acq, hw_data_trig_pol) {
SET_GET_PARAM(acq, WB_ACQ_CORE_CTRL_REGS_OFFS, ACQ_CORE, TRIG_CFG,
SET_GET_PARAM(acq, 0x0, ACQ_CORE, TRIG_CFG,
HW_TRIG_POL, SINGLE_BIT_PARAM, ACQ_HW_DATA_TRIG_POL_MIN,
ACQ_HW_DATA_TRIG_POL_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -681,7 +681,7 @@ RW_PARAM_FUNC(acq, hw_data_trig_pol) {
#define ACQ_HW_DATA_TRIG_SEL_MIN 0
#define ACQ_HW_DATA_TRIG_SEL_MAX 3
RW_PARAM_FUNC(acq, hw_data_trig_sel) {
SET_GET_PARAM(acq, WB_ACQ_CORE_CTRL_REGS_OFFS, ACQ_CORE, TRIG_CFG,
SET_GET_PARAM(acq, 0x0, ACQ_CORE, TRIG_CFG,
INT_TRIG_SEL, MULT_BIT_PARAM, ACQ_HW_DATA_TRIG_SEL_MIN,
ACQ_HW_DATA_TRIG_SEL_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -689,7 +689,7 @@ RW_PARAM_FUNC(acq, hw_data_trig_sel) {
#define ACQ_HW_DATA_TRIG_FILT_MIN 0
#define ACQ_HW_DATA_TRIG_FILT_MAX ((1 << 8)-1)
RW_PARAM_FUNC(acq, hw_data_trig_filt) {
SET_GET_PARAM(acq, WB_ACQ_CORE_CTRL_REGS_OFFS, ACQ_CORE, TRIG_DATA_CFG,
SET_GET_PARAM(acq, 0x0, ACQ_CORE, TRIG_DATA_CFG,
THRES_FILT, MULT_BIT_PARAM, ACQ_HW_DATA_TRIG_FILT_MIN,
ACQ_HW_DATA_TRIG_FILT_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -698,7 +698,7 @@ RW_PARAM_FUNC(acq, hw_data_trig_filt) {
#define ACQ_CORE_TRIG_DATA_THRES_W(val) (val)
#define ACQ_CORE_TRIG_DATA_THRES_MASK ((1ULL<<32)-1)
RW_PARAM_FUNC(acq, hw_data_trig_thres) {
SET_GET_PARAM(acq, WB_ACQ_CORE_CTRL_REGS_OFFS, ACQ_CORE, TRIG_DATA_THRES,
SET_GET_PARAM(acq, 0x0, ACQ_CORE, TRIG_DATA_THRES,
/* No field */, MULT_BIT_PARAM, /* No minimum check*/,
/* No maximum check */, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -708,7 +708,7 @@ RW_PARAM_FUNC(acq, hw_data_trig_thres) {
#define ACQ_CORE_TRIG_DLY_W(val) (val)
#define ACQ_CORE_TRIG_DLY_MASK ((1ULL<<32)-1)
RW_PARAM_FUNC(acq, hw_trig_dly) {
SET_GET_PARAM(acq, WB_ACQ_CORE_CTRL_REGS_OFFS, ACQ_CORE, TRIG_DLY,
SET_GET_PARAM(acq, 0x0, ACQ_CORE, TRIG_DLY,
/* No field*/, MULT_BIT_PARAM, /* No minimum check */,
/* No maximum check */, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -719,7 +719,7 @@ RW_PARAM_FUNC(acq, hw_trig_dly) {
#define ACQ_SW_TRIG_MIN 0
#define ACQ_SW_TRIG_MAX 1
RW_PARAM_FUNC(acq, sw_trig) {
SET_GET_PARAM(acq, WB_ACQ_CORE_CTRL_REGS_OFFS, ACQ_CORE, SW_TRIG,
SET_GET_PARAM(acq, 0x0, ACQ_CORE, SW_TRIG,
/* No field*/, MULT_BIT_PARAM, ACQ_SW_TRIG_MIN,
ACQ_SW_TRIG_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -727,7 +727,7 @@ RW_PARAM_FUNC(acq, sw_trig) {
#define ACQ_FSM_STOP_MIN 0
#define ACQ_FSM_STOP_MAX 1
RW_PARAM_FUNC(acq, fsm_stop) {
SET_GET_PARAM(acq, WB_ACQ_CORE_CTRL_REGS_OFFS, ACQ_CORE, CTL,
SET_GET_PARAM(acq, 0x0, ACQ_CORE, CTL,
FSM_STOP_ACQ, SINGLE_BIT_PARAM, ACQ_FSM_STOP_MIN,
ACQ_FSM_STOP_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -735,7 +735,7 @@ RW_PARAM_FUNC(acq, fsm_stop) {
#define ACQ_DATA_DRIVEN_CHAN_MIN 0
#define ACQ_DATA_DRIVEN_CHAN_MAX (SMIO_ACQ_NUM_CHANNELS-1)
RW_PARAM_FUNC(acq, hw_data_trig_chan) {
SET_GET_PARAM(acq, WB_ACQ_CORE_CTRL_REGS_OFFS, ACQ_CORE, ACQ_CHAN_CTL,
SET_GET_PARAM(acq, 0x0, ACQ_CORE, ACQ_CHAN_CTL,
DTRIG_WHICH, MULT_BIT_PARAM, ACQ_DATA_DRIVEN_CHAN_MIN,
ACQ_DATA_DRIVEN_CHAN_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......
src/sm_io/modules/afc_diag/sm_io_afc_diag_exp.c
View file @ 3211f2aa
......@@ -42,13 +42,13 @@
/************************************************************/
RW_PARAM_FUNC(afc_diag, card_slot) {
SET_GET_PARAM(afc_diag, WB_AFC_DIAG_CTRL_RAW_REGS_OFFS, BPM_AFC_DIAG, GEO_ID,
SET_GET_PARAM(afc_diag, 0x0, BPM_AFC_DIAG, GEO_ID,
CARD_SLOT, MULT_BIT_PARAM, /* No minimum limit */,
/* No maximum limit */, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(afc_diag, ipmi_addr) {
SET_GET_PARAM(afc_diag, WB_AFC_DIAG_CTRL_RAW_REGS_OFFS, BPM_AFC_DIAG, GEO_ID,
SET_GET_PARAM(afc_diag, 0x0, BPM_AFC_DIAG, GEO_ID,
IPMI_ADDR, MULT_BIT_PARAM, /* No minimum limit */,
/* No maximum limit */, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......
src/sm_io/modules/dsp/sm_io_dsp_exp.c
View file @ 3211f2aa
......@@ -44,42 +44,42 @@
#define KX_PARAM_MIN 1
#define KX_PARAM_MAX ((1<<25)-1)
RW_PARAM_FUNC(dsp, kx) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, KX, VAL, MULT_BIT_PARAM,
SET_GET_PARAM(dsp, 0x0, POS_CALC, KX, VAL, MULT_BIT_PARAM,
KX_PARAM_MIN, KX_PARAM_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
#define KY_PARAM_MIN 1
#define KY_PARAM_MAX ((1<<25)-1)
RW_PARAM_FUNC(dsp, ky) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, KY, VAL, MULT_BIT_PARAM,
SET_GET_PARAM(dsp, 0x0, POS_CALC, KY, VAL, MULT_BIT_PARAM,
KY_PARAM_MIN, KY_PARAM_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
#define KSUM_PARAM_MIN 1
#define KSUM_PARAM_MAX ((1<<25)-1)
RW_PARAM_FUNC(dsp, ksum) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, KSUM, VAL, MULT_BIT_PARAM,
SET_GET_PARAM(dsp, 0x0, POS_CALC, KSUM, VAL, MULT_BIT_PARAM,
KSUM_PARAM_MIN, KSUM_PARAM_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
#define DS_TBT_THRES_MIN 0
#define DS_TBT_THRES_MAX ((1<<26)-1)
RW_PARAM_FUNC(dsp, ds_tbt_thres) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, DS_TBT_THRES, VAL, MULT_BIT_PARAM,
SET_GET_PARAM(dsp, 0x0, POS_CALC, DS_TBT_THRES, VAL, MULT_BIT_PARAM,
DS_TBT_THRES_MIN, DS_TBT_THRES_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
#define DS_FOFB_THRES_MIN 0
#define DS_FOFB_THRES_MAX ((1<<26)-1)
RW_PARAM_FUNC(dsp, ds_fofb_thres) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, DS_FOFB_THRES, VAL, MULT_BIT_PARAM,
SET_GET_PARAM(dsp, 0x0, POS_CALC, DS_FOFB_THRES, VAL, MULT_BIT_PARAM,
DS_FOFB_THRES_MIN, DS_FOFB_THRES_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
#define DS_MONIT_THRES_MIN 0
#define DS_MONIT_THRES_MAX ((1<<26)-1)
RW_PARAM_FUNC(dsp, ds_monit_thres) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, DS_MONIT_THRES, VAL, MULT_BIT_PARAM,
SET_GET_PARAM(dsp, 0x0, POS_CALC, DS_MONIT_THRES, VAL, MULT_BIT_PARAM,
DS_MONIT_THRES_MIN, DS_MONIT_THRES_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -88,7 +88,7 @@ RW_PARAM_FUNC(dsp, ds_monit_thres) {
#define POS_CALC_DSP_MONIT_AMP_CH0_MASK ((1ULL<<32)-1)
RW_PARAM_FUNC(dsp, monit_amp_ch0) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, DSP_MONIT_AMP_CH0, /* No field */,
SET_GET_PARAM(dsp, 0x0, POS_CALC, DSP_MONIT_AMP_CH0, /* No field */,
MULT_BIT_PARAM, /* No minimum check*/, /* No maximum check */,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -98,7 +98,7 @@ RW_PARAM_FUNC(dsp, monit_amp_ch0) {
#define POS_CALC_DSP_MONIT_AMP_CH1_MASK ((1ULL<<32)-1)
RW_PARAM_FUNC(dsp, monit_amp_ch1) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, DSP_MONIT_AMP_CH1, /* No field */,
SET_GET_PARAM(dsp, 0x0, POS_CALC, DSP_MONIT_AMP_CH1, /* No field */,
MULT_BIT_PARAM, /* No minimum check*/, /* No maximum check */,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -108,7 +108,7 @@ RW_PARAM_FUNC(dsp, monit_amp_ch1) {
#define POS_CALC_DSP_MONIT_AMP_CH2_MASK ((1ULL<<32)-1)
RW_PARAM_FUNC(dsp, monit_amp_ch2) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, DSP_MONIT_AMP_CH2, /* No field */,
SET_GET_PARAM(dsp, 0x0, POS_CALC, DSP_MONIT_AMP_CH2, /* No field */,
MULT_BIT_PARAM, /* No minimum check*/, /* No maximum check */,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -118,7 +118,7 @@ RW_PARAM_FUNC(dsp, monit_amp_ch2) {
#define POS_CALC_DSP_MONIT_AMP_CH3_MASK ((1ULL<<32)-1)
RW_PARAM_FUNC(dsp, monit_amp_ch3) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, DSP_MONIT_AMP_CH3, /* No field */,
SET_GET_PARAM(dsp, 0x0, POS_CALC, DSP_MONIT_AMP_CH3, /* No field */,
MULT_BIT_PARAM, /* No minimum check*/, /* No maximum check */,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -128,7 +128,7 @@ RW_PARAM_FUNC(dsp, monit_amp_ch3) {
#define POS_CALC_DSP_MONIT_POS_X_MASK ((1ULL<<32)-1)
RW_PARAM_FUNC(dsp, monit_pos_x) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, DSP_MONIT_POS_X, /* No field */,
SET_GET_PARAM(dsp, 0x0, POS_CALC, DSP_MONIT_POS_X, /* No field */,
MULT_BIT_PARAM, /* No minimum check*/, /* No maximum check */,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -138,7 +138,7 @@ RW_PARAM_FUNC(dsp, monit_pos_x) {
#define POS_CALC_DSP_MONIT_POS_Y_MASK ((1ULL<<32)-1)
RW_PARAM_FUNC(dsp, monit_pos_y) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, DSP_MONIT_POS_Y, /* No field */,
SET_GET_PARAM(dsp, 0x0, POS_CALC, DSP_MONIT_POS_Y, /* No field */,
MULT_BIT_PARAM, /* No minimum check*/, /* No maximum check */,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -148,7 +148,7 @@ RW_PARAM_FUNC(dsp, monit_pos_y) {
#define POS_CALC_DSP_MONIT_POS_Q_MASK ((1ULL<<32)-1)
RW_PARAM_FUNC(dsp, monit_pos_q) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, DSP_MONIT_POS_Q, /* No field */,
SET_GET_PARAM(dsp, 0x0, POS_CALC, DSP_MONIT_POS_Q, /* No field */,
MULT_BIT_PARAM, /* No minimum check*/, /* No maximum check */,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -158,7 +158,7 @@ RW_PARAM_FUNC(dsp, monit_pos_q) {
#define POS_CALC_DSP_MONIT_POS_SUM_MASK ((1ULL<<32)-1)
RW_PARAM_FUNC(dsp, monit_pos_sum) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, DSP_MONIT_POS_SUM, /* No field */,
SET_GET_PARAM(dsp, 0x0, POS_CALC, DSP_MONIT_POS_SUM, /* No field */,
MULT_BIT_PARAM, /* No minimum check*/, /* No maximum check */,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -168,7 +168,7 @@ RW_PARAM_FUNC(dsp, monit_pos_sum) {
#define POS_CALC_DSP_MONIT_UPDT_MASK ((1ULL<<32)-1)
RW_PARAM_FUNC(dsp, monit_updt) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, DSP_MONIT_UPDT, /* No field */,
SET_GET_PARAM(dsp, 0x0, POS_CALC, DSP_MONIT_UPDT, /* No field */,
MULT_BIT_PARAM, /* No minimum check*/, /* No maximum check */,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......
src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_core.c
View file @ 3211f2aa
......@@ -44,7 +44,6 @@ smio_fmc130m_4ch_t * smio_fmc130m_4ch_new (smio_t *parent)
smio_fmc130m_4ch_t *self = (smio_fmc130m_4ch_t *) zmalloc (sizeof *self);
ASSERT_ALLOC(self, err_self_alloc);
uint32_t inst_id = smio_get_inst_id (parent);
uint64_t base = smio_get_base (parent);
/* Check if Instance ID is within our expected limits */
ASSERT_TEST(inst_id < NUM_FMC130M_4CH_SMIOS, "Number of FMC130M_4CH SMIOs instances exceeded",
......@@ -110,23 +109,6 @@ smio_fmc130m_4ch_t * smio_fmc130m_4ch_new (smio_t *parent)
/* Determine the type of the FMC130M_4CH board */
_smio_fmc130m_4ch_set_type (self, data_24aa64);
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch_core] Registering FMC_ADC_COMMON SMIO\n");
smio_register_sm (parent, 0x2403f569, base | FMC_130M_FMC_ADC_COMMON_OFFS, inst_id);
/* Now, initialize the FMC130M_4CH with the appropriate structures*/
if (self->type == TYPE_FMC130M_4CH_ACTIVE) {
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch_core] Active Board detected. "
"Registering FMC_ADC_ACTIVE SMIO\n");
smio_register_sm (parent, 0x88c67d9c, base | FMC_130M_FMC_ACTIVE_CLK_OFFS, inst_id);
}
else { /* PASSIVE or Unsupported*/
if (self->type != TYPE_FMC130M_4CH_PASSIVE) {
DBE_DEBUG (DBG_SM_IO | DBG_LVL_WARN,
"[sm_io:fmc130m_4ch_core] Unsupported FMC130M_4CH card (maybe EEPROM not configured?).\n"
"\t Defaulting to PASSIVE board\n");
}
}
return self;
err_smch_24aa64_alloc:
......
src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_exp.c
View file @ 3211f2aa
......@@ -62,7 +62,7 @@
#define BPM_FMC130M_4CH_RAND_MAX 1 /* RAND enabled */
RW_PARAM_FUNC(fmc130m_4ch, adc_rand) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
ADC, RAND, SINGLE_BIT_PARAM,
BPM_FMC130M_4CH_RAND_MIN, BPM_FMC130M_4CH_RAND_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -72,7 +72,7 @@ RW_PARAM_FUNC(fmc130m_4ch, adc_rand) {
#define BPM_FMC130M_4CH_DITH_MAX 1 /* DITH enabled */
RW_PARAM_FUNC(fmc130m_4ch, adc_dith) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
ADC, DITH, SINGLE_BIT_PARAM,
BPM_FMC130M_4CH_DITH_MIN, BPM_FMC130M_4CH_DITH_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -82,7 +82,7 @@ RW_PARAM_FUNC(fmc130m_4ch, adc_dith) {
#define BPM_FMC130M_4CH_SHDN_MAX 1 /* SHDN enabled */
RW_PARAM_FUNC(fmc130m_4ch, adc_shdn) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
ADC, SHDN, SINGLE_BIT_PARAM,
BPM_FMC130M_4CH_SHDN_MIN, BPM_FMC130M_4CH_SHDN_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -92,7 +92,7 @@ RW_PARAM_FUNC(fmc130m_4ch, adc_shdn) {
#define BPM_FMC130M_4CH_PGA_MAX 1 /* PGA enabled */
RW_PARAM_FUNC(fmc130m_4ch, adc_pga) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
ADC, PGA, SINGLE_BIT_PARAM,
BPM_FMC130M_4CH_PGA_MIN, BPM_FMC130M_4CH_PGA_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -124,7 +124,7 @@ rw_param_format_fp rw_bpm_fmc130m_4ch_data_fmt_fp = _rw_bpm_fmc130m_4ch_data_fmt
#define WB_FMC_130M_4CH_CSR_DATA0_GLOBAL_W(val) WB_FMC_130M_4CH_CSR_DATA_GLOBAL_W(val)
#define WB_FMC_130M_4CH_CSR_DATA0_GLOBAL_R(val) WB_FMC_130M_4CH_CSR_DATA_GLOBAL_R(val)
RW_PARAM_FUNC(fmc130m_4ch, adc_data0) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
DATA0, GLOBAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
rw_bpm_fmc130m_4ch_data_fmt_fp, SET_FIELD);
......@@ -134,7 +134,7 @@ RW_PARAM_FUNC(fmc130m_4ch, adc_data0) {
#define WB_FMC_130M_4CH_CSR_DATA1_GLOBAL_W(val) WB_FMC_130M_4CH_CSR_DATA_GLOBAL_W(val)
#define WB_FMC_130M_4CH_CSR_DATA1_GLOBAL_R(val) WB_FMC_130M_4CH_CSR_DATA_GLOBAL_R(val)
RW_PARAM_FUNC(fmc130m_4ch, adc_data1) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
DATA1, GLOBAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
rw_bpm_fmc130m_4ch_data_fmt_fp, SET_FIELD);
......@@ -144,7 +144,7 @@ RW_PARAM_FUNC(fmc130m_4ch, adc_data1) {
#define WB_FMC_130M_4CH_CSR_DATA2_GLOBAL_W(val) WB_FMC_130M_4CH_CSR_DATA_GLOBAL_W(val)
#define WB_FMC_130M_4CH_CSR_DATA2_GLOBAL_R(val) WB_FMC_130M_4CH_CSR_DATA_GLOBAL_R(val)
RW_PARAM_FUNC(fmc130m_4ch, adc_data2) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
DATA2, GLOBAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
rw_bpm_fmc130m_4ch_data_fmt_fp, SET_FIELD);
......@@ -154,7 +154,7 @@ RW_PARAM_FUNC(fmc130m_4ch, adc_data2) {
#define WB_FMC_130M_4CH_CSR_DATA3_GLOBAL_W(val) WB_FMC_130M_4CH_CSR_DATA_GLOBAL_W(val)
#define WB_FMC_130M_4CH_CSR_DATA3_GLOBAL_R(val) WB_FMC_130M_4CH_CSR_DATA_GLOBAL_R(val)
RW_PARAM_FUNC(fmc130m_4ch, adc_data3) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
DATA3, GLOBAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
rw_bpm_fmc130m_4ch_data_fmt_fp, SET_FIELD);
......@@ -163,28 +163,28 @@ RW_PARAM_FUNC(fmc130m_4ch, adc_data3) {
/******************************** ADC Delay Values ****************************/
RW_PARAM_FUNC(fmc130m_4ch, adc_dly_val0) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
IDELAY0_CAL, VAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc130m_4ch, adc_dly_val1) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
IDELAY1_CAL, VAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc130m_4ch, adc_dly_val2) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
IDELAY2_CAL, VAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc130m_4ch, adc_dly_val3) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
IDELAY3_CAL, VAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -193,28 +193,28 @@ RW_PARAM_FUNC(fmc130m_4ch, adc_dly_val3) {
/******************************** ADC Delay Lines *****************************/
RW_PARAM_FUNC(fmc130m_4ch, adc_dly_line0) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
IDELAY0_CAL, LINE, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc130m_4ch, adc_dly_line1) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
IDELAY1_CAL, LINE, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc130m_4ch, adc_dly_line2) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
IDELAY2_CAL, LINE, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc130m_4ch, adc_dly_line3) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
IDELAY3_CAL, LINE, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -223,28 +223,28 @@ RW_PARAM_FUNC(fmc130m_4ch, adc_dly_line3) {
/******************************** ADC Delay Update ****************************/
RW_PARAM_FUNC(fmc130m_4ch, adc_dly_updt0) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
IDELAY0_CAL, UPDATE, SINGLE_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc130m_4ch, adc_dly_updt1) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
IDELAY1_CAL, UPDATE, SINGLE_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc130m_4ch, adc_dly_updt2) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
IDELAY2_CAL, UPDATE, SINGLE_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc130m_4ch, adc_dly_updt3) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
SET_GET_PARAM(fmc130m_4ch, 0x0, WB_FMC_130M_4CH_CSR,
IDELAY3_CAL, UPDATE, SINGLE_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -333,7 +333,7 @@ err_adc_dly:
\
/* Delay value will be masked inside _fmc130m_4ch_set_adc_dly_ll */ \
\
return _fmc130m_4ch_set_adc_dly_ll (self, FMC_130M_CTRL_REGS_OFFS | \
return _fmc130m_4ch_set_adc_dly_ll (self, 0x0 | \
WB_FMC_130M_4CH_CSR_REG_IDELAY ## channel ## _CAL, dly_val, \
dly_type); \
\
......
src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_core.c
View file @ 3211f2aa
......@@ -44,7 +44,6 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
smio_fmc250m_4ch_t *self = (smio_fmc250m_4ch_t *) zmalloc (sizeof *self);
ASSERT_ALLOC(self, err_self_alloc);
uint32_t inst_id = smio_get_inst_id (parent);
uint64_t base = smio_get_base (parent);
/* Check if Instance ID is within our expected limits */
ASSERT_TEST(inst_id < NUM_FMC250M_4CH_SMIOS, "Number of FMC250M_4CH SMIOs instances exceeded",
......@@ -120,28 +119,11 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
#endif
_smio_fmc250m_4ch_set_type (self, 0x0);
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc250m_4ch_core] Registering FMC_ADC_COMMON SMIO\n");
smio_register_sm (parent, 0x2403f569, base | FMC_250M_FMC_ADC_COMMON_OFFS, inst_id);
/* Now, initialize the FMC250M_4CH with the appropriate structures*/
if (self->type == TYPE_FMC250M_4CH_ACTIVE) {
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc250m_4ch_core] Active Board detected. "
"Registering FMC_ADC_ACTIVE SMIO\n");
smio_register_sm (parent, 0x88c67d9c, base | FMC_250M_FMC_ACTIVE_CLK_OFFS, inst_id);
}
else { /* PASSIVE or Unsupported*/
if (self->type != TYPE_FMC250M_4CH_PASSIVE) {
DBE_DEBUG (DBG_SM_IO | DBG_LVL_WARN,
"[sm_io:fmc250m_4ch_core] Unsupported FMC250M_4CH card (maybe EEPROM not configured?).\n"
"\t Defaulting to PASSIVE board\n");
}
}
/* FIXME: We need to be sure that, if the board is ACTIVE, the FMC_ACTIVE_CLK
* component has been sucseddfully initialized so that the ADCs has clock.
* Otherwise, we won't be able to RESET the ADCs, leading to undefined
* behavior */
sleep (1);
sleep (5);
/* Setup ISLA216P ADC SPI communication */
uint32_t i;
......
src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_defaults.c
View file @ 3211f2aa
......@@ -54,7 +54,7 @@ smio_err_e fmc250m_4ch_config_defaults (char *broker_endp, char *service,
/* For some reason, the default timeout is not enough for FMC250M SMIO. See github issue
* #119 */
bpm_client_t *config_client = bpm_client_new_log_mode_time (broker_endp, 0,
log_file_name, SMIO_FMC250M_4CH_LIBBPMCLIENT_LOG_MODE, 3000);
log_file_name, SMIO_FMC250M_4CH_LIBBPMCLIENT_LOG_MODE, 10000);
ASSERT_ALLOC(config_client, err_alloc_client);
client_err = bpm_set_rst_adcs (config_client, service, FMC250M_4CH_DFLT_RST_ADCS);
......
src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_exp.c
View file @ 3211f2aa
......@@ -83,28 +83,28 @@ static int _rw_bpm_fmc250m_4ch_data_fmt (uint32_t *data)
rw_param_format_fp rw_bpm_fmc250m_4ch_data_fmt_fp = _rw_bpm_fmc250m_4ch_data_fmt;
RW_PARAM_FUNC(fmc250m_4ch, adc_data0) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
CH0_STA, VAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
rw_bpm_fmc250m_4ch_data_fmt_fp, SET_FIELD);
}
RW_PARAM_FUNC(fmc250m_4ch, adc_data1) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
CH1_STA, VAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
rw_bpm_fmc250m_4ch_data_fmt_fp, SET_FIELD);
}
RW_PARAM_FUNC(fmc250m_4ch, adc_data2) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
CH2_STA, VAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
rw_bpm_fmc250m_4ch_data_fmt_fp, SET_FIELD);
}
RW_PARAM_FUNC(fmc250m_4ch, adc_data3) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
CH3_STA, VAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
rw_bpm_fmc250m_4ch_data_fmt_fp, SET_FIELD);
......@@ -114,28 +114,28 @@ RW_PARAM_FUNC(fmc250m_4ch, adc_data3) {
/******************************** ADC Delay Values ****************************/
RW_PARAM_FUNC(fmc250m_4ch, adc_dly_val0) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
IDELAY0_CAL, VAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc250m_4ch, adc_dly_val1) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
IDELAY1_CAL, VAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc250m_4ch, adc_dly_val2) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
IDELAY2_CAL, VAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc250m_4ch, adc_dly_val3) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
IDELAY3_CAL, VAL, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -144,28 +144,28 @@ RW_PARAM_FUNC(fmc250m_4ch, adc_dly_val3) {
/******************************** ADC Delay Lines *****************************/
RW_PARAM_FUNC(fmc250m_4ch, adc_dly_line0) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
IDELAY0_CAL, LINE, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc250m_4ch, adc_dly_line1) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
IDELAY1_CAL, LINE, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc250m_4ch, adc_dly_line2) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
IDELAY2_CAL, LINE, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc250m_4ch, adc_dly_line3) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
IDELAY3_CAL, LINE, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -174,28 +174,28 @@ RW_PARAM_FUNC(fmc250m_4ch, adc_dly_line3) {
/******************************** ADC Delay Update ****************************/
RW_PARAM_FUNC(fmc250m_4ch, adc_dly_updt0) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
IDELAY0_CAL, UPDATE, SINGLE_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc250m_4ch, adc_dly_updt1) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
IDELAY1_CAL, UPDATE, SINGLE_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc250m_4ch, adc_dly_updt2) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
IDELAY2_CAL, UPDATE, SINGLE_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(fmc250m_4ch, adc_dly_updt3) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
IDELAY3_CAL, UPDATE, SINGLE_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -284,7 +284,7 @@ err_adc_dly:
\
/* Delay value will be masked inside _fmc250m_4ch_set_adc_dly_ll */ \
\
return _fmc250m_4ch_set_adc_dly_ll (self, FMC_250M_CTRL_REGS_OFFS | \
return _fmc250m_4ch_set_adc_dly_ll (self, 0x0 | \
WB_FMC_250M_4CH_CSR_REG_IDELAY ## channel ## _CAL, dly_val, \
dly_type); \
\
......@@ -319,7 +319,7 @@ FMC250M_4CH_ADC_DLY_FUNC_HEADER(3)
#define BPM_FMC250M_4CH_RST_ADCS_MAX 1 /* Pulse RST_ADCS pin */
RW_PARAM_FUNC(fmc250m_4ch, rst_adcs) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
ADC_CTL, RST_ADCS, SINGLE_BIT_PARAM,
BPM_FMC250M_4CH_RST_ADCS_MIN, BPM_FMC250M_4CH_RST_ADCS_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -329,7 +329,7 @@ RW_PARAM_FUNC(fmc250m_4ch, rst_adcs) {
#define BPM_FMC250M_4CH_RST_DIV_ADCS_MAX 1 /* Pulse RST_DIV_ADCS pin */
RW_PARAM_FUNC(fmc250m_4ch, rst_div_adcs) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
ADC_CTL, RST_DIV_ADCS, SINGLE_BIT_PARAM,
BPM_FMC250M_4CH_RST_DIV_ADCS_MIN, BPM_FMC250M_4CH_RST_DIV_ADCS_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -339,7 +339,7 @@ RW_PARAM_FUNC(fmc250m_4ch, rst_div_adcs) {
#define BPM_FMC250M_4CH_SLEEP_ADCS_MAX 1 /* Pulse SLEEP_ADCS pin */
RW_PARAM_FUNC(fmc250m_4ch, sleep_adcs) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
SET_GET_PARAM(fmc250m_4ch, 0x0, WB_FMC_250M_4CH_CSR,
ADC_CTL, SLEEP_ADCS, SINGLE_BIT_PARAM,
BPM_FMC250M_4CH_SLEEP_ADCS_MIN, BPM_FMC250M_4CH_SLEEP_ADCS_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......
src/sm_io/modules/fmc_active_clk/sm_io_fmc_active_clk_exp.c
View file @ 3211f2aa
......@@ -48,7 +48,7 @@ static smch_err_e smch_ad9510_cfg_defaults_compat (smch_ad9510_t *self,
#define BPM_FMC_ACTIVE_CLK_SI571_OE_MAX 1 /* SI571 Output enable */
RW_PARAM_FUNC(fmc_active_clk, si571_oe) {
SET_GET_PARAM(fmc_active_clk, FMC_ACTIVE_CLK_CTRL_REGS_OFFS, WB_FMC_ACTIVE_CLK_CSR,
SET_GET_PARAM(fmc_active_clk, 0x0, WB_FMC_ACTIVE_CLK_CSR,
CLK_DISTRIB, SI571_OE, SINGLE_BIT_PARAM,
BPM_FMC_ACTIVE_CLK_SI571_OE_MIN, BPM_FMC_ACTIVE_CLK_SI571_OE_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -58,7 +58,7 @@ RW_PARAM_FUNC(fmc_active_clk, si571_oe) {
#define BPM_FMC_ACTIVE_CLK_PLL_FUNC_MAX 1 /* PLL FUNCTION pin 1 */
RW_PARAM_FUNC(fmc_active_clk, pll_func) {
SET_GET_PARAM(fmc_active_clk, FMC_ACTIVE_CLK_CTRL_REGS_OFFS, WB_FMC_ACTIVE_CLK_CSR,
SET_GET_PARAM(fmc_active_clk, 0x0, WB_FMC_ACTIVE_CLK_CSR,
CLK_DISTRIB, PLL_FUNCTION, SINGLE_BIT_PARAM,
BPM_FMC_ACTIVE_CLK_PLL_FUNC_MIN, BPM_FMC_ACTIVE_CLK_PLL_FUNC_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -69,7 +69,7 @@ RW_PARAM_FUNC(fmc_active_clk, pll_func) {
#define BPM_FMC_ACTIVE_CLK_PLL_STATUS_MAX 1 /* PLL STATUS pin 1 */
RW_PARAM_FUNC(fmc_active_clk, pll_status) {
SET_GET_PARAM(fmc_active_clk, FMC_ACTIVE_CLK_CTRL_REGS_OFFS, WB_FMC_ACTIVE_CLK_CSR,
SET_GET_PARAM(fmc_active_clk, 0x0, WB_FMC_ACTIVE_CLK_CSR,
CLK_DISTRIB, PLL_STATUS, SINGLE_BIT_PARAM,
BPM_FMC_ACTIVE_CLK_PLL_STATUS_MIN, BPM_FMC_ACTIVE_CLK_PLL_STATUS_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -79,7 +79,7 @@ RW_PARAM_FUNC(fmc_active_clk, pll_status) {
#define BPM_FMC_ACTIVE_CLK_CLK_SEL_MAX 1 /* PLL CLK_SEL pin 1 */
RW_PARAM_FUNC(fmc_active_clk, clk_sel) {
SET_GET_PARAM(fmc_active_clk, FMC_ACTIVE_CLK_CTRL_REGS_OFFS, WB_FMC_ACTIVE_CLK_CSR,
SET_GET_PARAM(fmc_active_clk, 0x0, WB_FMC_ACTIVE_CLK_CSR,
CLK_DISTRIB, CLK_SEL, SINGLE_BIT_PARAM,
BPM_FMC_ACTIVE_CLK_CLK_SEL_MIN, BPM_FMC_ACTIVE_CLK_CLK_SEL_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......
src/sm_io/modules/fmc_adc_common/sm_io_fmc_adc_common_exp.c
View file @ 3211f2aa
......@@ -48,7 +48,7 @@
#define WB_FMC_ADC_COMMON_CSR_MONITOR_GLOBAL_R(reg) WBGEN2_GEN_READ(reg, 1, 3)
RW_PARAM_FUNC(fmc_adc_common, leds) {
SET_GET_PARAM(fmc_adc_common, FMC_130M_FMC_ADC_COMMON_OFFS, WB_FMC_ADC_COMMON_CSR,
SET_GET_PARAM(fmc_adc_common, 0x0, WB_FMC_ADC_COMMON_CSR,
MONITOR, GLOBAL, MULT_BIT_PARAM,
BPM_FMC_ADC_COMMON_LEDS_MIN, BPM_FMC_ADC_COMMON_LEDS_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -60,7 +60,7 @@ RW_PARAM_FUNC(fmc_adc_common, leds) {
#define BPM_FMC_ADC_COMMON_TEST_DATA_EN_MAX 1 /* TEST data enable on */
RW_PARAM_FUNC(fmc_adc_common, test_data_en) {
SET_GET_PARAM(fmc_adc_common, FMC_130M_FMC_ADC_COMMON_OFFS, WB_FMC_ADC_COMMON_CSR,
SET_GET_PARAM(fmc_adc_common, 0x0, WB_FMC_ADC_COMMON_CSR,
MONITOR, TEST_DATA_EN, SINGLE_BIT_PARAM,
BPM_FMC_ADC_COMMON_TEST_DATA_EN_MIN, BPM_FMC_ADC_COMMON_TEST_DATA_EN_MAX,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
......@@ -70,7 +70,7 @@ RW_PARAM_FUNC(fmc_adc_common, test_data_en) {
#define BPM_FMC_ADC_COMMON_TRIG_DIR_MAX 1 /* Trigger direction output */
RW_PARAM_FUNC(fmc_adc_common, trig_dir) {
SET_GET_PARAM(fmc_adc_common, FMC_130M_FMC_ADC_COMMON_OFFS, WB_FMC_ADC_COMMON_CSR,
SET_GET_PARAM(fmc_adc_common, 0x0, WB_FMC_ADC_COMMON_CSR,
TRIGGER, DIR, SINGLE_BIT_PARAM,
BPM_FMC_ADC_COMMON_TRIG_DIR_MIN, BPM_FMC_ADC_COMMON_TRIG_DIR_MAX,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
......@@ -80,7 +80,7 @@ RW_PARAM_FUNC(fmc_adc_common, trig_dir) {
#define BPM_FMC_ADC_COMMON_TRIG_TERM_MAX 1 /* Trigger termination enabled */
RW_PARAM_FUNC(fmc_adc_common, trig_term) {
SET_GET_PARAM(fmc_adc_common, FMC_130M_FMC_ADC_COMMON_OFFS, WB_FMC_ADC_COMMON_CSR,
SET_GET_PARAM(fmc_adc_common, 0x0, WB_FMC_ADC_COMMON_CSR,
TRIGGER, TERM, SINGLE_BIT_PARAM,
BPM_FMC_ADC_COMMON_TRIG_TERM_MIN, BPM_FMC_ADC_COMMON_TRIG_TERM_MAX,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
......@@ -90,7 +90,7 @@ RW_PARAM_FUNC(fmc_adc_common, trig_term) {
#define BPM_FMC_ADC_COMMON_TRIG_VAL_MAX 1 /* Trigger value 1 */
RW_PARAM_FUNC(fmc_adc_common, trig_val) {
SET_GET_PARAM(fmc_adc_common, FMC_130M_FMC_ADC_COMMON_OFFS, WB_FMC_ADC_COMMON_CSR,
SET_GET_PARAM(fmc_adc_common, 0x0, WB_FMC_ADC_COMMON_CSR,
TRIGGER, TRIG_VAL, SINGLE_BIT_PARAM,
BPM_FMC_ADC_COMMON_TRIG_VAL_MIN, BPM_FMC_ADC_COMMON_TRIG_VAL_MAX,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
......
src/sm_io/modules/swap/sm_io_swap_exp.c
View file @ 3211f2aa
......@@ -53,21 +53,21 @@
#define BPM_SWAP_CTRL_MODE_GLOBAL_W(val) (BPM_SWAP_CTRL_MODE1_W(val) | BPM_SWAP_CTRL_MODE2_W(val))
#define BPM_SWAP_CTRL_MODE_GLOBAL_R(val) (BPM_SWAP_CTRL_MODE1_R(val) | BPM_SWAP_CTRL_MODE2_R(val))
RW_PARAM_FUNC(swap, sw) {
SET_GET_PARAM(swap, DSP_BPM_SWAP_OFFS, BPM_SWAP, CTRL, MODE_GLOBAL, MULT_BIT_PARAM,
SET_GET_PARAM(swap, 0x0, BPM_SWAP, CTRL, MODE_GLOBAL, MULT_BIT_PARAM,
SW_MIN, SW_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
#define BPM_SW_EN_MIN 0 /* Switching enabled */
#define BPM_SW_EN_MAX 1 /* Switching disabled */
RW_PARAM_FUNC(swap, sw_en) {
SET_GET_PARAM(swap, DSP_BPM_SWAP_OFFS, BPM_SWAP, CTRL, CLK_SWAP_EN, SINGLE_BIT_PARAM,
SET_GET_PARAM(swap, 0x0, BPM_SWAP, CTRL, CLK_SWAP_EN, SINGLE_BIT_PARAM,
BPM_SW_EN_MIN, BPM_SW_EN_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
#define BPM_SWAP_DIV_F_MIN 1
#define BPM_SWAP_DIV_F_MAX ((1<<16)-1)
RW_PARAM_FUNC(swap, div_clk) {
SET_GET_PARAM(swap, DSP_BPM_SWAP_OFFS, BPM_SWAP, CTRL, SWAP_DIV_F, MULT_BIT_PARAM,
SET_GET_PARAM(swap, 0x0, BPM_SWAP, CTRL, SWAP_DIV_F, MULT_BIT_PARAM,
BPM_SWAP_DIV_F_MIN, BPM_SWAP_DIV_F_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -79,7 +79,7 @@ RW_PARAM_FUNC(swap, div_clk) {
#define BPM_SWAP_DLY_GLOBAL_W(val) (BPM_SWAP_DLY_1_W(val) | BPM_SWAP_DLY_2_W(val))
#define BPM_SWAP_DLY_GLOBAL_R(val) (BPM_SWAP_DLY_1_R(val) | BPM_SWAP_DLY_2_R(val))
RW_PARAM_FUNC(swap, sw_dly) {
SET_GET_PARAM(swap, DSP_BPM_SWAP_OFFS, BPM_SWAP, DLY, GLOBAL, MULT_BIT_PARAM,
SET_GET_PARAM(swap, 0x0, BPM_SWAP, DLY, GLOBAL, MULT_BIT_PARAM,
BPM_SWAP_SW_DLY_MIN, BPM_SWAP_SW_DLY_MAX, NO_CHK_FUNC, NO_FMT_FUNC,
SET_FIELD);
}
......@@ -89,14 +89,14 @@ RW_PARAM_FUNC(swap, sw_dly) {
#define BPM_SWAP_WDW_CTL_EN_GLOBAL (BPM_SWAP_WDW_CTL_USE | BPM_SWAP_WDW_CTL_SWCLK_EXT)
RW_PARAM_FUNC(swap, wdw_en) {
SET_GET_PARAM(swap, DSP_BPM_SWAP_OFFS, BPM_SWAP, WDW_CTL, EN_GLOBAL, SINGLE_BIT_PARAM,
SET_GET_PARAM(swap, 0x0, BPM_SWAP, WDW_CTL, EN_GLOBAL, SINGLE_BIT_PARAM,
BPM_SWAP_WDW_EN_MIN, BPM_SWAP_WDW_EN_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
#define BPM_SWAP_WDW_DLY_MIN 0
#define BPM_SWAP_WDW_DLY_MAX ((1<<16)-1)
RW_PARAM_FUNC(swap, wdw_dly) {
SET_GET_PARAM(swap, DSP_BPM_SWAP_OFFS, BPM_SWAP, WDW_CTL, DLY, MULT_BIT_PARAM,
SET_GET_PARAM(swap, 0x0, BPM_SWAP, WDW_CTL, DLY, MULT_BIT_PARAM,
BPM_SWAP_WDW_DLY_MIN, BPM_SWAP_WDW_DLY_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
......@@ -132,7 +132,7 @@ rw_param_check_fp rw_bpm_swap_gain_chk_fp = _rw_bpm_swap_gain_chk;
#define BPM_SWAP_A_GLOBAL_W(val) (val)
#define BPM_SWAP_A_GLOBAL_R(val) (val)
RW_PARAM_FUNC(swap, gain_a) {
SET_GET_PARAM(swap, DSP_BPM_SWAP_OFFS, BPM_SWAP, A, GLOBAL, MULT_BIT_PARAM,
SET_GET_PARAM(swap, 0x0, BPM_SWAP, A, GLOBAL, MULT_BIT_PARAM,
BPM_SWAP_GAIN_MIN, BPM_SWAP_GAIN_MAX, rw_bpm_swap_gain_chk_fp,
NO_FMT_FUNC, SET_FIELD);
}
......@@ -141,7 +141,7 @@ RW_PARAM_FUNC(swap, gain_a) {
#define BPM_SWAP_B_GLOBAL_W(val) (val)
#define BPM_SWAP_B_GLOBAL_R(val) (val)
RW_PARAM_FUNC(swap, gain_b) {
SET_GET_PARAM(swap, DSP_BPM_SWAP_OFFS, BPM_SWAP, B, GLOBAL, MULT_BIT_PARAM,
SET_GET_PARAM(swap, 0x0, BPM_SWAP, B, GLOBAL, MULT_BIT_PARAM,
BPM_SWAP_GAIN_MIN, BPM_SWAP_GAIN_MAX, rw_bpm_swap_gain_chk_fp,
NO_FMT_FUNC, SET_FIELD);
}
......@@ -150,7 +150,7 @@ RW_PARAM_FUNC(swap, gain_b) {
#define BPM_SWAP_C_GLOBAL_W(val) (val)
#define BPM_SWAP_C_GLOBAL_R(val) (val)
RW_PARAM_FUNC(swap, gain_c) {
SET_GET_PARAM(swap, DSP_BPM_SWAP_OFFS, BPM_SWAP, C, GLOBAL, MULT_BIT_PARAM,
SET_GET_PARAM(swap, 0x0, BPM_SWAP, C, GLOBAL, MULT_BIT_PARAM,
BPM_SWAP_GAIN_MIN, BPM_SWAP_GAIN_MAX, rw_bpm_swap_gain_chk_fp,
NO_FMT_FUNC, SET_FIELD);
}
......@@ -159,7 +159,7 @@ RW_PARAM_FUNC(swap, gain_c) {
#define BPM_SWAP_D_GLOBAL_W(val) (val)
#define BPM_SWAP_D_GLOBAL_R(val) (val)
RW_PARAM_FUNC(swap, gain_d) {
SET_GET_PARAM(swap, DSP_BPM_SWAP_OFFS, BPM_SWAP, D, GLOBAL, MULT_BIT_PARAM,
SET_GET_PARAM(swap, 0x0, BPM_SWAP, D, GLOBAL, MULT_BIT_PARAM,
BPM_SWAP_GAIN_MIN, BPM_SWAP_GAIN_MAX, rw_bpm_swap_gain_chk_fp,
NO_FMT_FUNC, SET_FIELD);
}
......
src/sm_io/modules/trigger_iface/sm_io_trigger_iface_exp.c
View file @ 3211f2aa
......@@ -48,7 +48,7 @@
#define BPM_TRIGGER_IFACE_DIR_MIN 0 /* Bidirection Buffer set to Output */
#define BPM_TRIGGER_IFACE_DIR_MAX 1 /* Bidirection Buffer set to Input */
RW_PARAM_FUNC(trigger_iface, dir) {
SET_GET_PARAM_CHANNEL(trigger_iface, WB_TRIGGER_IFACE_RAW_REG_OFFS, WB_TRIG_IFACE,
SET_GET_PARAM_CHANNEL(trigger_iface, 0x0, WB_TRIG_IFACE,
CH0_CTL, DIR, TRIGGER_IFACE_CHAN_OFFSET, TRIGGER_IFACE_NUM_CHAN, SINGLE_BIT_PARAM,
BPM_TRIGGER_IFACE_DIR_MIN, BPM_TRIGGER_IFACE_DIR_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -57,7 +57,7 @@ RW_PARAM_FUNC(trigger_iface, dir) {
#define BPM_TRIGGER_IFACE_DIR_POL_MIN 0 /* Direction polarity kept */
#define BPM_TRIGGER_IFACE_DIR_POL_MAX 1 /* Direction polarity reversed */
RW_PARAM_FUNC(trigger_iface, dir_pol) {
SET_GET_PARAM_CHANNEL(trigger_iface, WB_TRIGGER_IFACE_RAW_REG_OFFS, WB_TRIG_IFACE,
SET_GET_PARAM_CHANNEL(trigger_iface, 0x0, WB_TRIG_IFACE,
CH0_CTL, DIR_POL, TRIGGER_IFACE_CHAN_OFFSET, TRIGGER_IFACE_NUM_CHAN, SINGLE_BIT_PARAM,
BPM_TRIGGER_IFACE_DIR_POL_MIN, BPM_TRIGGER_IFACE_DIR_POL_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -66,7 +66,7 @@ RW_PARAM_FUNC(trigger_iface, dir_pol) {
#define BPM_TRIGGER_IFACE_RCV_COUNT_RST_MIN 0 /* Receive Counter Reset */
#define BPM_TRIGGER_IFACE_RCV_COUNT_RST_MAX 1 /* Receive Counter Reset */
RW_PARAM_FUNC(trigger_iface, rcv_count_rst) {
SET_GET_PARAM_CHANNEL(trigger_iface, WB_TRIGGER_IFACE_RAW_REG_OFFS, WB_TRIG_IFACE,
SET_GET_PARAM_CHANNEL(trigger_iface, 0x0, WB_TRIG_IFACE,
CH0_CTL, RCV_COUNT_RST, TRIGGER_IFACE_CHAN_OFFSET, TRIGGER_IFACE_NUM_CHAN, SINGLE_BIT_PARAM,
BPM_TRIGGER_IFACE_RCV_COUNT_RST_MIN, BPM_TRIGGER_IFACE_RCV_COUNT_RST_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -75,7 +75,7 @@ RW_PARAM_FUNC(trigger_iface, rcv_count_rst) {
#define BPM_TRIGGER_IFACE_TRANSM_COUNT_RST_MIN 0 /* Transmit Counter Reset */
#define BPM_TRIGGER_IFACE_TRANSM_COUNT_RST_MAX 1 /* Transmit Counter Reset */
RW_PARAM_FUNC(trigger_iface, transm_count_rst) {
SET_GET_PARAM_CHANNEL(trigger_iface, WB_TRIGGER_IFACE_RAW_REG_OFFS, WB_TRIG_IFACE,
SET_GET_PARAM_CHANNEL(trigger_iface, 0x0, WB_TRIG_IFACE,
CH0_CTL, TRANSM_COUNT_RST, TRIGGER_IFACE_CHAN_OFFSET, TRIGGER_IFACE_NUM_CHAN, SINGLE_BIT_PARAM,
BPM_TRIGGER_IFACE_TRANSM_COUNT_RST_MIN, BPM_TRIGGER_IFACE_TRANSM_COUNT_RST_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -84,7 +84,7 @@ RW_PARAM_FUNC(trigger_iface, transm_count_rst) {
#define BPM_TRIGGER_IFACE_RCV_LEN_MIN 0 /* Receiver Debounce Length */
#define BPM_TRIGGER_IFACE_RCV_LEN_MAX ((1 << 8) -1) /* Receiver Debounce Length */
RW_PARAM_FUNC(trigger_iface, rcv_len) {
SET_GET_PARAM_CHANNEL(trigger_iface, WB_TRIGGER_IFACE_RAW_REG_OFFS, WB_TRIG_IFACE,
SET_GET_PARAM_CHANNEL(trigger_iface, 0x0, WB_TRIG_IFACE,
CH0_CFG, RCV_LEN, TRIGGER_IFACE_CHAN_OFFSET, TRIGGER_IFACE_NUM_CHAN, MULT_BIT_PARAM,
BPM_TRIGGER_IFACE_RCV_LEN_MIN, BPM_TRIGGER_IFACE_RCV_LEN_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -93,21 +93,21 @@ RW_PARAM_FUNC(trigger_iface, rcv_len) {
#define BPM_TRIGGER_IFACE_TRANSM_LEN_MIN 0 /* Receiver Debounce Length */
#define BPM_TRIGGER_IFACE_TRANSM_LEN_MAX ((1 << 8) -1) /* Receiver Debounce Length */
RW_PARAM_FUNC(trigger_iface, transm_len) {
SET_GET_PARAM_CHANNEL(trigger_iface, WB_TRIGGER_IFACE_RAW_REG_OFFS, WB_TRIG_IFACE,
SET_GET_PARAM_CHANNEL(trigger_iface, 0x0, WB_TRIG_IFACE,
CH0_CFG, TRANSM_LEN, TRIGGER_IFACE_CHAN_OFFSET, TRIGGER_IFACE_NUM_CHAN, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(trigger_iface, count_rcv) {
SET_GET_PARAM_CHANNEL(trigger_iface, WB_TRIGGER_IFACE_RAW_REG_OFFS, WB_TRIG_IFACE,
SET_GET_PARAM_CHANNEL(trigger_iface, 0x0, WB_TRIG_IFACE,
CH0_COUNT, RCV, TRIGGER_IFACE_CHAN_OFFSET, TRIGGER_IFACE_NUM_CHAN, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
RW_PARAM_FUNC(trigger_iface, count_transm) {
SET_GET_PARAM_CHANNEL(trigger_iface, WB_TRIGGER_IFACE_RAW_REG_OFFS, WB_TRIG_IFACE,
SET_GET_PARAM_CHANNEL(trigger_iface, 0x0, WB_TRIG_IFACE,
CH0_COUNT, TRANSM, TRIGGER_IFACE_CHAN_OFFSET, TRIGGER_IFACE_NUM_CHAN, MULT_BIT_PARAM,
/* no minimum value */, /* no maximum value */, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......
src/sm_io/modules/trigger_mux/sm_io_trigger_mux_exp.c
View file @ 3211f2aa
......@@ -48,7 +48,7 @@
#define BPM_TRIGGER_MUX_RCV_SRC_MIN 0 /* Trigger Source Selection (= Trigger Backplane) */
#define BPM_TRIGGER_MUX_RCV_SRC_MAX 1 /* Trigger Source Selection (= FPGA internal) */
RW_PARAM_FUNC(trigger_mux, rcv_src) {
SET_GET_PARAM_CHANNEL(trigger_mux, WB_TRIGGER_MUX_RAW_REG_OFFS, WB_TRIG_MUX,
SET_GET_PARAM_CHANNEL(trigger_mux, 0x0, WB_TRIG_MUX,
CH0_CTL, RCV_SRC, TRIGGER_MUX_CHAN_OFFSET, TRIGGER_MUX_NUM_CHAN, SINGLE_BIT_PARAM,
BPM_TRIGGER_MUX_RCV_SRC_MIN, BPM_TRIGGER_MUX_RCV_SRC_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -57,7 +57,7 @@ RW_PARAM_FUNC(trigger_mux, rcv_src) {
#define BPM_TRIGGER_MUX_RCV_IN_SEL_MIN 0 /* Minimum selection */
#define BPM_TRIGGER_MUX_RCV_IN_SEL_MAX ((1 << 8) -1) /* Maximum selection */
RW_PARAM_FUNC(trigger_mux, rcv_in_sel) {
SET_GET_PARAM_CHANNEL(trigger_mux, WB_TRIGGER_MUX_RAW_REG_OFFS, WB_TRIG_MUX,
SET_GET_PARAM_CHANNEL(trigger_mux, 0x0, WB_TRIG_MUX,
CH0_CTL, RCV_IN_SEL, TRIGGER_MUX_CHAN_OFFSET, TRIGGER_MUX_NUM_CHAN, MULT_BIT_PARAM,
BPM_TRIGGER_MUX_RCV_IN_SEL_MIN, BPM_TRIGGER_MUX_RCV_IN_SEL_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -66,7 +66,7 @@ RW_PARAM_FUNC(trigger_mux, rcv_in_sel) {
#define BPM_TRIGGER_MUX_TRANSM_SRC_MIN 0 /* Trigger Source Selection (= Trigger Backplane) */
#define BPM_TRIGGER_MUX_TRANSM_SRC_MAX 1 /* Trigger Source Selection (= FPGA internal) */
RW_PARAM_FUNC(trigger_mux, transm_src) {
SET_GET_PARAM_CHANNEL(trigger_mux, WB_TRIGGER_MUX_RAW_REG_OFFS, WB_TRIG_MUX,
SET_GET_PARAM_CHANNEL(trigger_mux, 0x0, WB_TRIG_MUX,
CH0_CTL, TRANSM_SRC, TRIGGER_MUX_CHAN_OFFSET, TRIGGER_MUX_NUM_CHAN, SINGLE_BIT_PARAM,
BPM_TRIGGER_MUX_TRANSM_SRC_MIN, BPM_TRIGGER_MUX_TRANSM_SRC_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......@@ -75,7 +75,7 @@ RW_PARAM_FUNC(trigger_mux, transm_src) {
#define BPM_TRIGGER_MUX_TRANSM_OUT_SEL_MIN 0 /* Minimum selection */
#define BPM_TRIGGER_MUX_TRANSM_OUT_SEL_MAX ((1 << 8) -1) /* Maximum selection */
RW_PARAM_FUNC(trigger_mux, transm_out_sel) {
SET_GET_PARAM_CHANNEL(trigger_mux, WB_TRIGGER_MUX_RAW_REG_OFFS, WB_TRIG_MUX,
SET_GET_PARAM_CHANNEL(trigger_mux, 0x0, WB_TRIG_MUX,
CH0_CTL, TRANSM_OUT_SEL, TRIGGER_MUX_CHAN_OFFSET, TRIGGER_MUX_NUM_CHAN, MULT_BIT_PARAM,
BPM_TRIGGER_MUX_TRANSM_OUT_SEL_MIN, BPM_TRIGGER_MUX_TRANSM_OUT_SEL_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
......
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