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Beam Positoning Monitor - Software
Commit d584f7b6 authored by Lucas Russo's avatar Lucas Russo
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sm_io/chips/*: fix chips to use new protocol layer

parent 2935152c
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Showing with 109 additions and 245 deletions
include/sm_ch_24aa64.h
View file @ d584f7b6
...@@ -15,7 +15,7 @@ extern "C" { ...@@ -15,7 +15,7 @@ extern "C" {
/***************** Our methods *****************/ /***************** Our methods *****************/
/* Creates a new instance of the SMCH 24AA64 */ /* Creates a new instance of the SMCH 24AA64 */
smch_24aa64_t * smch_24aa64_new (smio_t *parent, uint64_t base, uint32_t addr, smch_24aa64_t * smch_24aa64_new (smio_t *parent, uint64_t base,
const smpr_proto_ops_t *reg_ops, int verbose); const smpr_proto_ops_t *reg_ops, int verbose);
/* Destroy an instance of the SMCH 24AA64 */ /* Destroy an instance of the SMCH 24AA64 */
smch_err_e smch_24aa64_destroy (smch_24aa64_t **self_p); smch_err_e smch_24aa64_destroy (smch_24aa64_t **self_p);
...@@ -30,9 +30,6 @@ smch_err_e smch_24aa64_write_block (smch_24aa64_t *self, uint16_t addr, const ui ...@@ -30,9 +30,6 @@ smch_err_e smch_24aa64_write_block (smch_24aa64_t *self, uint16_t addr, const ui
smch_err_e smch_24aa64_read_block (smch_24aa64_t *self, uint16_t addr, uint32_t *data, smch_err_e smch_24aa64_read_block (smch_24aa64_t *self, uint16_t addr, uint32_t *data,
size_t size); size_t size);
/* Probe bus for I2C devices */
ssize_t smch_24aa64_probe_bus (smch_24aa64_t *self);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
......
include/sm_ch_ad9510.h
View file @ d584f7b6
...@@ -15,7 +15,7 @@ extern "C" { ...@@ -15,7 +15,7 @@ extern "C" {
/***************** Our methods *****************/ /***************** Our methods *****************/
/* Creates a new instance of the SMCH AD9510 */ /* Creates a new instance of the SMCH AD9510 */
smch_ad9510_t * smch_ad9510_new (smio_t *parent, uint64_t base, uint32_t ss, smch_ad9510_t * smch_ad9510_new (smio_t *parent, uint64_t base,
const smpr_proto_ops_t *reg_ops, int verbose); const smpr_proto_ops_t *reg_ops, int verbose);
/* Destroy an instance of the SMCH AD9510 */ /* Destroy an instance of the SMCH AD9510 */
smch_err_e smch_ad9510_destroy (smch_ad9510_t **self_p); smch_err_e smch_ad9510_destroy (smch_ad9510_t **self_p);
......
include/sm_ch_isla216p.h
View file @ d584f7b6
...@@ -15,7 +15,7 @@ extern "C" { ...@@ -15,7 +15,7 @@ extern "C" {
/***************** Our methods *****************/ /***************** Our methods *****************/
/* Creates a new instance of the SMCH ISLA216P */ /* Creates a new instance of the SMCH ISLA216P */
smch_isla216p_t * smch_isla216p_new (smio_t *parent, uint64_t base, uint32_t ss, smch_isla216p_t * smch_isla216p_new (smio_t *parent, uint64_t base,
const smpr_proto_ops_t *reg_ops, int verbose); const smpr_proto_ops_t *reg_ops, int verbose);
/* Destroy an instance of the SMCH ISLA216P */ /* Destroy an instance of the SMCH ISLA216P */
smch_err_e smch_isla216p_destroy (smch_isla216p_t **self_p); smch_err_e smch_isla216p_destroy (smch_isla216p_t **self_p);
......
include/sm_ch_pca9547.h
View file @ d584f7b6
...@@ -17,7 +17,7 @@ extern "C" { ...@@ -17,7 +17,7 @@ extern "C" {
/***************** Our methods *****************/ /***************** Our methods *****************/
/* Creates a new instance of the SMCH PCA9547 */ /* Creates a new instance of the SMCH PCA9547 */
smch_pca9547_t * smch_pca9547_new (smio_t *parent, uint64_t base, uint32_t addr, smch_pca9547_t * smch_pca9547_new (smio_t *parent, uint64_t base,
const smpr_proto_ops_t *reg_ops, int verbose); const smpr_proto_ops_t *reg_ops, int verbose);
/* Destroy an instance of the SMCH PCA9547 */ /* Destroy an instance of the SMCH PCA9547 */
smch_err_e smch_pca9547_destroy (smch_pca9547_t **self_p); smch_err_e smch_pca9547_destroy (smch_pca9547_t **self_p);
......
include/sm_ch_si57x.h
View file @ d584f7b6
...@@ -15,7 +15,7 @@ extern "C" { ...@@ -15,7 +15,7 @@ extern "C" {
/***************** Our methods *****************/ /***************** Our methods *****************/
/* Creates a new instance of the SMCH SI57X */ /* Creates a new instance of the SMCH SI57X */
smch_si57x_t * smch_si57x_new (smio_t *parent, uint64_t base, uint32_t addr, smch_si57x_t * smch_si57x_new (smio_t *parent, uint64_t base,
const smpr_proto_ops_t *reg_ops, int verbose); const smpr_proto_ops_t *reg_ops, int verbose);
/* Destroy an instance of the SMCH SI57X */ /* Destroy an instance of the SMCH SI57X */
smch_err_e smch_si57x_destroy (smch_si57x_t **self_p); smch_err_e smch_si57x_destroy (smch_si57x_t **self_p);
...@@ -30,9 +30,6 @@ smch_err_e smch_si57x_read_8 (smch_si57x_t *self, uint8_t addr, ...@@ -30,9 +30,6 @@ smch_err_e smch_si57x_read_8 (smch_si57x_t *self, uint8_t addr,
smch_err_e smch_si57x_read_block (smch_si57x_t *self, uint8_t addr, smch_err_e smch_si57x_read_block (smch_si57x_t *self, uint8_t addr,
uint8_t *data, size_t size); uint8_t *data, size_t size);
/* Probe bus for I2C devices */
ssize_t smch_si57x_probe_bus (smch_si57x_t *self);
/* Get Si57X divider values */ /* Get Si57X divider values */
smch_err_e smch_si57x_get_divs (smch_si57x_t *self, uint64_t *rfreq, smch_err_e smch_si57x_get_divs (smch_si57x_t *self, uint64_t *rfreq,
unsigned int *n1, unsigned int *hs_div); unsigned int *n1, unsigned int *hs_div);
......
src/sm_io/chips/sm_ch_24aa64.c
View file @ d584f7b6
...@@ -37,14 +37,13 @@ ...@@ -37,14 +37,13 @@
smch_err_str (err_type)) smch_err_str (err_type))
#define SMCH_24AA64_WAIT_TRIES 10 #define SMCH_24AA64_WAIT_TRIES 10
#define SMCH_24AA64_NAME "I2C_24AA64" #define SMCH_24AA64_NAME "24AA64"
#define SMCH_24AA64_USECS_WAIT 10000 #define SMCH_24AA64_USECS_WAIT 10000
#define SMCH_24AA64_WAIT(usecs) usleep(usecs) #define SMCH_24AA64_WAIT(usecs) usleep(usecs)
#define SMCH_24AA64_WAIT_DFLT SMCH_24AA64_WAIT(SMCH_24AA64_USECS_WAIT) #define SMCH_24AA64_WAIT_DFLT SMCH_24AA64_WAIT(SMCH_24AA64_USECS_WAIT)
struct _smch_24aa64_t { struct _smch_24aa64_t {
smpr_t *i2c; /* I2C protocol object */ smpr_t *proto; /* PROTO protocol object */
uint32_t addr; /* I2C address for this 24AA64 chip */
}; };
static ssize_t _smch_24aa64_write_generic (smch_24aa64_t *self, uint16_t addr, static ssize_t _smch_24aa64_write_generic (smch_24aa64_t *self, uint16_t addr,
...@@ -53,7 +52,7 @@ static ssize_t _smch_24aa64_read_generic (smch_24aa64_t *self, uint16_t addr, ...@@ -53,7 +52,7 @@ static ssize_t _smch_24aa64_read_generic (smch_24aa64_t *self, uint16_t addr,
uint8_t *data, size_t size); uint8_t *data, size_t size);
/* Creates a new instance of the SMCH 24AA64 */ /* Creates a new instance of the SMCH 24AA64 */
smch_24aa64_t * smch_24aa64_new (smio_t *parent, uint64_t base, uint32_t addr, smch_24aa64_t * smch_24aa64_new (smio_t *parent, uint64_t base,
const smpr_proto_ops_t *reg_ops, int verbose) const smpr_proto_ops_t *reg_ops, int verbose)
{ {
(void) verbose; (void) verbose;
...@@ -62,21 +61,19 @@ smch_24aa64_t * smch_24aa64_new (smio_t *parent, uint64_t base, uint32_t addr, ...@@ -62,21 +61,19 @@ smch_24aa64_t * smch_24aa64_new (smio_t *parent, uint64_t base, uint32_t addr,
smch_24aa64_t *self = (smch_24aa64_t *) zmalloc (sizeof *self); smch_24aa64_t *self = (smch_24aa64_t *) zmalloc (sizeof *self);
ASSERT_ALLOC(self, err_self_alloc); ASSERT_ALLOC(self, err_self_alloc);
self->i2c = smpr_new (SMCH_24AA64_NAME, parent, reg_ops, verbose); self->proto = smpr_new (SMCH_24AA64_NAME, parent, reg_ops, verbose);
ASSERT_ALLOC(self->i2c, err_i2c_alloc); ASSERT_ALLOC(self->proto, err_proto_alloc);
/* Initalize the I2C protocol */ /* Initalize the PROTO protocol */
int smpr_err = smpr_open (self->i2c, base, NULL /* Default parameters are fine */); int smpr_err = smpr_open (self->proto, base, NULL /* Default parameters are fine */);
ASSERT_TEST(smpr_err == 0, "Could not initialize SMPR protocol", err_smpr_init); ASSERT_TEST(smpr_err == 0, "Could not initialize SMPR protocol", err_smpr_init);
self->addr = addr;
DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO, "[sm_ch:24aa64] Created instance of SMCH\n"); DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO, "[sm_ch:24aa64] Created instance of SMCH\n");
return self; return self;
err_smpr_init: err_smpr_init:
smpr_destroy (&self->i2c); smpr_destroy (&self->proto);
err_i2c_alloc: err_proto_alloc:
free (self); free (self);
err_self_alloc: err_self_alloc:
return NULL; return NULL;
...@@ -90,8 +87,8 @@ smch_err_e smch_24aa64_destroy (smch_24aa64_t **self_p) ...@@ -90,8 +87,8 @@ smch_err_e smch_24aa64_destroy (smch_24aa64_t **self_p)
if (*self_p) { if (*self_p) {
smch_24aa64_t *self = *self_p; smch_24aa64_t *self = *self_p;
smpr_release (self->i2c); smpr_release (self->proto);
smpr_destroy (&self->i2c); smpr_destroy (&self->proto);
free (self); free (self);
*self_p = NULL; *self_p = NULL;
} }
...@@ -144,10 +141,6 @@ static ssize_t _smch_24aa64_write_generic (smch_24aa64_t *self, uint16_t addr, ...@@ -144,10 +141,6 @@ static ssize_t _smch_24aa64_write_generic (smch_24aa64_t *self, uint16_t addr,
* Source: 24AA64/24LC64 DS21189F datasheet, page 8 * Source: 24AA64/24LC64 DS21189F datasheet, page 8
*/ */
uint32_t trans_size = E24AA64_ADDR_TRANS_SIZE + size*E24AA64_DATA_TRANS_SIZE;
uint32_t flags = SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W(trans_size) /* in bits */ |
SMPR_PROTO_I2C_ADDR_FLAGS_W(self->addr);
/* 24AA64 write byte transaction is: /* 24AA64 write byte transaction is:
* *
* Address high byte | Address low byte | Data0 | Data1 ... * Address high byte | Address low byte | Data0 | Data1 ...
...@@ -156,22 +149,15 @@ static ssize_t _smch_24aa64_write_generic (smch_24aa64_t *self, uint16_t addr, ...@@ -156,22 +149,15 @@ static ssize_t _smch_24aa64_write_generic (smch_24aa64_t *self, uint16_t addr,
DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:24aa64_write_generic] data = 0x%02X\n", *data); DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:24aa64_write_generic] data = 0x%02X\n", *data);
DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:24aa64_write_generic] addr = 0x%04X\n", addr); DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:24aa64_write_generic] addr = 0x%04X\n", addr);
/* FIXME? Reduce memcpy calls? We just need this because the address must ssize_t smpr_err = smpr_write_block (self->proto, E24AA64_ADDR_SIZE, E24AA64_ADDR_W(addr),
* come in the LSBs of data */ size, (uint32_t *) &data);
uint8_t __data[E24AA64_PAGE_TRANS_SIZE_MAX/SMPR_BYTE_2_BIT];
uint16_t __addr = E24AA64_ADDR_W(addr);
memcpy ((uint8_t *) &__data, &__addr, E24AA64_ADDR_TRANS_SIZE/SMPR_BYTE_2_BIT);
memcpy ((uint8_t *) &__data + E24AA64_ADDR_TRANS_SIZE/SMPR_BYTE_2_BIT, data, size);
ssize_t smpr_err = smpr_write_block (self->i2c, 0, ARRAY_SIZE(__data),
(uint32_t *) &__data, flags);
/* Check if we have written everything */ /* Check if we have written everything */
ASSERT_TEST(smpr_err >= 0 && (size_t)smpr_err == trans_size/SMPR_BYTE_2_BIT /* in bytes */, ASSERT_TEST(smpr_err >= 0 && (size_t)smpr_err == size /* in bytes */,
"Could not write to SMPR", err_smpr_write, -1); "Could not write to SMPR", err_smpr_write, -1);
/* Return just the number of data bytes written */ /* Return the number of data bytes written */
err = smpr_err - E24AA64_ADDR_TRANS_SIZE/SMPR_BYTE_2_BIT; err = smpr_err;
/* 24AA64 takes up to 2 ms to write the page */ /* 24AA64 takes up to 2 ms to write the page */
SMCH_24AA64_WAIT_DFLT; SMCH_24AA64_WAIT_DFLT;
...@@ -191,66 +177,23 @@ static ssize_t _smch_24aa64_read_generic (smch_24aa64_t *self, uint16_t addr, ...@@ -191,66 +177,23 @@ static ssize_t _smch_24aa64_read_generic (smch_24aa64_t *self, uint16_t addr,
* Source: 24AA64/24LC64 DS21189F datasheet, page 10-11 * Source: 24AA64/24LC64 DS21189F datasheet, page 10-11
*/ */
uint32_t trans_size = E24AA64_ADDR_TRANS_SIZE;
uint32_t flags = SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W(trans_size) /* in bits */ |
SMPR_PROTO_I2C_ADDR_FLAGS_W(self->addr);
/* 24AA64 byte read transaction is: /* 24AA64 byte read transaction is:
* *
* Address high byte | Address low byte * Address high byte | Address low byte
* 8-bit | 8-bit * 8-bit | 8-bit
* */ * */
DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:24aa64_read_generic] addr = 0x%04X\n", addr); DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:24aa64_read_generic] addr = 0x%04X\n", addr);
uint32_t __data = E24AA64_ADDR_W(addr);
ssize_t smpr_err = smpr_write_32 (self->i2c, 0, &__data, flags); err = smpr_read_block (self->proto, E24AA64_ADDR_SIZE, E24AA64_ADDR_W(addr),
size, (uint32_t *) data);
/* Check if we have written everything */ /* Check if we have written everything */
ASSERT_TEST(smpr_err >= 0 && (size_t) smpr_err == trans_size/SMPR_BYTE_2_BIT /* in bytes */, ASSERT_TEST(err >= 0 && (size_t) err == size /* in bytes */,
"Could not write to SMPR", err_smpr_write, -1);
/* Now, read the data */
trans_size = size*E24AA64_DATA_TRANS_SIZE;
flags = SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W(trans_size) /* in bits */ |
SMPR_PROTO_I2C_ADDR_FLAGS_W(self->addr);
smpr_err = smpr_read_block (self->i2c, 0, size, (uint32_t *) data, flags);
/* Check if we have written everything */
ASSERT_TEST(smpr_err >= 0 && (size_t)smpr_err == trans_size/SMPR_BYTE_2_BIT /* in bytes */,
"Could not READ from SMPR", err_smpr_read, -1); "Could not READ from SMPR", err_smpr_read, -1);
err = smpr_err;
/* 24AA64 takes up to 2 ms to write the page */ /* 24AA64 takes up to 2 ms to write the page */
SMCH_24AA64_WAIT_DFLT; SMCH_24AA64_WAIT_DFLT;
err_smpr_read: err_smpr_read:
err_smpr_write:
return err; return err;
} }
ssize_t smch_24aa64_probe_bus (smch_24aa64_t *self)
{
ssize_t err = 0;
DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:24aa64_probe_bus] Probing bus ...\n");
uint32_t i;
for (i = 0; i < 128; ++i) {
uint32_t flags = SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W(8) /* in bits */ |
SMPR_PROTO_I2C_ADDR_FLAGS_W(i);
uint32_t __data = 0;
ssize_t smpr_err = smpr_read_32 (self->i2c, 0, &__data, flags);
if (smpr_err >= 0) {
DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO, "[sm_ch:24aa64_probe_bus] "
"Found device at address 0x%02X\n", i);
}
SMCH_24AA64_WAIT_DFLT;
}
return err;
}
src/sm_io/chips/sm_ch_ad9510.c
View file @ d584f7b6
...@@ -44,7 +44,6 @@ ...@@ -44,7 +44,6 @@
struct _smch_ad9510_t { struct _smch_ad9510_t {
smpr_t *spi; /* SPI protocol object */ smpr_t *spi; /* SPI protocol object */
uint32_t ss; /* Slave select line for this AD9510 chip */
}; };
static ssize_t _smch_ad9510_write_8 (smch_ad9510_t *self, uint8_t addr, static ssize_t _smch_ad9510_write_8 (smch_ad9510_t *self, uint8_t addr,
...@@ -56,7 +55,7 @@ static bool _smch_ad9510_wait_completion (smch_ad9510_t *self, unsigned int trie ...@@ -56,7 +55,7 @@ static bool _smch_ad9510_wait_completion (smch_ad9510_t *self, unsigned int trie
static smch_err_e _smch_ad9510_reg_update (smch_ad9510_t *self); static smch_err_e _smch_ad9510_reg_update (smch_ad9510_t *self);
/* Creates a new instance of the SMCH AD9510 */ /* Creates a new instance of the SMCH AD9510 */
smch_ad9510_t * smch_ad9510_new (smio_t *parent, uint64_t base, uint32_t ss, smch_ad9510_t * smch_ad9510_new (smio_t *parent, uint64_t base,
const smpr_proto_ops_t *reg_ops, int verbose) const smpr_proto_ops_t *reg_ops, int verbose)
{ {
(void) verbose; (void) verbose;
...@@ -72,8 +71,6 @@ smch_ad9510_t * smch_ad9510_new (smio_t *parent, uint64_t base, uint32_t ss, ...@@ -72,8 +71,6 @@ smch_ad9510_t * smch_ad9510_new (smio_t *parent, uint64_t base, uint32_t ss,
int smpr_err = smpr_open (self->spi, base, NULL /* Default parameters are fine */); int smpr_err = smpr_open (self->spi, base, NULL /* Default parameters are fine */);
ASSERT_TEST(smpr_err == 0, "Could not initialize SMPR protocol", err_smpr_init); ASSERT_TEST(smpr_err == 0, "Could not initialize SMPR protocol", err_smpr_init);
self->ss = ss;
DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO, "[sm_ch:ad9510] Created instance of SMCH\n"); DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO, "[sm_ch:ad9510] Created instance of SMCH\n");
smch_err_e err = _smch_ad9510_init (self); smch_err_e err = _smch_ad9510_init (self);
...@@ -770,14 +767,13 @@ static ssize_t _smch_ad9510_write_8 (smch_ad9510_t *self, uint8_t addr, ...@@ -770,14 +767,13 @@ static ssize_t _smch_ad9510_write_8 (smch_ad9510_t *self, uint8_t addr,
/* We transmit a WRITE operation, with 1 byte transfer, with address as "addr" /* We transmit a WRITE operation, with 1 byte transfer, with address as "addr"
* and data as "data" */ * and data as "data" */
uint32_t __data = ~AD9510_HDR_RW & ( uint64_t __addr = ~AD9510_HDR_RW & (
AD9510_HDR_BT_W(0x0) | AD9510_HDR_BT_W(0x0) |
AD9510_HDR_ADDR_W(addr) | AD9510_HDR_ADDR_W(addr)
AD9510_DATA_W(*data)
); );
uint32_t flags = SMPR_PROTO_SPI_SS_FLAGS_W(self->ss) | uint32_t __data = AD9510_DATA_W(*data);
SMPR_PROTO_SPI_CHARLEN_FLAGS_W(AD9510_TRASNS_SIZE); ssize_t smpr_err = smpr_write_block (self->spi, AD9510_INSTADDR_SIZE, __addr,
ssize_t smpr_err = smpr_write_32 (self->spi, 0, &__data, flags); AD9510_DATA_SIZE, &__data);
ASSERT_TEST(smpr_err == sizeof(uint32_t), "Could not write to SMPR", ASSERT_TEST(smpr_err == sizeof(uint32_t), "Could not write to SMPR",
err_smpr_write, -1); err_smpr_write, -1);
...@@ -798,13 +794,13 @@ static ssize_t _smch_ad9510_read_8 (smch_ad9510_t *self, uint8_t addr, ...@@ -798,13 +794,13 @@ static ssize_t _smch_ad9510_read_8 (smch_ad9510_t *self, uint8_t addr,
* */ * */
/* We transmit a READ operation, with 1 byte transfer, with address as "addr" */ /* We transmit a READ operation, with 1 byte transfer, with address as "addr" */
uint32_t __data = AD9510_HDR_RW | ( uint64_t __addr = AD9510_HDR_RW | (
AD9510_HDR_BT_W(0x0) | AD9510_HDR_BT_W(0x0) |
AD9510_HDR_ADDR_W(addr) AD9510_HDR_ADDR_W(addr)
); );
uint32_t flags = SMPR_PROTO_SPI_SS_FLAGS_W(self->ss) | uint32_t __data = 0;
SMPR_PROTO_SPI_CHARLEN_FLAGS_W(AD9510_TRASNS_SIZE); ssize_t smpr_err = smpr_read_block (self->spi, AD9510_INSTADDR_SIZE, __addr,
ssize_t smpr_err = smpr_read_32 (self->spi, 0, &__data, flags); AD9510_DATA_SIZE, &__data);
ASSERT_TEST(smpr_err == sizeof(uint32_t), "Could not write to SMPR", ASSERT_TEST(smpr_err == sizeof(uint32_t), "Could not write to SMPR",
err_smpr_write, -1); err_smpr_write, -1);
......
src/sm_io/chips/sm_ch_isla216p.c
View file @ d584f7b6
...@@ -31,14 +31,13 @@ ...@@ -31,14 +31,13 @@
smch_err_str (err_type)) smch_err_str (err_type))
#define SMCH_ISLA216P_WAIT_TRIES 10 #define SMCH_ISLA216P_WAIT_TRIES 10
#define SMCH_ISLA216P_NAME "SPI_ISLA216P" #define SMCH_ISLA216P_NAME "ISLA216P"
#define SMCH_ISLA216P_USECS_WAIT 1000 #define SMCH_ISLA216P_USECS_WAIT 1000
#define SMCH_ISLA216P_WAIT(usecs) usleep(usecs) #define SMCH_ISLA216P_WAIT(usecs) usleep(usecs)
#define SMCH_ISLA216P_WAIT_DFLT SMCH_ISLA216P_WAIT(SMCH_ISLA216P_USECS_WAIT) #define SMCH_ISLA216P_WAIT_DFLT SMCH_ISLA216P_WAIT(SMCH_ISLA216P_USECS_WAIT)
struct _smch_isla216p_t { struct _smch_isla216p_t {
smpr_t *spi; /* SPI protocol object */ smpr_t *proto; /* PROTO protocol object */
uint32_t ss; /* Slave select line for this ISLA216P chip */
}; };
static smch_err_e _smch_isla216p_init (smch_isla216p_t *self); static smch_err_e _smch_isla216p_init (smch_isla216p_t *self);
...@@ -49,7 +48,7 @@ static ssize_t _smch_isla216p_read_8 (smch_isla216p_t *self, uint8_t addr, ...@@ -49,7 +48,7 @@ static ssize_t _smch_isla216p_read_8 (smch_isla216p_t *self, uint8_t addr,
uint8_t *data); uint8_t *data);
/* Creates a new instance of the SMCH ISLA216P */ /* Creates a new instance of the SMCH ISLA216P */
smch_isla216p_t * smch_isla216p_new (smio_t *parent, uint64_t base, uint32_t ss, smch_isla216p_t * smch_isla216p_new (smio_t *parent, uint64_t base,
const smpr_proto_ops_t *reg_ops, int verbose) const smpr_proto_ops_t *reg_ops, int verbose)
{ {
(void) verbose; (void) verbose;
...@@ -58,13 +57,12 @@ smch_isla216p_t * smch_isla216p_new (smio_t *parent, uint64_t base, uint32_t ss, ...@@ -58,13 +57,12 @@ smch_isla216p_t * smch_isla216p_new (smio_t *parent, uint64_t base, uint32_t ss,
smch_isla216p_t *self = (smch_isla216p_t *) zmalloc (sizeof *self); smch_isla216p_t *self = (smch_isla216p_t *) zmalloc (sizeof *self);
ASSERT_ALLOC(self, err_self_alloc); ASSERT_ALLOC(self, err_self_alloc);
self->spi = smpr_new (SMCH_ISLA216P_NAME, parent, reg_ops, verbose); self->proto = smpr_new (SMCH_ISLA216P_NAME, parent, reg_ops, verbose);
ASSERT_ALLOC(self->spi, err_spi_alloc); ASSERT_ALLOC(self->proto, err_proto_alloc);
/* Initalize the SPI protocol */ /* Initalize the PROTO protocol */
int smpr_err = smpr_open (self->spi, base, NULL /* Default parameters are fine */); int smpr_err = smpr_open (self->proto, base, NULL /* Default parameters are fine */);
ASSERT_TEST(smpr_err == 0, "Could not initialize SMPR protocol", err_smpr_init); ASSERT_TEST(smpr_err == 0, "Could not initialize SMPR protocol", err_smpr_init);
self->ss = ss;
DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO, "[sm_ch:isla216p] Created instance of SMCH\n"); DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO, "[sm_ch:isla216p] Created instance of SMCH\n");
...@@ -74,10 +72,10 @@ smch_isla216p_t * smch_isla216p_new (smio_t *parent, uint64_t base, uint32_t ss, ...@@ -74,10 +72,10 @@ smch_isla216p_t * smch_isla216p_new (smio_t *parent, uint64_t base, uint32_t ss,
return self; return self;
err_smch_init: err_smch_init:
smpr_release (self->spi); smpr_release (self->proto);
err_smpr_init: err_smpr_init:
smpr_destroy (&self->spi); smpr_destroy (&self->proto);
err_spi_alloc: err_proto_alloc:
free (self); free (self);
err_self_alloc: err_self_alloc:
return NULL; return NULL;
...@@ -91,8 +89,8 @@ smch_err_e smch_isla216p_destroy (smch_isla216p_t **self_p) ...@@ -91,8 +89,8 @@ smch_err_e smch_isla216p_destroy (smch_isla216p_t **self_p)
if (*self_p) { if (*self_p) {
smch_isla216p_t *self = *self_p; smch_isla216p_t *self = *self_p;
smpr_release (self->spi); smpr_release (self->proto);
smpr_destroy (&self->spi); smpr_destroy (&self->proto);
free (self); free (self);
*self_p = NULL; *self_p = NULL;
} }
...@@ -173,7 +171,7 @@ static smch_err_e _smch_isla216p_init (smch_isla216p_t *self) ...@@ -173,7 +171,7 @@ static smch_err_e _smch_isla216p_init (smch_isla216p_t *self)
smch_err_e err = SMCH_SUCCESS; smch_err_e err = SMCH_SUCCESS;
ssize_t rw_err = -1; ssize_t rw_err = -1;
/* Turn on Bidirectional SPI */ /* Turn on Bidirectional PROTO */
uint8_t data = ISLA216P_PORTCONFIG_SDO_ACTIVE; uint8_t data = ISLA216P_PORTCONFIG_SDO_ACTIVE;
DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO, DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO,
"[sm_ch:isla216p] Writing 0x%02X to addr 0x%02X\n", data, ISLA216P_REG_PORTCONFIG); "[sm_ch:isla216p] Writing 0x%02X to addr 0x%02X\n", data, ISLA216P_REG_PORTCONFIG);
...@@ -224,14 +222,14 @@ static ssize_t _smch_isla216p_write_8 (smch_isla216p_t *self, uint8_t addr, ...@@ -224,14 +222,14 @@ static ssize_t _smch_isla216p_write_8 (smch_isla216p_t *self, uint8_t addr,
/* We transmit a WRITE operation, with 1 byte transfer, with address as "addr" /* We transmit a WRITE operation, with 1 byte transfer, with address as "addr"
* and data as "data" */ * and data as "data" */
uint32_t __data = ~ISLA216P_HDR_RW & ( uint32_t __addr = ~ISLA216P_HDR_RW & (
ISLA216P_HDR_BT_W(0x0) | ISLA216P_HDR_BT_W(0x0) |
ISLA216P_HDR_ADDR_W(addr) | ISLA216P_HDR_ADDR_W(addr)
ISLA216P_DATA_W(*data)
); );
uint32_t flags = SMPR_PROTO_SPI_SS_FLAGS_W(self->ss) | uint32_t __data = ISLA216P_DATA_W(*data);
SMPR_PROTO_SPI_CHARLEN_FLAGS_W(ISLA216P_TRANS_SIZE);
ssize_t smpr_err = smpr_write_32 (self->spi, 0, &__data, flags); ssize_t smpr_err = smpr_write_block (self->proto, ISLA216P_INSTADDR_SIZE, __addr,
ISLA216P_DATA_SIZE, &__data);
ASSERT_TEST(smpr_err == sizeof(uint32_t), "Could not write to SMPR", ASSERT_TEST(smpr_err == sizeof(uint32_t), "Could not write to SMPR",
err_smpr_write, -1); err_smpr_write, -1);
...@@ -252,13 +250,14 @@ static ssize_t _smch_isla216p_read_8 (smch_isla216p_t *self, uint8_t addr, ...@@ -252,13 +250,14 @@ static ssize_t _smch_isla216p_read_8 (smch_isla216p_t *self, uint8_t addr,
* */ * */
/* We transmit a READ operation, with 1 byte transfer, with address as "addr" */ /* We transmit a READ operation, with 1 byte transfer, with address as "addr" */
uint32_t __data = ISLA216P_HDR_RW | ( uint32_t __addr = ISLA216P_HDR_RW | (
ISLA216P_HDR_BT_W(0x0) | ISLA216P_HDR_BT_W(0x0) |
ISLA216P_HDR_ADDR_W(addr) ISLA216P_HDR_ADDR_W(addr)
); );
uint32_t flags = SMPR_PROTO_SPI_SS_FLAGS_W(self->ss) | uint32_t __data = 0;
SMPR_PROTO_SPI_CHARLEN_FLAGS_W(ISLA216P_TRANS_SIZE);
ssize_t smpr_err = smpr_read_32 (self->spi, 0, &__data, flags); ssize_t smpr_err = smpr_read_block (self->proto, ISLA216P_INSTADDR_SIZE, __addr,
ISLA216P_DATA_SIZE, &__data);
ASSERT_TEST(smpr_err == sizeof(uint32_t), "Could not write to SMPR", ASSERT_TEST(smpr_err == sizeof(uint32_t), "Could not write to SMPR",
err_smpr_write, -1); err_smpr_write, -1);
......
src/sm_io/chips/sm_ch_pca9547.c
View file @ d584f7b6
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* *
* Released according to the GNU GPL, version 3 or any later version. * Released according to the GNU GPL, version 3 or any later version.
* *
* Description: Software driver for rPCA9547 I2C switch chip * Description: Software driver for PCA9547 switch chip
*/ */
#include "bpm_server.h" #include "bpm_server.h"
...@@ -32,18 +32,17 @@ ...@@ -32,18 +32,17 @@
CHECK_HAL_ERR(err, SM_CH, "[sm_ch:pca9547]", \ CHECK_HAL_ERR(err, SM_CH, "[sm_ch:pca9547]", \
smch_err_str (err_type)) smch_err_str (err_type))
#define SMCH_PCA9547_NAME "I2C_PCA9547" #define SMCH_PCA9547_NAME "PCA9547"
struct _smch_pca9547_t { struct _smch_pca9547_t {
smpr_t *i2c; /* I2C protocol object */ smpr_t *proto; /* PROTO protocol object */
uint32_t addr; /* I2C address for this PCA9547 chip */
}; };
static smch_err_e _smch_pca9547_write_8 (smch_pca9547_t *self, const uint8_t *data); static smch_err_e _smch_pca9547_write_8 (smch_pca9547_t *self, const uint8_t *data);
static smch_err_e _smch_pca9547_read_8 (smch_pca9547_t *self, uint8_t *data); static smch_err_e _smch_pca9547_read_8 (smch_pca9547_t *self, uint8_t *data);
/* Creates a new instance of the SMCH PCA9547 */ /* Creates a new instance of the SMCH PCA9547 */
smch_pca9547_t * smch_pca9547_new (smio_t *parent, uint64_t base, uint32_t addr, smch_pca9547_t * smch_pca9547_new (smio_t *parent, uint64_t base,
const smpr_proto_ops_t *reg_ops, int verbose) const smpr_proto_ops_t *reg_ops, int verbose)
{ {
(void) verbose; (void) verbose;
...@@ -52,21 +51,19 @@ smch_pca9547_t * smch_pca9547_new (smio_t *parent, uint64_t base, uint32_t addr, ...@@ -52,21 +51,19 @@ smch_pca9547_t * smch_pca9547_new (smio_t *parent, uint64_t base, uint32_t addr,
smch_pca9547_t *self = (smch_pca9547_t *) zmalloc (sizeof *self); smch_pca9547_t *self = (smch_pca9547_t *) zmalloc (sizeof *self);
ASSERT_ALLOC(self, err_self_alloc); ASSERT_ALLOC(self, err_self_alloc);
self->i2c = smpr_new (SMCH_PCA9547_NAME, parent, reg_ops, verbose); self->proto = smpr_new (SMCH_PCA9547_NAME, parent, reg_ops, verbose);
ASSERT_ALLOC(self->i2c, err_i2c_alloc); ASSERT_ALLOC(self->proto, err_proto_alloc);
/* Initalize the I2C protocol */ /* Initalize the PROTO protocol */
int smpr_err = smpr_open (self->i2c, base, NULL /* Default parameters are fine */); int smpr_err = smpr_open (self->proto, base, NULL /* Default parameters are fine */);
ASSERT_TEST(smpr_err == 0, "Could not initialize SMPR protocol", err_smpr_init); ASSERT_TEST(smpr_err == 0, "Could not initialize SMPR protocol", err_smpr_init);
self->addr = addr;
DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO, "[sm_ch:pca9547] Created instance of SMCH\n"); DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO, "[sm_ch:pca9547] Created instance of SMCH\n");
return self; return self;
err_smpr_init: err_smpr_init:
smpr_destroy (&self->i2c); smpr_destroy (&self->proto);
err_i2c_alloc: err_proto_alloc:
free (self); free (self);
err_self_alloc: err_self_alloc:
return NULL; return NULL;
...@@ -80,8 +77,8 @@ smch_err_e smch_pca9547_destroy (smch_pca9547_t **self_p) ...@@ -80,8 +77,8 @@ smch_err_e smch_pca9547_destroy (smch_pca9547_t **self_p)
if (*self_p) { if (*self_p) {
smch_pca9547_t *self = *self_p; smch_pca9547_t *self = *self_p;
smpr_release (self->i2c); smpr_release (self->proto);
smpr_destroy (&self->i2c); smpr_destroy (&self->proto);
free (self); free (self);
*self_p = NULL; *self_p = NULL;
} }
...@@ -104,9 +101,6 @@ smch_err_e smch_pca9547_read_8 (smch_pca9547_t *self, uint8_t *data) ...@@ -104,9 +101,6 @@ smch_err_e smch_pca9547_read_8 (smch_pca9547_t *self, uint8_t *data)
static smch_err_e _smch_pca9547_write_8 (smch_pca9547_t *self, const uint8_t *data) static smch_err_e _smch_pca9547_write_8 (smch_pca9547_t *self, const uint8_t *data)
{ {
smch_err_e err = SMCH_SUCCESS; smch_err_e err = SMCH_SUCCESS;
uint32_t trans_size = PCA9547_DATA_TRANS_SIZE;
uint32_t flags = SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W(trans_size) /* in bits */ |
SMPR_PROTO_I2C_ADDR_FLAGS_W(self->addr);
/* PCA9547 write byte transaction is: /* PCA9547 write byte transaction is:
* *
...@@ -116,8 +110,8 @@ static smch_err_e _smch_pca9547_write_8 (smch_pca9547_t *self, const uint8_t *da ...@@ -116,8 +110,8 @@ static smch_err_e _smch_pca9547_write_8 (smch_pca9547_t *self, const uint8_t *da
DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:pca9547_write_8] data = 0x%02X\n", DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:pca9547_write_8] data = 0x%02X\n",
*data); *data);
ssize_t smpr_err = smpr_write_32 (self->i2c, 0, (uint32_t *) data, flags); ssize_t smpr_err = smpr_write_block (self->proto, 0, 0, sizeof (*data), (uint32_t *) data);
ASSERT_TEST(smpr_err == PCA9547_DATA_TRANS_SIZE/SMPR_BYTE_2_BIT /* in bytes*/, ASSERT_TEST(smpr_err == sizeof (*data) /* in bytes*/,
"Could not write data to I2C", err_exit, SMCH_ERR_RW_SMPR); "Could not write data to I2C", err_exit, SMCH_ERR_RW_SMPR);
err_exit: err_exit:
...@@ -127,9 +121,6 @@ err_exit: ...@@ -127,9 +121,6 @@ err_exit:
static smch_err_e _smch_pca9547_read_8 (smch_pca9547_t *self, uint8_t *data) static smch_err_e _smch_pca9547_read_8 (smch_pca9547_t *self, uint8_t *data)
{ {
smch_err_e err = SMCH_SUCCESS; smch_err_e err = SMCH_SUCCESS;
uint32_t trans_size = PCA9547_DATA_TRANS_SIZE;
uint32_t flags = SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W(trans_size) /* in bits */ |
SMPR_PROTO_I2C_ADDR_FLAGS_W(self->addr);
/* PCA9547 read byte transaction is: /* PCA9547 read byte transaction is:
* *
...@@ -137,8 +128,8 @@ static smch_err_e _smch_pca9547_read_8 (smch_pca9547_t *self, uint8_t *data) ...@@ -137,8 +128,8 @@ static smch_err_e _smch_pca9547_read_8 (smch_pca9547_t *self, uint8_t *data)
* 8-bit * 8-bit
* */ * */
ssize_t smpr_err = smpr_read_32 (self->i2c, 0, (uint32_t *) data, flags); ssize_t smpr_err = smpr_read_block (self->proto, 0, 0, sizeof (*data), (uint32_t *) data);
ASSERT_TEST(smpr_err == PCA9547_DATA_TRANS_SIZE/SMPR_BYTE_2_BIT /* in bytes*/, ASSERT_TEST(smpr_err == sizeof (*data) /* in bytes*/,
"Could not read data to I2C", err_exit, SMCH_ERR_RW_SMPR); "Could not read data to I2C", err_exit, SMCH_ERR_RW_SMPR);
DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:pca9547_read_8] data = 0x%02X\n", DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:pca9547_read_8] data = 0x%02X\n",
......
src/sm_io/chips/sm_ch_rffe.c
View file @ d584f7b6
...@@ -36,17 +36,18 @@ ...@@ -36,17 +36,18 @@
CHECK_HAL_ERR(err, SM_CH, "[sm_ch:rffe]", \ CHECK_HAL_ERR(err, SM_CH, "[sm_ch:rffe]", \
smch_err_str (err_type)) smch_err_str (err_type))
#define SMCH_RFFE_NAME "BSMP_RFFE" #define SMCH_RFFE_NAME "RFFE"
#define SMCH_RFFE_USECS_WAIT 10000 #define SMCH_RFFE_USECS_WAIT 10000
#define SMCH_RFFE_WAIT(usecs) usleep(usecs) #define SMCH_RFFE_WAIT(usecs) usleep(usecs)
#define SMCH_RFFE_WAIT_DFLT SMCH_RFFE_WAIT(SMCH_RFFE_USECS_WAIT) #define SMCH_RFFE_WAIT_DFLT SMCH_RFFE_WAIT(SMCH_RFFE_USECS_WAIT)
struct _smch_rffe_t { struct _smch_rffe_t {
smpr_t *bsmp; /* BSMP protocol object */ smpr_t *proto; /* PROTO protocol object */
}; };
/* Creates a new instance of the SMCH RFFE */ /* Creates a new instance of the SMCH RFFE */
smch_rffe_t * smch_rffe_new (smio_t *parent, const smpr_proto_ops_t *reg_ops, int verbose) smch_rffe_t * smch_rffe_new (smio_t *parent, const smpr_proto_ops_t *reg_ops,
int verbose)
{ {
(void) verbose; (void) verbose;
assert (parent); assert (parent);
...@@ -54,19 +55,19 @@ smch_rffe_t * smch_rffe_new (smio_t *parent, const smpr_proto_ops_t *reg_ops, in ...@@ -54,19 +55,19 @@ smch_rffe_t * smch_rffe_new (smio_t *parent, const smpr_proto_ops_t *reg_ops, in
smch_rffe_t *self = (smch_rffe_t *) zmalloc (sizeof *self); smch_rffe_t *self = (smch_rffe_t *) zmalloc (sizeof *self);
ASSERT_ALLOC(self, err_self_alloc); ASSERT_ALLOC(self, err_self_alloc);
self->bsmp = smpr_new (SMCH_RFFE_NAME, parent, reg_ops, verbose); self->proto = smpr_new (SMCH_RFFE_NAME, parent, reg_ops, verbose);
ASSERT_ALLOC(self->bsmp, err_bsmp_alloc); ASSERT_ALLOC(self->proto, err_proto_alloc);
/* Initalize the BSMP protocol */ /* Initalize the PROTO protocol */
int smpr_err = smpr_open (self->bsmp, 0, NULL /* Default parameters are fine */); int smpr_err = smpr_open (self->proto, 0, NULL /* Default parameters are fine */);
ASSERT_TEST(smpr_err == 0, "Could not initialize SMPR protocol", err_smpr_init); ASSERT_TEST(smpr_err == 0, "Could not initialize SMPR protocol", err_smpr_init);
DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO, "[sm_ch:rffe] Created instance of SMCH\n"); DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO, "[sm_ch:rffe] Created instance of SMCH\n");
return self; return self;
err_smpr_init: err_smpr_init:
smpr_destroy (&self->bsmp); smpr_destroy (&self->proto);
err_bsmp_alloc: err_proto_alloc:
free (self); free (self);
err_self_alloc: err_self_alloc:
return NULL; return NULL;
...@@ -80,8 +81,8 @@ smch_err_e smch_rffe_destroy (smch_rffe_t **self_p) ...@@ -80,8 +81,8 @@ smch_err_e smch_rffe_destroy (smch_rffe_t **self_p)
if (*self_p) { if (*self_p) {
smch_rffe_t *self = *self_p; smch_rffe_t *self = *self_p;
smpr_release (self->bsmp); smpr_release (self->proto);
smpr_destroy (&self->bsmp); smpr_destroy (&self->proto);
free (self); free (self);
*self_p = NULL; *self_p = NULL;
} }
...@@ -97,7 +98,7 @@ smch_err_e smch_rffe_write_var (smch_rffe_t *self, uint32_t id, uint8_t *data, ...@@ -97,7 +98,7 @@ smch_err_e smch_rffe_write_var (smch_rffe_t *self, uint32_t id, uint8_t *data,
smch_err_e err = SMCH_SUCCESS; smch_err_e err = SMCH_SUCCESS;
smpr_err_e smpr_err = smpr_bsmp_write_var_by_id (self->bsmp, id, data, size); smpr_err_e smpr_err = smpr_bsmp_write_var_by_id (self->proto, id, data, size);
ASSERT_TEST(smpr_err == SMPR_SUCCESS, "Could not write variable to SMPR", ASSERT_TEST(smpr_err == SMPR_SUCCESS, "Could not write variable to SMPR",
err_smpr_write_var, SMCH_ERR_RW_SMPR); err_smpr_write_var, SMCH_ERR_RW_SMPR);
...@@ -113,7 +114,7 @@ smch_err_e smch_rffe_read_var (smch_rffe_t *self, uint32_t id, uint8_t *data, ...@@ -113,7 +114,7 @@ smch_err_e smch_rffe_read_var (smch_rffe_t *self, uint32_t id, uint8_t *data,
smch_err_e err = SMCH_SUCCESS; smch_err_e err = SMCH_SUCCESS;
smpr_err_e smpr_err = smpr_bsmp_read_var_by_id (self->bsmp, id, data, size); smpr_err_e smpr_err = smpr_bsmp_read_var_by_id (self->proto, id, data, size);
ASSERT_TEST(smpr_err == SMPR_SUCCESS, "Could not read variable to SMPR", ASSERT_TEST(smpr_err == SMPR_SUCCESS, "Could not read variable to SMPR",
err_smpr_read_var, SMCH_ERR_RW_SMPR); err_smpr_read_var, SMCH_ERR_RW_SMPR);
......
src/sm_io/chips/sm_ch_si57x.c
View file @ d584f7b6
...@@ -37,14 +37,13 @@ ...@@ -37,14 +37,13 @@
smch_err_str (err_type)) smch_err_str (err_type))
#define SMCH_SI57X_WAIT_TRIES 10 #define SMCH_SI57X_WAIT_TRIES 10
#define SMCH_SI57X_NAME "I2C_SI57X" #define SMCH_SI57X_NAME "SI57X"
#define SMCH_SI57X_USECS_WAIT 10000 #define SMCH_SI57X_USECS_WAIT 10000
#define SMCH_SI57X_WAIT(usecs) usleep(usecs) #define SMCH_SI57X_WAIT(usecs) usleep(usecs)
#define SMCH_SI57X_WAIT_DFLT SMCH_SI57X_WAIT(SMCH_SI57X_USECS_WAIT) #define SMCH_SI57X_WAIT_DFLT SMCH_SI57X_WAIT(SMCH_SI57X_USECS_WAIT)
struct _smch_si57x_t { struct _smch_si57x_t {
smpr_t *i2c; /* I2C protocol object */ smpr_t *proto; /* PROTO protocol object */
uint32_t addr; /* I2C address for this SI57X chip */
double fxtal; /* Internal crystal frequency */ double fxtal; /* Internal crystal frequency */
unsigned int n1; /* N1 divider value */ unsigned int n1; /* N1 divider value */
unsigned int hs_div; /* High Speed divider value */ unsigned int hs_div; /* High Speed divider value */
...@@ -76,7 +75,7 @@ static smch_err_e _smch_si57x_calc_divs (smch_si57x_t *self, double frequency, ...@@ -76,7 +75,7 @@ static smch_err_e _smch_si57x_calc_divs (smch_si57x_t *self, double frequency,
static smch_err_e _smch_si57x_wait_new_freq (smch_si57x_t *self); static smch_err_e _smch_si57x_wait_new_freq (smch_si57x_t *self);
/* Creates a new instance of the SMCH SI57X */ /* Creates a new instance of the SMCH SI57X */
smch_si57x_t * smch_si57x_new (smio_t *parent, uint64_t base, uint32_t addr, smch_si57x_t * smch_si57x_new (smio_t *parent, uint64_t base,
const smpr_proto_ops_t *reg_ops, int verbose) const smpr_proto_ops_t *reg_ops, int verbose)
{ {
(void) verbose; (void) verbose;
...@@ -85,15 +84,13 @@ smch_si57x_t * smch_si57x_new (smio_t *parent, uint64_t base, uint32_t addr, ...@@ -85,15 +84,13 @@ smch_si57x_t * smch_si57x_new (smio_t *parent, uint64_t base, uint32_t addr,
smch_si57x_t *self = (smch_si57x_t *) zmalloc (sizeof *self); smch_si57x_t *self = (smch_si57x_t *) zmalloc (sizeof *self);
ASSERT_ALLOC(self, err_self_alloc); ASSERT_ALLOC(self, err_self_alloc);
self->i2c = smpr_new (SMCH_SI57X_NAME, parent, reg_ops, verbose); self->proto = smpr_new (SMCH_SI57X_NAME, parent, reg_ops, verbose);
ASSERT_ALLOC(self->i2c, err_i2c_alloc); ASSERT_ALLOC(self->proto, err_proto_alloc);
/* Initalize the I2C protocol */ /* Initalize the PROTO protocol */
int smpr_err = smpr_open (self->i2c, base, NULL /* Default parameters are fine */); int smpr_err = smpr_open (self->proto, base, NULL /* Default parameters are fine */);
ASSERT_TEST(smpr_err == 0, "Could not initialize SMPR protocol", err_smpr_init); ASSERT_TEST(smpr_err == 0, "Could not initialize SMPR protocol", err_smpr_init);
self->addr = addr;
/* Initialize Si57X parameters */ /* Initialize Si57X parameters */
self->fxtal = SMCH_SI57X_DFLT_FXTAL; self->fxtal = SMCH_SI57X_DFLT_FXTAL;
self->n1 = SMCH_SI57X_DFLT_N1; self->n1 = SMCH_SI57X_DFLT_N1;
...@@ -105,8 +102,8 @@ smch_si57x_t * smch_si57x_new (smio_t *parent, uint64_t base, uint32_t addr, ...@@ -105,8 +102,8 @@ smch_si57x_t * smch_si57x_new (smio_t *parent, uint64_t base, uint32_t addr,
return self; return self;
err_smpr_init: err_smpr_init:
smpr_destroy (&self->i2c); smpr_destroy (&self->proto);
err_i2c_alloc: err_proto_alloc:
free (self); free (self);
err_self_alloc: err_self_alloc:
return NULL; return NULL;
...@@ -120,8 +117,8 @@ smch_err_e smch_si57x_destroy (smch_si57x_t **self_p) ...@@ -120,8 +117,8 @@ smch_err_e smch_si57x_destroy (smch_si57x_t **self_p)
if (*self_p) { if (*self_p) {
smch_si57x_t *self = *self_p; smch_si57x_t *self = *self_p;
smpr_release (self->i2c); smpr_release (self->proto);
smpr_destroy (&self->i2c); smpr_destroy (&self->proto);
free (self); free (self);
*self_p = NULL; *self_p = NULL;
} }
...@@ -247,10 +244,6 @@ static ssize_t _smch_si57x_write_generic (smch_si57x_t *self, uint8_t addr, ...@@ -247,10 +244,6 @@ static ssize_t _smch_si57x_write_generic (smch_si57x_t *self, uint8_t addr,
ASSERT_TEST(size < SI57X_DATA_BYTES_MAX /* in bytes */, ASSERT_TEST(size < SI57X_DATA_BYTES_MAX /* in bytes */,
"Transaction size too big. Maximum of 32 bytes.", err_smpr_write, -1); "Transaction size too big. Maximum of 32 bytes.", err_smpr_write, -1);
uint32_t trans_size = SI57X_ADDR_TRANS_SIZE + size*SI57X_DATA_TRANS_SIZE;
uint32_t flags = SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W(trans_size) /* in bits */ |
SMPR_PROTO_I2C_ADDR_FLAGS_W(self->addr);
/* SI57X write byte transaction is: /* SI57X write byte transaction is:
* *
* *
...@@ -263,20 +256,10 @@ static ssize_t _smch_si57x_write_generic (smch_si57x_t *self, uint8_t addr, ...@@ -263,20 +256,10 @@ static ssize_t _smch_si57x_write_generic (smch_si57x_t *self, uint8_t addr,
DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:si57x_write_8] addr = 0x%02X\n", DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:si57x_write_8] addr = 0x%02X\n",
addr); addr);
/* FIXME? Reduce memcpy calls? We just need this because the address must err = smpr_write_block (self->proto, SI57X_ADDR_TRANS_SIZE, addr,
* come in the LSBs of data */ size, (uint32_t *) data);
uint8_t __data[SI57X_TRANS_SIZE_MAX/SMPR_BYTE_2_BIT]; ASSERT_TEST(err >= 0 && (size_t) err == size /* in bytes*/,
memcpy ((uint8_t *) &__data, &addr, SI57X_ADDR_TRANS_SIZE/SMPR_BYTE_2_BIT); "Could not write data to PROTO", err_exit, -1);
memcpy ((uint8_t *) &__data + SI57X_ADDR_TRANS_SIZE/SMPR_BYTE_2_BIT, data,
size);
ssize_t smpr_err = smpr_write_block (self->i2c, 0, ARRAY_SIZE(__data),
(uint32_t *) &__data, flags);
ASSERT_TEST(smpr_err >= 0 && (size_t)smpr_err == trans_size/SMPR_BYTE_2_BIT /* in bytes*/,
"Could not write data to I2C", err_exit, -1);
/* Return just the number of data bytes written */
err = smpr_err - SI57X_ADDR_TRANS_SIZE/SMPR_BYTE_2_BIT;
err_exit: err_exit:
err_smpr_write: err_smpr_write:
...@@ -304,11 +287,6 @@ static ssize_t _smch_si57x_read_generic (smch_si57x_t *self, uint8_t addr, uint8 ...@@ -304,11 +287,6 @@ static ssize_t _smch_si57x_read_generic (smch_si57x_t *self, uint8_t addr, uint8
assert (data); assert (data);
ssize_t err = -1; ssize_t err = -1;
uint32_t trans_size = SI57X_ADDR_TRANS_SIZE;
/* Si571 needs a repeated start between the write and read commands */
uint32_t flags = SMPR_PROTO_I2C_REP_START |
SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W(trans_size) /* in bits */ |
SMPR_PROTO_I2C_ADDR_FLAGS_W(self->addr);
/* SI57X read byte transaction is: /* SI57X read byte transaction is:
* *
...@@ -320,23 +298,13 @@ static ssize_t _smch_si57x_read_generic (smch_si57x_t *self, uint8_t addr, uint8 ...@@ -320,23 +298,13 @@ static ssize_t _smch_si57x_read_generic (smch_si57x_t *self, uint8_t addr, uint8
DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:si57x_read_8] addr = 0x%02X\n", DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:si57x_read_8] addr = 0x%02X\n",
addr); addr);
ssize_t smpr_err = smpr_write_32 (self->i2c, 0, (uint32_t *) &addr, flags); uint64_t __addr = addr;
/* Check if we have written everything */
ASSERT_TEST(smpr_err >= 0 && (size_t)smpr_err == trans_size/SMPR_BYTE_2_BIT /* in bytes */,
"Could not write data to I2C", err_exit, -1);
/* Now, read the data */
trans_size = size*SI57X_DATA_TRANS_SIZE;
flags = SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W(trans_size) /* in bits */ |
SMPR_PROTO_I2C_ADDR_FLAGS_W(self->addr);
smpr_err = smpr_read_block (self->i2c, 0, size, (uint32_t *) data, err = smpr_read_block (self->proto, SI57X_ADDR_TRANS_SIZE, __addr,
flags); size, (uint32_t *) data);
/* Check if we have written everything */ /* Check if we have written everything */
ASSERT_TEST(smpr_err >= 0 && (size_t)smpr_err == trans_size/SMPR_BYTE_2_BIT /* in bytes */, ASSERT_TEST(err >= 0 && (size_t) err == size /* in bytes */,
"Could not read data from I2C", err_exit, -1); "Could not read data from PROTO", err_exit, -1);
err = smpr_err;
err_exit: err_exit:
return err; return err;
...@@ -455,34 +423,6 @@ err_exit: ...@@ -455,34 +423,6 @@ err_exit:
return err; return err;
} }
/* FIXME: reuse 24AA64 probe function */
ssize_t smch_si57x_probe_bus (smch_si57x_t *self)
{
assert (self);
ssize_t err = 0;
DBE_DEBUG (DBG_SM_CH | DBG_LVL_TRACE, "[sm_ch:si57x_probe_bus] Probing bus ...\n");
uint32_t i;
for (i = 0; i < 128; ++i) {
uint32_t flags = SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W(8) /* in bits */ |
SMPR_PROTO_I2C_ADDR_FLAGS_W(i);
uint32_t __data = 0;
ssize_t smpr_err = smpr_read_32 (self->i2c, 0, &__data, flags);
if (smpr_err >= 0) {
DBE_DEBUG (DBG_SM_CH | DBG_LVL_INFO, "[sm_ch:si57x_probe_bus] "
"Found device at address 0x%02X\n", i);
}
SMCH_SI57X_WAIT_DFLT;
}
return err;
}
/******************************* Helper Functions ****************************/ /******************************* Helper Functions ****************************/
static smch_err_e _smch_si57x_wait_new_freq (smch_si57x_t *self) static smch_err_e _smch_si57x_wait_new_freq (smch_si57x_t *self)
......
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