Commit dc3e9afd authored by Juliano Murari's avatar Juliano Murari

hal/*: add ML605 board memory layout

New boards can be added by creating a new
file under hal/boards/ and referencing its
memory layout in hal/include/mem_layout/
parent 5b696d9c
boards_DIR = hal/boards
boards_INCLUDE_DIRS = $(boards_DIR)/$(BOARD)
#ifndef _BOARD_H_
#define _BOARD_H_
#include <mem_layout/ml605/mem_layout.h>
/****************************/
/* General Definitions */
/****************************/
/* CPU Clock frequency in hertz */
#define CPU_CLOCK 100000000ULL
/* Baud rate of the builtin UART (does not apply to the VUART) */
#define UART_BAUDRATE 115200ULL
int board_init();
int board_update();
#endif
#ifndef _MEM_LAYOUT__H_
#define _MEM_LAYOUT__H_
/*********************** Static ML605 FPGA layout ***********************/
/* Should be autodiscovered by SDB */
#define FMC130M_BASE_ADDR 0x00310000
#define FPGA_CTRL_REGS (FMC130M_BASE_ADDR + 0x0000)
#define FPGA_SI571_I2C (FMC130M_BASE_ADDR + 0x0100)
#define FPGA_AD9510_SPI (FMC130M_BASE_ADDR + 0x0200)
#define FPGA_EEPROM_I2C (FMC130M_BASE_ADDR + 0x0300)
#define FPGA_LM75A_I2C (FMC130M_BASE_ADDR + 0x0400)
#define DSP_BASE_ADDR 0x00308000
#define DSP_CTRL_REGS (DSP_BASE_ADDR + 0x00000000)
#define DSP_BPM_SWAP (DSP_BASE_ADDR + 0x00000100)
#define WB_ACQ_BASE_ADDR 0x00330000
#endif
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