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Beam Positoning Monitor - Software
Commit f5e8b6d3 authored by Lucas Russo's avatar Lucas Russo
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modules/fmc130m_4ch: use new FMC_ADC_COMMON/FMC_ACTIVE_CLK SMIOs 

In this way, we reduce code repetition and
maintenance becomes easier
parent 0da48b97
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Showing with 8 additions and 722 deletions
src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_codes.h
View file @ f5e8b6d3
......@@ -12,16 +12,6 @@
#define FMC130M_4CH_OPCODE_TYPE uint32_t
#define FMC130M_4CH_OPCODE_SIZE (sizeof (FMC130M_4CH_OPCODE_TYPE))
#define FMC130M_4CH_OPCODE_LEDS 0
#define FMC130M_4CH_NAME_LEDS "fmc130m_4ch_leds"
#define FMC130M_4CH_OPCODE_SI571_OE 1
#define FMC130M_4CH_NAME_SI571_OE "fmc130m_4ch_si571_oe"
#define FMC130M_4CH_OPCODE_PLL_FUNCTION 2
#define FMC130M_4CH_NAME_PLL_FUNCTION "fmc130m_4ch_pll_function"
#define FMC130M_4CH_OPCODE_PLL_STATUS 3
#define FMC130M_4CH_NAME_PLL_STATUS "fmc130m_4ch_pll_status"
#define FMC130M_4CH_OPCODE_CLK_SEL 4
#define FMC130M_4CH_NAME_CLK_SEL "fmc130m_4ch_clk_sel"
#define FMC130M_4CH_OPCODE_ADC_RAND 5
#define FMC130M_4CH_NAME_ADC_RAND "fmc130m_4ch_adc_rand"
#define FMC130M_4CH_OPCODE_ADC_DITH 6
......@@ -70,39 +60,7 @@
#define FMC130M_4CH_NAME_ADC_DLY2 "fmc130m_4ch_adc_dly2"
#define FMC130M_4CH_OPCODE_ADC_DLY3 28
#define FMC130M_4CH_NAME_ADC_DLY3 "fmc130m_4ch_adc_dly3"
#define FMC130M_4CH_OPCODE_TEST_DATA_EN 29
#define FMC130M_4CH_NAME_TEST_DATA_EN "fmc130m_4ch_adc_test_data_en"
#define FMC130M_4CH_OPCODE_TRIG_DIR 30
#define FMC130M_4CH_NAME_TRIG_DIR "fmc130m_4ch_trig_dir"
#define FMC130M_4CH_OPCODE_TRIG_TERM 31
#define FMC130M_4CH_NAME_TRIG_TERM "fmc130m_4ch_trig_term"
#define FMC130M_4CH_OPCODE_TRIG_VAL 32
#define FMC130M_4CH_NAME_TRIG_VAL "fmc130m_4ch_trig_val"
#define FMC130M_4CH_OPCODE_AD9510_CFG_DEFAULTS 33
#define FMC130M_4CH_NAME_AD9510_CFG_DEFAULTS "fmc130m_4ch_ad9510_cfg_defaults"
#define FMC130M_4CH_OPCODE_AD9510_PLL_A_DIV 34
#define FMC130M_4CH_NAME_AD9510_PLL_A_DIV "fmc130m_4ch_ad9510_pll_a_div"
#define FMC130M_4CH_OPCODE_AD9510_PLL_B_DIV 35
#define FMC130M_4CH_NAME_AD9510_PLL_B_DIV "fmc130m_4ch_ad9510_pll_b_div"
#define FMC130M_4CH_OPCODE_AD9510_PLL_PRESCALER 36
#define FMC130M_4CH_NAME_AD9510_PLL_PRESCALER "fmc130m_4ch_ad9510_pll_prescaler"
#define FMC130M_4CH_OPCODE_AD9510_R_DIV 37
#define FMC130M_4CH_NAME_AD9510_R_DIV "fmc130m_4ch_ad9510_r_div"
#define FMC130M_4CH_OPCODE_AD9510_PLL_PDOWN 38
#define FMC130M_4CH_NAME_AD9510_PLL_PDOWN "fmc130m_4ch_ad9510_pll_pdown"
#define FMC130M_4CH_OPCODE_AD9510_MUX_STATUS 39
#define FMC130M_4CH_NAME_AD9510_MUX_STATUS "fmc130m_4ch_ad9510_mux_status"
#define FMC130M_4CH_OPCODE_AD9510_CP_CURRENT 40
#define FMC130M_4CH_NAME_AD9510_CP_CURRENT "fmc130m_4ch_ad9510_cp_current"
#define FMC130M_4CH_OPCODE_AD9510_OUTPUTS 41
#define FMC130M_4CH_NAME_AD9510_OUTPUTS "fmc130m_4ch_ad9510_outputs"
#define FMC130M_4CH_OPCODE_AD9510_PLL_CLK_SEL 42
#define FMC130M_4CH_NAME_AD9510_PLL_CLK_SEL "fmc130m_4ch_ad9510_pll_clk_sel"
#define FMC130M_4CH_OPCODE_SI571_SET_FREQ 43
#define FMC130M_4CH_NAME_SI571_SET_FREQ "fmc130m_4ch_si571_set_freq"
#define FMC130M_4CH_OPCODE_SI571_GET_DEFAULTS 44
#define FMC130M_4CH_NAME_SI571_GET_DEFAULTS "fmc130m_4ch_si571_get_defaults"
#define FMC130M_4CH_OPCODE_END 45
#define FMC130M_4CH_OPCODE_END 29
/* Messaging Reply OPCODES */
#define FMC130M_4CH_REPLY_TYPE uint32_t
......
src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_core.c
View file @ f5e8b6d3
......@@ -109,42 +109,25 @@ smio_fmc130m_4ch_t * smio_fmc130m_4ch_new (smio_t *parent)
/* Determine the type of the FMC130M_4CH board */
_smio_fmc130m_4ch_set_type (self, data_24aa64);
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch_core] Registering FMC_ADC_COMMON SMIO\n");
smio_register_sm (parent, 0x2403f569, FMC_130M_FMC_ADC_COMMON_REGS_OFFS, inst_id);
/* Now, initialize the FMC130M_4CH with the appropriate structures*/
if (self->type == TYPE_FMC130M_4CH_ACTIVE) {
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch_core] AD9510 initializing, "
"addr: 0x%08X, Inst ID: %u\n", fmc130m_4ch_ad9510_addr[inst_id],
inst_id);
self->smch_ad9510 = smch_ad9510_new (parent, FMC_130M_AD9510_SPI_OFFS,
fmc130m_4ch_ad9510_addr[inst_id], 0);
ASSERT_ALLOC(self->smch_ad9510, err_smch_ad9510_alloc);
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch_core] SI571 initializing, "
"addr: 0x%08X, Inst ID: %u\n", fmc130m_4ch_si571_addr[inst_id],
inst_id);
self->smch_si571 = smch_si57x_new (parent, FMC_130M_SI571_I2C_OFFS,
fmc130m_4ch_si571_addr[inst_id], 0);
ASSERT_ALLOC(self->smch_si571, err_smch_si571_alloc);
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch_core] Active Board detected. "
"Registering FMC_ADC_ACTIVE SMIO\n");
smio_register_sm (parent, 0x88c67d9c, FMC_130M_FMC_ACTIVE_CLK_OFFS, inst_id);
}
else { /* PASSIVE or Unsupported*/
if (self->type != TYPE_FMC130M_4CH_PASSIVE) {
DBE_DEBUG (DBG_SM_IO | DBG_LVL_WARN,
"[sm_io:fmc130m_4ch_core] Unsupported FMC130M_4CH card (maybe EEPROM not configured?).\n"
"\t Defaulting to PASSIVE board\n");
}
self->smch_ad9510 = NULL;
self->smch_si571 = NULL;
}
return self;
err_smch_si571_alloc:
if (self->smch_ad9510 != NULL) {
smch_ad9510_destroy (&self->smch_ad9510);
}
err_smch_ad9510_alloc:
smch_24aa64_destroy (&self->smch_24aa64);
err_smch_24aa64_alloc:
if (self->smch_pca9547 != NULL) {
smch_pca9547_destroy (&self->smch_pca9547);
......@@ -164,8 +147,6 @@ smio_err_e smio_fmc130m_4ch_destroy (smio_fmc130m_4ch_t **self_p)
if (*self_p) {
smio_fmc130m_4ch_t *self = *self_p;
smch_si57x_destroy (&self->smch_si571);
smch_ad9510_destroy (&self->smch_ad9510);
smch_24aa64_destroy (&self->smch_24aa64);
if (self->smch_pca9547 != NULL) {
......
src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_core.h
View file @ f5e8b6d3
......@@ -8,9 +8,6 @@
#ifndef _SM_IO_FMC130M_4CH_CORE_H_
#define _SM_IO_FMC130M_4CH_CORE_H_
#define SMIO_AD9510_HANDLER(smio_handler) ((smch_ad9510_t *) smio_handler->smch_ad9510)
#define SMIO_SI57X_HANDLER(smio_handler) ((smch_si57x_t *) smio_handler->smch_si571)
/* The follosing codes were generated via the following command:
* > echo FMC130M_4CH_ACTIVE | md5sum | cut -c 1-8
* > cb04db4d
......@@ -31,8 +28,6 @@ typedef enum {
typedef struct {
fmc130m_4ch_type_e type; /* FMC130M_4CH type */
smch_ad9510_t *smch_ad9510; /* AD9510 chip handler */
smch_si57x_t *smch_si571; /* SI571 chip handler */
smch_24aa64_t *smch_24aa64; /* 24AA64 chip handler */
smch_pca9547_t *smch_pca9547; /* FPGA I2C Switch */
} smio_fmc130m_4ch_t;
......
src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_defaults.c
View file @ f5e8b6d3
......@@ -55,36 +55,8 @@ smio_err_e fmc130m_4ch_config_defaults (char *broker_endp, char *service,
log_file_name, SMIO_FMC130M_4CH_LIBBPMCLIENT_LOG_MODE);
ASSERT_ALLOC(config_client, err_alloc_client);
client_err = bpm_set_fmc_pll_function (config_client, service, FMC130M_4CH_DFLT_PLL_FUNC);
ASSERT_TEST(client_err == BPM_CLIENT_SUCCESS, "Could not set FMC PLL function",
err_param_set, SMIO_ERR_CONFIG_DFLT);
/* Configure defaults here */
client_err = bpm_set_fmc_clk_sel (config_client, service, FMC130M_4CH_DFLT_CLK_SEL);
ASSERT_TEST(client_err == BPM_CLIENT_SUCCESS, "Could not set FMC CLK SEL function",
err_param_set, SMIO_ERR_CONFIG_DFLT);
client_err = bpm_set_trig_dir (config_client, service, FMC130M_4CH_DFLT_TRIG_DIR);
ASSERT_TEST(client_err == BPM_CLIENT_SUCCESS, "Could not set FMC TRIG DIR function",
err_param_set, SMIO_ERR_CONFIG_DFLT);
client_err = bpm_ad9510_cfg_defaults (config_client, service, 0);
ASSERT_TEST(client_err == BPM_CLIENT_SUCCESS ||
client_err == BPM_CLIENT_ERR_AGAIN, "Could not configure AD9510",
err_param_set, SMIO_ERR_CONFIG_DFLT);
client_err = bpm_set_si571_defaults (config_client, service, FMC130M_4CH_DFLT_SI57X_FOUT_FACTORY);
ASSERT_TEST(client_err == BPM_CLIENT_SUCCESS, "Could not get Si571 defaults",
err_param_set, SMIO_ERR_CONFIG_DFLT);
client_err = bpm_set_si571_set_freq (config_client, service, FMC130M_4CH_DFLT_SI57X_FOUT);
ASSERT_TEST(client_err == BPM_CLIENT_SUCCESS, "Could not set Si571 frequency",
err_param_set, SMIO_ERR_CONFIG_DFLT);
client_err = bpm_set_si571_oe (config_client, service, FMC130M_4CH_DFLT_SI571_OE);
ASSERT_TEST(client_err == BPM_CLIENT_SUCCESS, "Could not enable SI571 Output",
err_param_set, SMIO_ERR_CONFIG_DFLT);
err_param_set:
bpm_client_destroy (&config_client);
err_alloc_client:
DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO, "[sm_io:fmc130m_4ch_defaults] Exiting Config thread %s\n",
......
src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_defaults.h
View file @ f5e8b6d3
......@@ -9,17 +9,9 @@
#define _FMC130M_4CH_DEFAULTS_H_
#include "sm_io_err.h"
#include "chips/si57x_regs.h"
#include "sm_ch_pca9547.h"
#define FMC130M_4CH_DFLT_PLL_FUNC 0x1
#define FMC130M_4CH_DFLT_CLK_SEL 0x0 /* Clock from FMC front panel */
#define FMC130M_4CH_DFLT_TRIG_DIR 0x0 /* Output direction */
#define FMC130M_4CH_DFLT_PCA9547_CFG SMCH_PCA9547_NO_CHANNEL /* No channel selected */
#define FMC130M_4CH_DFLT_SI571_OE 0x1
#define FMC130M_4CH_DFLT_SI57X_FOUT_FACTORY SI57X_FOUT_FACTORY_DFLT
#define FMC130M_4CH_DFLT_SI57X_FOUT 113040445 /* 113.040445 MHz default */
smio_err_e fmc130m_4ch_config_defaults (char *broker_endp, char *service,
const char *log_file_name);
......
src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_exports.c
View file @ f5e8b6d3
......@@ -10,67 +10,6 @@
/* Description SMIO FMC130M_4CH functions */
disp_op_t fmc130m_4ch_leds_exp = {
.name = FMC130M_4CH_NAME_LEDS,
.opcode = FMC130M_4CH_OPCODE_LEDS,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_si571_oe_exp = {
.name = FMC130M_4CH_NAME_SI571_OE,
.opcode = FMC130M_4CH_OPCODE_SI571_OE,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_pll_func_exp = {
.name = FMC130M_4CH_NAME_PLL_FUNCTION,
.opcode = FMC130M_4CH_OPCODE_PLL_FUNCTION,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_pll_status_exp = {
.name = FMC130M_4CH_NAME_PLL_STATUS,
.opcode = FMC130M_4CH_OPCODE_PLL_STATUS,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_clk_sel_exp = {
.name = FMC130M_4CH_NAME_CLK_SEL,
.opcode = FMC130M_4CH_OPCODE_CLK_SEL,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_adc_rand_exp = {
.name = FMC130M_4CH_NAME_ADC_RAND,
.opcode = FMC130M_4CH_OPCODE_ADC_RAND,
......@@ -360,205 +299,8 @@ disp_op_t fmc130m_4ch_adc_dly3_exp = {
}
};
disp_op_t fmc130m_4ch_test_data_en_exp = {
.name = FMC130M_4CH_NAME_TEST_DATA_EN,
.opcode = FMC130M_4CH_OPCODE_TEST_DATA_EN,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_trig_dir_exp = {
.name = FMC130M_4CH_NAME_TRIG_DIR,
.opcode = FMC130M_4CH_OPCODE_TRIG_DIR,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_trig_term_exp = {
.name = FMC130M_4CH_NAME_TRIG_TERM,
.opcode = FMC130M_4CH_OPCODE_TRIG_TERM,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_trig_val_exp = {
.name = FMC130M_4CH_NAME_TRIG_VAL,
.opcode = FMC130M_4CH_OPCODE_TRIG_VAL,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_ad9510_cfg_defaults_exp = {
.name = FMC130M_4CH_NAME_AD9510_CFG_DEFAULTS,
.opcode = FMC130M_4CH_OPCODE_AD9510_CFG_DEFAULTS,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_ad9510_pll_a_div_exp = {
.name = FMC130M_4CH_NAME_AD9510_PLL_A_DIV,
.opcode = FMC130M_4CH_OPCODE_AD9510_PLL_A_DIV,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_ad9510_pll_b_div_exp = {
.name = FMC130M_4CH_NAME_AD9510_PLL_B_DIV,
.opcode = FMC130M_4CH_OPCODE_AD9510_PLL_B_DIV,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_ad9510_pll_prescaler_exp = {
.name = FMC130M_4CH_NAME_AD9510_PLL_PRESCALER,
.opcode = FMC130M_4CH_OPCODE_AD9510_PLL_PRESCALER,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_ad9510_r_div_exp = {
.name = FMC130M_4CH_NAME_AD9510_R_DIV,
.opcode = FMC130M_4CH_OPCODE_AD9510_R_DIV,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_ad9510_pll_pdown_exp = {
.name = FMC130M_4CH_NAME_AD9510_PLL_PDOWN,
.opcode = FMC130M_4CH_OPCODE_AD9510_PLL_PDOWN,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_ad9510_mux_status_exp = {
.name = FMC130M_4CH_NAME_AD9510_MUX_STATUS,
.opcode = FMC130M_4CH_OPCODE_AD9510_MUX_STATUS,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_ad9510_cp_current_exp = {
.name = FMC130M_4CH_NAME_AD9510_CP_CURRENT,
.opcode = FMC130M_4CH_OPCODE_AD9510_CP_CURRENT,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_ad9510_outputs_exp = {
.name = FMC130M_4CH_NAME_AD9510_OUTPUTS,
.opcode = FMC130M_4CH_OPCODE_AD9510_OUTPUTS,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_ad9510_pll_clk_sel_exp = {
.name = FMC130M_4CH_NAME_AD9510_PLL_CLK_SEL,
.opcode = FMC130M_4CH_OPCODE_AD9510_PLL_CLK_SEL,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_si571_set_freq_exp = {
.name = FMC130M_4CH_NAME_SI571_SET_FREQ,
.opcode = FMC130M_4CH_OPCODE_SI571_SET_FREQ,
.retval = DISP_ARG_END,
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_DOUBLE, double),
DISP_ARG_END
}
};
disp_op_t fmc130m_4ch_si571_get_defaults_exp = {
.name = FMC130M_4CH_NAME_SI571_GET_DEFAULTS,
.opcode = FMC130M_4CH_OPCODE_SI571_GET_DEFAULTS,
.retval = DISP_ARG_END,
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_DOUBLE, double),
DISP_ARG_END
}
};
/* Exported function description */
const disp_op_t *fmc130m_4ch_exp_ops [] = {
&fmc130m_4ch_leds_exp,
&fmc130m_4ch_si571_oe_exp,
&fmc130m_4ch_pll_func_exp,
&fmc130m_4ch_pll_status_exp,
&fmc130m_4ch_clk_sel_exp,
&fmc130m_4ch_adc_rand_exp,
&fmc130m_4ch_adc_dith_exp,
&fmc130m_4ch_adc_shdn_exp,
......@@ -583,22 +325,6 @@ const disp_op_t *fmc130m_4ch_exp_ops [] = {
&fmc130m_4ch_adc_dly1_exp,
&fmc130m_4ch_adc_dly2_exp,
&fmc130m_4ch_adc_dly3_exp,
&fmc130m_4ch_test_data_en_exp,
&fmc130m_4ch_trig_dir_exp,
&fmc130m_4ch_trig_term_exp,
&fmc130m_4ch_trig_val_exp,
&fmc130m_4ch_ad9510_cfg_defaults_exp,
&fmc130m_4ch_ad9510_pll_a_div_exp,
&fmc130m_4ch_ad9510_pll_b_div_exp,
&fmc130m_4ch_ad9510_pll_prescaler_exp,
&fmc130m_4ch_ad9510_r_div_exp,
&fmc130m_4ch_ad9510_pll_pdown_exp,
&fmc130m_4ch_ad9510_mux_status_exp,
&fmc130m_4ch_ad9510_cp_current_exp,
&fmc130m_4ch_ad9510_outputs_exp,
&fmc130m_4ch_ad9510_pll_clk_sel_exp,
&fmc130m_4ch_si571_set_freq_exp,
&fmc130m_4ch_si571_get_defaults_exp,
NULL
};
src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_exports.h
View file @ f5e8b6d3
......@@ -10,11 +10,6 @@
#include "disptable.h"
extern disp_op_t fmc130m_4ch_leds_exp;
extern disp_op_t fmc130m_4ch_si571_oe_exp;
extern disp_op_t fmc130m_4ch_pll_func_exp;
extern disp_op_t fmc130m_4ch_pll_status_exp;
extern disp_op_t fmc130m_4ch_clk_sel_exp;
extern disp_op_t fmc130m_4ch_adc_rand_exp;
extern disp_op_t fmc130m_4ch_adc_dith_exp;
extern disp_op_t fmc130m_4ch_adc_shdn_exp;
......@@ -39,22 +34,6 @@ extern disp_op_t fmc130m_4ch_adc_dly0_exp;
extern disp_op_t fmc130m_4ch_adc_dly1_exp;
extern disp_op_t fmc130m_4ch_adc_dly2_exp;
extern disp_op_t fmc130m_4ch_adc_dly3_exp;
extern disp_op_t fmc130m_4ch_test_data_en_exp;
extern disp_op_t fmc130m_4ch_trig_dir_exp;
extern disp_op_t fmc130m_4ch_trig_term_exp;
extern disp_op_t fmc130m_4ch_trig_val_exp;
extern disp_op_t fmc130m_4ch_ad9510_cfg_defaults_exp;
extern disp_op_t fmc130m_4ch_ad9510_pll_a_div_exp;
extern disp_op_t fmc130m_4ch_ad9510_pll_b_div_exp;
extern disp_op_t fmc130m_4ch_ad9510_pll_prescaler_exp;
extern disp_op_t fmc130m_4ch_ad9510_r_div_exp;
extern disp_op_t fmc130m_4ch_ad9510_pll_pdown_exp;
extern disp_op_t fmc130m_4ch_ad9510_mux_status_exp;
extern disp_op_t fmc130m_4ch_ad9510_cp_current_exp;
extern disp_op_t fmc130m_4ch_ad9510_outputs_exp;
extern disp_op_t fmc130m_4ch_ad9510_pll_clk_sel_exp;
extern disp_op_t fmc130m_4ch_si571_set_freq_exp;
extern disp_op_t fmc130m_4ch_si571_get_defaults_exp;
extern const disp_op_t *fmc130m_4ch_exp_ops [];
......
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