This is needed as we use a custom mapping between
board/bpm and the bpm_id used to spawn EPICS IOC
processes.

Now, we don't map our hash with <pattern>/afe or
<pattern>/dbe, just <pattern> is enough and we
split different configuration options in hash
structure fields.

Now, we don't specify the configuration filename
through the Makefile, but in the command-line of
dev_mngr.

This option is only valid if daemonize parameter
is "yes".

This is not needed anymore as we use system
services

This allows us to selective spawn the broker.
Useful in cases that the broker is an independent
system service, as Malamute.

This is related to commits a0f3f992 and 9d80fdf5

We were not multiplying the sample size by the
number of samples to give the number of total bytes
per block.

blink_leds and ad9510_cfg_defaults were not using
our simple messaging protocol, which causes some
confusion for the client programmer, as well as
for libbpmclient.

The timeout variable must support negative numbers, -1,
meaning an infinite wait.

Now, we can stop the acquisition FSM.
This is useful if we are acquiring data in
triggered mode and we want to abort the
acquisition.

For now, we reset the FPGA on PCIe open.

For now, enabling synthetic data on the FMC130
module, we can acquire consecutive data and check
if the output file is correct with these functions.

As we were not acquiring from non-paged aligned
address (only skip trigger acquisition was used),
we didn't see the possible errors coming from this.

The first one is the start address. On the first
read, we need to check for page size overflow.
If this occurs, the remaining bytes need to be read
from the next page.

Secondly, the output data pointer was not being
updated to account for split (from 2 consecutive pages)
reads. Without this, we were copying data to the wrong
destination address.

The acquisition address can wrap in two places.

The first of them is when calculation the start
of the acquisition, which could be wrapped if
the acquisition module waited too long for the
trigger.

The second place is in adding the block offset
to the start address. This could wrap in the end
of the memory space.

0 is a valid valid for the FPGA, so we changed
it here.

This function accepts any integer number from
0 to 2^32-1 and generates a pulse in the FPGA,
regardless of the number.