Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
C
Conv RS485 OPT RTM
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
2
Issues
2
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Conv RS485 OPT RTM
Commits
48cecac4
Commit
48cecac4
authored
Mar 20, 2019
by
Dimitris Lampridis
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
test02: improve sub-test names
parent
69f454c8
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
6 additions
and
6 deletions
+6
-6
test02.py
pts/python/tests/test02.py
+6
-6
No files found.
pts/python/tests/test02.py
View file @
48cecac4
...
@@ -98,9 +98,9 @@ def main (card=None, default_directory='.',suite=None, serial=""):
...
@@ -98,9 +98,9 @@ def main (card=None, default_directory='.',suite=None, serial=""):
test_results
=
{}
test_results
=
{}
test_results
[
'PLL LEDs'
]
=
1
test_results
[
'PLL LEDs'
]
=
1
test_results
[
'
Ms errors
'
]
=
1
test_results
[
'
Check CTR MS
'
]
=
1
test_results
[
'
PLL errors
'
]
=
1
test_results
[
'
Check CTR PLL
'
]
=
1
test_results
[
'
Missed error
s'
]
=
1
test_results
[
'
Check CTR frame
s'
]
=
1
###############################################################################
###############################################################################
############################ actual test ######################################
############################ actual test ######################################
...
@@ -140,17 +140,17 @@ def main (card=None, default_directory='.',suite=None, serial=""):
...
@@ -140,17 +140,17 @@ def main (card=None, default_directory='.',suite=None, serial=""):
for
i
in
range
(
0
,
4
):
for
i
in
range
(
0
,
4
):
if
(
ms1
[
i
]
!=
ms2
[
i
]):
if
(
ms1
[
i
]
!=
ms2
[
i
]):
test_results
[
'
Ms errors
'
]
=
0
test_results
[
'
Check CTR MS
'
]
=
0
util
.
err_msg
(
"Module
%
s: Ms errors detected ({
%
s} != {
%
s})"
%
util
.
err_msg
(
"Module
%
s: Ms errors detected ({
%
s} != {
%
s})"
%
(
i
+
1
,
ms2
[
i
],
ms1
[
i
]))
(
i
+
1
,
ms2
[
i
],
ms1
[
i
]))
if
(
pll1
[
i
]
!=
pll2
[
i
]):
if
(
pll1
[
i
]
!=
pll2
[
i
]):
test_results
[
'
PLL errors
'
]
=
0
test_results
[
'
Check CTR PLL
'
]
=
0
util
.
err_msg
(
"Module
%
s: PLL errors detected ({
%
s} != {
%
s})"
%
util
.
err_msg
(
"Module
%
s: PLL errors detected ({
%
s} != {
%
s})"
%
(
i
+
1
,
pll2
[
i
],
pll1
[
i
]))
(
i
+
1
,
pll2
[
i
],
pll1
[
i
]))
if
(
miss1
[
i
]
!=
miss2
[
i
]):
if
(
miss1
[
i
]
!=
miss2
[
i
]):
test_results
[
'
Missed error
s'
]
=
0
test_results
[
'
Check CTR frame
s'
]
=
0
util
.
err_msg
(
"Module
%
s: Missed errors detected ({
%
s} != {
%
s})"
%
util
.
err_msg
(
"Module
%
s: Missed errors detected ({
%
s} != {
%
s})"
%
(
i
+
1
,
miss2
[
i
],
miss1
[
i
]))
(
i
+
1
,
miss2
[
i
],
miss1
[
i
]))
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment