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Added a report of issues found in CONV-TTL-BLO V1. To be finished tomorrow.

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%%This is a very basic article template.
%%There is just one section and two subsections.
\documentclass[a4paper,11pt]{article}
\usepackage{graphicx}
\usepackage[colorlinks= true]{hyperref}
\usepackage{color}
\usepackage{tabularx}
\begin{document}
\hypersetup{
pdfborder = 0 0 0 1,
colorlinks = true,
linkcolor = black,
urlcolor = blue,
pdftitle = {Issues in EDA-02446-V1-0},
pdfauthor = {Carlos Gil Soriano},
pdfsubject = {Issues report in EDA-02446-V1-0},
pdfkeywords = {Blocking, EDA-02446, CONV-TTL-BLO}
}
\title{\textbf{Report of issues in CONV-TTL-BLO v1.0\\
EDA-02446-V1-0}}
\author{Carlos Gil Soriano\\BE-CO-HT\\
\href{mailto:carlos.gil.soriano@cern.ch}{
\textbf{\textit{carlos.gil.soriano@cern.ch}}}}
\date{October 2, 2012}
\maketitle
\thispagestyle{empty}
\begin{figure}[htb]
\begin{center}
\includegraphics[scale=0.25,
keepaspectratio]{../../../../doc/OHWR/Pictures/Figures/CERN-Logo.png}
\end{center}
\end{figure}
\begin{abstract}
CONV-TTL-BLO V1-0, internally named as
\href{https://edms.cern.ch/nav/P:EDA-02446:V0/I:EDA-02446-V1-0:V0/TAB4}{\textbf{EDA-02446-V1-0}}, has several \textbf{bugs to be
fixed in V2}. The present report covers them all.
\end{abstract}
\vspace{2cm}
\begin{center}
\begin{tabular}{|p{2.5cm}|p{3.5cm}|p{3cm}|}
\hline
\multicolumn{3}{|c|}{\textbf{Revision history}}\\
\hline
\hline
\textbf{HDL version} & \textbf{Module} & \textbf{Date}\\
\hline
1.0 & Initial report & October 2, 2012\\
\hline
\end{tabular}
\end{center}
\pagebreak
\tableofcontents
\pagebreak
\listoftables
\pagebreak
\section{Power supply 24 volts}
Some resistors and capacitors should be changed to achieved better stability in
the 24 volts power supply rail.\\
\begin{table}[!htb]
\begin{center}
\newcolumntype{R}{>{\raggedleft\arraybackslash}X}%
\begin{tabularx}{13cm}{|l|R|}
\hline
\textbf{OHWR issues 452, 455, 458 } & \url{http://www.ohwr.org/issues/458}\\
\hline
\hline
\multicolumn{2}{|l|}{
\begin{minipage}[t]{0.95\columnwidth}%
After carefully checking the design (against the calculations provided by
TI in its datasheet and SwitcherPro Desktop for checking the gain and phase
margin) some modifications are submitted for an improved control of the 24V
rail.
\vspace{0.125cm}
\end{minipage}}\\
\hline
\multicolumn{2}{|l|}{
\begin{minipage}[t]{0.95\columnwidth}%
\vspace{0.125cm}
\textbf{DESIGN VALUES}
\begin{itemize}
\item Switching Frecuency: 475Khz
\item Crossover Frecuency: 23.75KHz
\item Vin : 12V
\item Vout : 24V
\item Feedback network: R$_{high}$ 50K, R$_{low}$ 1K51
\item Compensation network: R$_{comp}$ 13K35, C$_{comp}$
4.7$\mu$F, C$_{pole}$ 68$\mu$F (upto 100$\mu$F)
\item RC network: R$_{RC}$ 335K, C$_{RC}$ 100pF
\end{itemize}
\vspace{0.0625cm}
\end{minipage}}\\
\hline
\end{tabularx}
\caption{Issue 458: 24 volts power supply}
\end{center}
\end{table}
\textbf{CHANGES OF COMPONENTS}\\
\begin{center}
\begin{tabular}{|c|c|}
\hline
\multicolumn{2}{|c|}{\textbf{R$_{high}$}}\\
\hline
\hline
\textbf{Resistor} & \textbf{Value} \\
\hline
R231 & not changed (10K) \\
\hline
R232 & not changed (10K) \\
\hline
R233 & not changed (10K) \\
\hline
R235 & not changed (10K) \\
\hline
R234 & 4K7 changed to 10K \\
\hline
\end{tabular}
\vspace{0.5cm}
\begin{tabular}{|c|c|}
\hline
\multicolumn{2}{|c|}{\textbf{R$_{low}$}}\\
\hline
\hline
\textbf{Resistor} & \textbf{Value} \\
\hline
R229 & 100 changed to 510R \\
\hline
R230 & 4K7 changed to 1K \\
\hline
\end{tabular}
\vspace{0.5cm}
\begin{tabular}{|c|c|}
\hline
\multicolumn{2}{|c|}{\textbf{R$_{comp}$}}\\
\hline
\hline
\textbf{Resistor} & \textbf{Value} \\
\hline
R254 & 10K changed to 4K7 \\
\hline
R255 & 10K changed to 4K7 \\
\hline
R256 & 10K changed to 1K \\
\hline
R257 & 10K changed to 100R\\
\hline
R258 & not changed (10K) \\
\hline
\end{tabular}
\vspace{0.5cm}
\begin{tabular}{|c|c|}
\hline
\multicolumn{2}{|c|}{\textbf{C$_{comp}$}}\\
\hline
\hline
\textbf{Capacitor} & \textbf{Value} \\
\hline
C45 & not changed (4.7 $\mu$F)\\
\hline
\end{tabular}
\vspace{0.5cm}
\begin{tabular}{|c|c|}
\hline
\multicolumn{2}{|c|}{\textbf{C$_{pole}$}}\\
\hline
\hline
\textbf{Capacitor} & \textbf{Value} \\
\hline
C190 & 100pF removed\\
\hline
C191 & 100pF changed to 68pF\\
& (100pF can be used, as well)\\
\hline
\end{tabular}
\vspace{0.5cm}
\begin{tabular}{|c|c|}
\hline
\multicolumn{2}{|c|}{\textbf{R$_{RC}$}}\\
\hline
\hline
\textbf{Resistor} & \textbf{Value} \\
\hline
R261 & 470K changed to 100K\\
\hline
R262 & not changed (470K)\\
\hline
R263 & not changed (470K)\\
\hline
\end{tabular}
\vspace{0.5cm}
\begin{tabular}{|c|c|}
\hline
\multicolumn{2}{|c|}{\textbf{C$_{RC}$}}\\
\hline
\hline
\textbf{Capacitor} & \textbf{Value} \\
\hline
C196 & not changed (100pF)\\
\hline
\end{tabular}
\vspace{0.5cm}
\begin{tabular}{|c|c|}
\hline
\multicolumn{2}{|c|}{\textbf{R$_{isns}$}}\\
\hline
\hline
\textbf{Resistor} & \textbf{Value} \\
\hline
R259 & 100R changed to 1K\\
\hline
\end{tabular}
\vspace{0.5cm}
\begin{tabular}{|c|c|}
\hline
\multicolumn{2}{|c|}{\textbf{Output ceramic capacitors}}\\
\hline
\hline
\textbf{Capacitor} & \textbf{Value} \\
\hline
C192 & removed\\
\hline
C193 & removed\\
\hline
C189 & removed\\
\hline
\end{tabular}
\end{center}
\pagebreak
\section{Power line filter to be added}
\begin{table}[!htb]
\begin{center}
\newcolumntype{R}{>{\raggedleft\arraybackslash}X}%
\begin{tabularx}{13cm}{|l|R|}
\hline
\textbf{OHWR issue 517} & \url{http://www.ohwr.org/issues/517}\\
\hline
\hline
\multicolumn{2}{|l|}{
\begin{minipage}[t]{0.95\columnwidth}%
In CONV-TLL-BLO v1 no power supply filters are mounted.
Due to the logic families used in the design, noise in the vicinity of
60MHz to 150MHz was expected. Spectral measurements in the power rails
and FFT null-magnetic tests checked the presence of this noise.
Thus, a filter schema for this band is needed. The following simple
solution consisting of a one-stage pi filter with the following values:
\begin{itemize}
\item Capacitor to external power rails: 22$\mu$F ceramic
\item Capacitor to board input power rails: 150$\mu$F OSCON
\item Inductor: Murata BLM41PG181SN1L
\end{itemize}
This filter stage is mounted in CONV-TTL-RS485, as well.\\
\end{minipage}}\tabularnewline
\hline
\end{tabularx}
\caption{Issue 517: Power line filter}
\end{center}
\end{table}
\section{Optoisolator resistor}
\begin{table}[!htb]
\begin{center}
\newcolumntype{R}{>{\raggedleft\arraybackslash}X}%
\begin{tabularx}{13cm}{|l|R|}
\hline
\textbf{OHWR issue 520} & \url{http://www.ohwr.org/issues/520}\\
\hline
\hline
\multicolumn{2}{|l|}{
\begin{minipage}[t]{0.95\columnwidth}%
Blocking input should change the value of one resistor to reduce
degradations of diode in the optoisolator.
Taking EDA schematics document as reference and going to page 10. R222
resistor, which is 100R must be replaced for 1K. Thus, a maximum value
of 22 mA is driven into the LED of the optoisolator.
Do the same for R227,R219, R217, R215 and R226.
\end{minipage}}\tabularnewline
\hline
\end{tabularx}
\caption{Issue 520: Optoisolator resistor}
\end{center}
\end{table}
\textbf{CHANGES OF COMPONENTS}\\
\begin{center}
\begin{tabular}{|c|c|}
\hline
\textbf{Resistor} & \textbf{Value} \\
\hline
\hline
R215 & 100R changed to 1K \\
\hline
R217 & 100R changed to 1K \\
\hline
R219 & 100R changed to 1K \\
\hline
R222 & 100R changed to 1K \\
\hline
R226 & 100R changed to 1K \\
\hline
R227 & 100R changed to 1K \\
\hline
\end{tabular}
\end{center}
\section{Bad VME64x connections}
It represents a problem when other boards try to use the bus granted pins or
interrupt acknowledge lines.
\begin{table}[!htb]
\begin{center}
\newcolumntype{R}{>{\raggedleft\arraybackslash}X}%
\begin{tabularx}{13cm}{|l|R|}
\hline
\textbf{OHWR issue 502} & \url{http://www.ohwr.org/issues/502}\\
\hline
\hline
\multicolumn{2}{|l|}{
\begin{minipage}[t]{0.95\columnwidth}%
Some VME64 lines are misconnected.
Daisy-chain \textit{BGxIN\_N}, \textit{BGxOUT\_N} and \textit{IACKIN\_N},
\textit{IACKOUT\_N}.
\end{minipage}}\tabularnewline
\hline
\end{tabularx}
\caption{Issue 502: VME64x misconnections}
\end{center}
\end{table}
\section{Blocking driver stage}
\subsection{Misconnection of output enable pin}
\begin{table}[!htb]
\begin{center}
\newcolumntype{R}{>{\raggedleft\arraybackslash}X}%
\begin{tabularx}{13cm}{|l|R|}
\hline
\textbf{OHWR issue 463} & \url{http://www.ohwr.org/issues/463}\\
\hline
\hline
\multicolumn{2}{|l|}{
\begin{minipage}[t]{0.95\columnwidth}%
In IC3, there's a bad net name yielding into an unwanted floating pin (pin 13).
The net name in the corresponding schematic page must be changed.
\end{minipage}}\tabularnewline
\hline
\end{tabularx}
\caption{Issue 463: bad net name in IC3}
\end{center}
\end{table}
\textbf{CHANGES IN SCHEMATICS}\\
\begin{center}
\begin{tabular}{|c|c|}
\hline
\multicolumn{2}{|c|}{\textbf{IC3}}\\
\hline
\hline
\textbf{Pin number} & \textbf{Value} \\
\hline
13 & OE\_N\_ANTIGLITCH changed to\\
& ANTIGLITCH\_OE\_N\\
\hline
\end{tabular}
\end{center}
\pagebreak
\section{Blocking module}
\section{Square LED array}
\begin{table}[!htb]
\begin{center}
\newcolumntype{R}{>{\raggedleft\arraybackslash}X}%
\begin{tabularx}{13cm}{|l|R|}
\hline
\textbf{OHWR issue 570} & \url{http://www.ohwr.org/issues/570}\\
\hline
\hline
\multicolumn{2}{|l|}{
\begin{minipage}[t]{0.95\columnwidth}%
The front panel three LED array will be changed by a Dialight 568 model.
This model is a bicolour (red-green) 4-LEDs array, which will be
driven by a VME buffer to reduce BOM.
Already done in CONV-TTL-RS485.\\
\end{minipage}}\tabularnewline
\hline
\end{tabularx}
\caption{Issue 570: square LED array}
\end{center}
\end{table}
\pagebreak
\section{Other issues}
\subsection{Board Test Points}
\begin{table}[!htb]
\begin{center}
\newcolumntype{R}{>{\raggedleft\arraybackslash}X}%
\begin{tabularx}{13cm}{|l|R|}
\hline
\textbf{OHWR issue 449} & \url{http://www.ohwr.org/issues/449}\\
\hline
\hline
\multicolumn{2}{|l|}{
\begin{minipage}[t]{0.95\columnwidth}%
Test points should not be mounted in production boards.
\end{minipage}}\tabularnewline
\hline
\end{tabularx}
\caption{Issue 449: Test points}
\end{center}
\end{table}
\subsection{White Rabbit connector in front panel}
It has been detected in different boards (such as WR repetitors) that the
WR hole in the front pannel was not properly designed.\\
It seems that the current size and spacing of the WR connector is OK in V1,
however the issue is reported below:
\begin{table}[!htb]
\begin{center}
\newcolumntype{R}{>{\raggedleft\arraybackslash}X}%
\begin{tabularx}{13cm}{|l|R|}
\hline
\textbf{OHWR issue 450} & \url{http://www.ohwr.org/issues/450}\\
\hline
\hline
\multicolumn{2}{|l|}{
\begin{minipage}[t]{0.95\columnwidth}%
WR connector socket should be rechecked for better plugging quality.
\end{minipage}}\tabularnewline
\hline
\end{tabularx}
\caption{Issue 450: WR connector in front panel}
\end{center}
\end{table}
\subsection{Components not to be mounted}
\begin{table}[!htb]
\begin{center}
\newcolumntype{R}{>{\raggedleft\arraybackslash}X}%
\begin{tabularx}{13cm}{|l|R|}
\hline
\textbf{OHWR issue 501} & \url{http://www.ohwr.org/issues/501}\\
\hline
\hline
\multicolumn{2}{|l|}{
\begin{minipage}[t]{0.95\columnwidth}%
Resistor R98 should not be mounted.\\
Resistor R137 should not be mounted.\\
\end{minipage}}\tabularnewline
\hline
\end{tabularx}
\caption{Issue 501: not to be mounted resistors}
\end{center}
\end{table}
\pagebreak
\subsection{Protection for misconnections of the inputs}
A double control mechanism must be added in the FPGA to avoid damage in the
Blocking output stage.\\
\begin{table}[!htb]
\begin{center}
\newcolumntype{R}{>{\raggedleft\arraybackslash}X}%
\begin{tabularx}{13cm}{|l|R|}
\hline
\textbf{OHWR issue 503} & \url{http://www.ohwr.org/issues/503}\\
\hline
\hline
\multicolumn{2}{|l|}{
\begin{minipage}[t]{0.95\columnwidth}%
If the all the input channels of the board are connected to a high level and
the RTM outputs are all parallel terminated to 50 Ohms the 24V power supply
will blow up.
To avoid this, some control must be added in the FPGA, first to detect and then to report via I2C. A protection fuse is currently not installed in the 12V
rail. It's needed.\\
\end{minipage}}\tabularnewline
\hline
\end{tabularx}
\caption{Issue 503: Protection for misconnections of the inputs}
\end{center}
\end{table}
The proposal is to trigger event upon edge detection, and measure the level of
the inputs to report problems back through the I2C connection.\\
\subsection{12 volts fuse to be added}
\begin{table}[!htb]
\begin{center}
\newcolumntype{R}{>{\raggedleft\arraybackslash}X}%
\begin{tabularx}{13cm}{|l|R|}
\hline
\textbf{OHWR issue 504} & \url{http://www.ohwr.org/issues/504}\\
\hline
\hline
\multicolumn{2}{|l|}{
\begin{minipage}[t]{0.95\columnwidth}%
After writing down a list of test to be performed, it was found that some
configurations can harm the board.
If all the inputs are connected to '1', the FPGA is programmed to generated a
periodic signal of 3us with 50\% duty cycle. If all the outputs are terminated
with 50 Ohms, irreversible damage will be caused to the 24V Power Supply.
The power supply is able to provide 2.5 A (and up to 3.5A) in 24V. A fuse
targeted to solve that problem must be placed in the 12V rail.\\
\end{minipage}}\tabularnewline
\hline
\end{tabularx}
\caption{Issue 504: 12 volts fuse to be added}
\end{center}
\end{table}
\pagebreak
\subsection{Add silkscreen for fuses}
\begin{table}[!htb]
\begin{center}
\newcolumntype{R}{>{\raggedleft\arraybackslash}X}%
\begin{tabularx}{13cm}{|l|R|}
\hline
\textbf{OHWR issue 505} & \url{http://www.ohwr.org/issues/505}\\
\hline
\hline
\multicolumn{2}{|l|}{
\begin{minipage}[t]{0.95\columnwidth}%
It should be added an easy to read silkscreen for every fuse in next V2
board.\\
\end{minipage}}\tabularnewline
\hline
\end{tabularx}
\caption{Issue 505: add silkcreen for fuses}
\end{center}
\end{table}
%\begin{table}[!htb]
% \begin{center}
% \newcolumntype{R}{>{\raggedleft\arraybackslash}X}%
% \begin{tabularx}{13cm}{|l|R|}
% \hline
% \textbf{OHWR issue } & \url{http://www.ohwr.org/issues/449}\\
% \hline
% \hline
% \multicolumn{2}{|l|}{
% \begin{minipage}[t]{0.95\columnwidth}%
% a very long line a very long line a very long line a very long line
% a very long line a very long line a very long line a very long line
% a very long line a very long line a very long line %
% \end{minipage}}\tabularnewline
% \hline
% \end{tabularx}
% \caption{Issue }
% \end{center}
%\end{table}
\end{document}
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