Skip to content

C
Conv TTL Blocking
Commit 35f18779 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana
Browse files
Options

working on vbcp extension

parent 014c56c3
Hide whitespace changes
Inline Side-by-side
Showing with 144 additions and 60 deletions
test/multiboot/multiboot.py
View file @ 35f18779
...@@ -39,31 +39,58 @@ sys.path.append("../vbcp") ...@@ -39,31 +39,58 @@ sys.path.append("../vbcp")
from vbcp import * from vbcp import *
def spi_transfer(cs, dat): def spi_transfer(cs, dat):
retval = 0; retval = 0
ctb.write(0x90, (((cs << 10) | 0x100) | dat)) wval = []
if isinstance(dat,int):
wval.append(dat)
wval.append((cs<<2)|1)
wval.append(0)
wval.append(0)
else:
for i in xrange(len(dat)):
wval.append(dat[i])
wval.append((cs<<2)|1)
wval.append(0)
wval.append(0)
ctb.write(0x90, wval)
while (retval & (1 << 9) == 0): while (retval & (1 << 9) == 0):
retval = ctb.read(0x90) retval = ctb.read(0x90)
print retval
return retval & 0xFF return retval & 0xFF
# ctb.write(0x90, [(((cs << 10) | 0x100) | d) for d in dat])
# while (retval & (1 << 9) == 0):
# retval = ctb.read(0x90)
# return retval & 0xFF
def flash_write(addr, dat): def flash_write(addr, dat):
spi_transfer(0,0) spi_transfer(0,0)
spi_transfer(1,0x06) spi_transfer(1,0x06)
spi_transfer(0,0) spi_transfer(0,0)
spi_transfer(1,0x02) spi_transfer(1,[0x02,(addr & 0xFF0000) >> 16])
spi_transfer(1,(addr & 0xFF0000) >> 16) spi_transfer(1,[(addr & 0xFF00) >> 8, (addr & 0xFF)])
spi_transfer(1,(addr & 0xFF00) >> 8) for i in xrange(len(dat)/2):
spi_transfer(1,(addr & 0xFF)) spi_transfer(1,[dat[i],dat[i+1]])
for i in range(len(dat)):
spi_transfer(1,dat[i])
spi_transfer(0,0) spi_transfer(0,0)
# spi_transfer(0,0)
# spi_transfer(1,0x06)
# spi_transfer(0,0)
# spi_transfer(1,0x02)
# spi_transfer(1,(addr & 0xFF0000) >> 16)
# spi_transfer(1,(addr & 0xFF00) >> 8)
# spi_transfer(1,(addr & 0xFF))
# for i in range(len(dat)):
# spi_transfer(1,dat[i])
# spi_transfer(0,0)
def flash_read(addr, nrbytes): def flash_read(addr, nrbytes):
ret = [] ret = []
spi_transfer(0,0) spi_transfer(0,0)
spi_transfer(1,0x0b) #spi_transfer(1,0x0b)
spi_transfer(1,(addr & 0xFF0000) >> 16) #spi_transfer(1,(addr & 0xFF0000) >> 16)
spi_transfer(1,(addr & 0xFF00) >> 8) #spi_transfer(1,(addr & 0xFF00) >> 8)
spi_transfer(1,(addr & 0xFF)) #spi_transfer(1,(addr & 0xFF))
spi_transfer(1,[0x0b, (addr & 0xFF0000) >> 16])
spi_transfer(1,[(addr & 0xFF00) >> 8, (addr & 0xFF)])
spi_transfer(1,0) spi_transfer(1,0)
for i in range(nrbytes): for i in range(nrbytes):
ret.append(spi_transfer(1,0)) ret.append(spi_transfer(1,0))
...@@ -71,14 +98,15 @@ def flash_read(addr, nrbytes): ...@@ -71,14 +98,15 @@ def flash_read(addr, nrbytes):
return ret return ret
def flash_serase(addr): def flash_serase(addr):
ret = []
spi_transfer(0,0) spi_transfer(0,0)
spi_transfer(1,0x06) spi_transfer(1,0x06)
spi_transfer(0,0) spi_transfer(0,0)
spi_transfer(1,0xd8) #spi_transfer(1,0xd8)
spi_transfer(1,(addr & 0xFF0000) >> 16) #spi_transfer(1,(addr & 0xFF0000) >> 16)
spi_transfer(1,(addr & 0xFF00) >> 8) #spi_transfer(1,(addr & 0xFF00) >> 8)
spi_transfer(1,(addr & 0xFF)) #spi_transfer(1,(addr & 0xFF))
spi_transfer(1,[0xd8, (addr & 0xFF0000) >> 16])
spi_transfer(1,[(addr & 0xFF00) >> 8, (addr & 0xFF)])
spi_transfer(0,0) spi_transfer(0,0)
def flash_berase(): def flash_berase():
...@@ -152,48 +180,57 @@ if __name__ == "__main__": ...@@ -152,48 +180,57 @@ if __name__ == "__main__":
rd = "".join(["0x%02X " % b for b in rd]) rd = "".join(["0x%02X " % b for b in rd])
print rd print rd
print "ERASE" # print "ERASE"
te1 = time.time() # te1 = time.time()
flash_serase(0x0010) # flash_serase(0x0010)
while (flash_rsr() & 0x01): # while (flash_rsr() & 0x01):
pass # pass
te2 = time.time() # te2 = time.time()
print "erase time: %2.6f" % (te2-te1) # print "erase time: %2.6f" % (te2-te1)
print "WRITE" # print "WRITE"
f = open("conv.txt",'r') # f = open("conv.txt",'r')
addr = 0 # addr = 0
tdat = [] # tdat = []
twr = [] # twr = []
twa = [] # twa = []
for fdata in f: # te = []
print addr # for fdata in f:
data = [] # print addr
try: # data = []
t1 = time.time() # if not (addr % 0x10000):
for i in xrange(256): # print 'erase'
data.append(int(fdata[0:2],16)) # te1 = time.time()
fdata = fdata[2:] # flash_serase(addr)
t2 = time.time() # while (flash_rsr() & 0x01):
except ValueError: # pass
print "reached end" # te2 = time.time()
break # te.append(te2-te1)
finally: # try:
t3 = time.time() # t1 = time.time()
flash_write(addr, data) # for i in xrange(256):
t4 = time.time() # data.append(int(fdata[0:2],16))
while (flash_rsr() & 0x01): # fdata = fdata[2:]
pass # t2 = time.time()
t5 = time.time() # except ValueError:
addr += 256 # print "reached end"
if (addr == 256**2): # break
break; # finally:
tdat.append(t2-t1) # t3 = time.time()
twr.append(t4-t3) # flash_write(addr, data)
twa.append(t5-t4) # t4 = time.time()
# while (flash_rsr() & 0x01):
#print data # pass
#print len(data) # t5 = time.time()
# addr += 256
# if (addr == 256**2):
# break;
# tdat.append(t2-t1)
# twr.append(t4-t3)
# twa.append(t5-t4)
#
# #print data
# #print len(data)
# Close file handle # Close file handle
f.close() f.close()
......
test/test.py 0 → 100644
View file @ 35f18779
def write(addr, val):
reg = addr/4 + 1
sl = 0xb6 #(0x40 | ((~slot) & 0x1f)) << 1
print '%02x' % sl
cmd = "iic4wr %x %x %x %s\r\n" % (sl, (addr & 0xff00) >> 8, addr & 0xff, ' '.join(format(b,'x') for b in val))
print cmd
def spi_transfer(cs, dat):
retval = 0
wval = []
if isinstance(dat,int):
wval.append(dat)
wval.append((cs<<2)|1)
wval.append(0)
wval.append(0)
else:
for i in xrange(len(dat)):
wval.append(dat[i])
wval.append((cs<<2)|1)
wval.append(0)
wval.append(0)
write(0x90, wval)
# while (retval & (1 << 9) == 0):
# retval = read(0x90)
# return retval & 0xFF
def flash_write(addr, dat):
spi_transfer(0,0)
spi_transfer(1,0x06)
spi_transfer(0,0)
spi_transfer(1,0x02)
spi_transfer(1,(addr & 0xFF0000) >> 16)
spi_transfer(1,(addr & 0xFF00) >> 8)
spi_transfer(1,(addr & 0xFF))
for i in range(len(dat)):
spi_transfer(1,dat[i])
spi_transfer(0,0)
if __name__ == "__main__":
for addr in range(0, 0xf0000, 256):
print '%x' % addr
if not (addr % 0x10000):
print 'erase'
# dat = [1,2]
# spi_transfer(1, dat)
test/vbcp/vbcp.py
View file @ 35f18779
...@@ -79,7 +79,7 @@ class VBCP: ...@@ -79,7 +79,7 @@ class VBCP:
reg = addr/4 + 1 reg = addr/4 + 1
sl = (0x40 | ((~self.slot) & 0x1f)) << 1 sl = (0x40 | ((~self.slot) & 0x1f)) << 1
print '%02x' % sl print '%02x' % sl
cmd = "iic4wr %x %x %x %x %x %x %x %x %x %x %x\r\n" % (sl, (addr & 0xff00) >> 8, addr & 0xff, val[0], val[1], val[2], val[3], val[4], val[5], val[6], val[7]) cmd = "iic4wr %x %x %x %s\r\n" % (sl, (addr & 0xff00) >> 8, addr & 0xff, ' '.join(format(b,'x') for b in val))
print cmd print cmd
#cmd = "writereg %d %d %x\r\n" % (self.slot, reg, val) #cmd = "writereg %d %d %x\r\n" % (self.slot, reg, val)
self.handle.send(cmd) self.handle.send(cmd)
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment