Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
C
Conv TTL Blocking
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
5
Issues
5
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Conv TTL Blocking
Commits
65ced44e
Commit
65ced44e
authored
Nov 16, 2012
by
Carlos Gil Soriano
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Added missed files before merging. Some .do files for the waveforms.
parent
a9e62b25
Show whitespace changes
Inline
Side-by-side
Showing
4 changed files
with
126 additions
and
113 deletions
+126
-113
project.xise
hdl/i2c_slave_wb_master/project/project.xise
+9
-9
wave.do
hdl/i2c_slave_wb_master/project/waveform/wave.do
+54
-24
wave.do
hdl/m25p32/project/waveform/wave.do
+63
-57
m25p32_top_tb.log
hdl/m25p32/test/log/m25p32_top_tb.log
+0
-23
No files found.
hdl/i2c_slave_wb_master/project/project.xise
View file @
65ced44e
...
...
@@ -25,18 +25,18 @@
</file>
<file
xil_pn:name=
"../rtl/i2c_regs.vhd"
xil_pn:type=
"FILE_VHDL"
>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"9"
/>
<association
xil_pn:name=
"Implementation"
xil_pn:seqID=
"
8
"
/>
<association
xil_pn:name=
"Implementation"
xil_pn:seqID=
"
9
"
/>
</file>
<file
xil_pn:name=
"../rtl/i2c_slave_core.vhd"
xil_pn:type=
"FILE_VHDL"
>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"8"
/>
<association
xil_pn:name=
"Implementation"
xil_pn:seqID=
"
7
"
/>
<association
xil_pn:name=
"Implementation"
xil_pn:seqID=
"
8
"
/>
</file>
<file
xil_pn:name=
"../rtl/i2c_slave_top.vhd"
xil_pn:type=
"FILE_VHDL"
>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"1
2
"
/>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"1
1
"
/>
<association
xil_pn:name=
"Implementation"
xil_pn:seqID=
"10"
/>
</file>
<file
xil_pn:name=
"../test/i2c_slave_top_tb.vhd"
xil_pn:type=
"FILE_VHDL"
>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"1
5
"
/>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"1
4
"
/>
<association
xil_pn:name=
"PostMapSimulation"
xil_pn:seqID=
"28"
/>
<association
xil_pn:name=
"PostRouteSimulation"
xil_pn:seqID=
"28"
/>
<association
xil_pn:name=
"PostTranslateSimulation"
xil_pn:seqID=
"28"
/>
...
...
@@ -54,8 +54,8 @@
<association
xil_pn:name=
"Implementation"
xil_pn:seqID=
"0"
/>
</file>
<file
xil_pn:name=
"../../ctdah_lib/rtl/gc_clk_divider.vhd"
xil_pn:type=
"FILE_VHDL"
>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"
1
0"
/>
<association
xil_pn:name=
"Implementation"
xil_pn:seqID=
"
9
"
/>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"0"
/>
<association
xil_pn:name=
"Implementation"
xil_pn:seqID=
"
7
"
/>
</file>
<file
xil_pn:name=
"../../ctdah_lib/rtl/gc_counter.vhd"
xil_pn:type=
"FILE_VHDL"
>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"6"
/>
...
...
@@ -70,11 +70,11 @@
<association
xil_pn:name=
"Implementation"
xil_pn:seqID=
"1"
/>
</file>
<file
xil_pn:name=
"../../ctdah_lib/test/wishbone_driver.vhd"
xil_pn:type=
"FILE_VHDL"
>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"1
4
"
/>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"1
3
"
/>
<association
xil_pn:name=
"Implementation"
xil_pn:seqID=
"0"
/>
</file>
<file
xil_pn:name=
"../test/i2c_master_driver.vhd"
xil_pn:type=
"FILE_VHDL"
>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"1
1
"
/>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"1
0
"
/>
<association
xil_pn:name=
"Implementation"
xil_pn:seqID=
"0"
/>
</file>
<file
xil_pn:name=
"../test/i2c_tb_pkg.vhd"
xil_pn:type=
"FILE_VHDL"
>
...
...
@@ -82,7 +82,7 @@
<association
xil_pn:name=
"Implementation"
xil_pn:seqID=
"0"
/>
</file>
<file
xil_pn:name=
"../../ctdah_lib/test/wishbone_driver_pkg.vhd"
xil_pn:type=
"FILE_VHDL"
>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"1
3
"
/>
<association
xil_pn:name=
"BehavioralSimulation"
xil_pn:seqID=
"1
2
"
/>
<association
xil_pn:name=
"Implementation"
xil_pn:seqID=
"0"
/>
</file>
<file
xil_pn:name=
"../test/i2c_bit_tb.vhd"
xil_pn:type=
"FILE_VHDL"
>
...
...
hdl/i2c_slave_wb_master/project/waveform/wave.do
View file @
65ced44e
...
...
@@ -9,32 +9,35 @@ add wave -noupdate -expand -group {I2C interface} /i2c_slave_top_tb/uut/sda_oen
add wave -noupdate -expand -group {I2C interface} -radix unsigned /i2c_slave_top_tb/uut/i2c_addr_i
add wave -noupdate /i2c_slave_top_tb/uut/wb_clk
add wave -noupdate /i2c_slave_top_tb/uut/wb_rst_i
add wave -noupdate -group {Wishbone Slave} /i2c_slave_top_tb/uut/wb_slave_stb_i
add wave -noupdate -group {Wishbone Slave} /i2c_slave_top_tb/uut/wb_slave_cyc_i
add wave -noupdate -group {Wishbone Slave} /i2c_slave_top_tb/uut/wb_slave_we_i
add wave -noupdate -group {Wishbone Slave} -radix hexadecimal /i2c_slave_top_tb/uut/wb_slave_sel_i
add wave -noupdate -
group {Wishbone Slave} -radix unsigned
/i2c_slave_top_tb/uut/wb_slave_addr_i
add wave -noupdate -group {Wishbone Slave} -radix hexadecimal /i2c_slave_top_tb/uut/wb_slave_data_o
add wave -noupdate -group {Wishbone Slave} -radix hexadecimal /i2c_slave_top_tb/uut/wb_slave_data_i
add wave -noupdate -group {Wishbone Slave} /i2c_slave_top_tb/uut/wb_slave_ack_o
add wave -noupdate -group {Wishbone Slave} /i2c_slave_top_tb/uut/wb_slave_err_o
add wave -noupdate -group {Wishbone Slave} /i2c_slave_top_tb/uut/wb_slave_rty_o
add wave -noupdate -group {Wishbone Master} /i2c_slave_top_tb/uut/wb_master_stb_o
add wave -noupdate -group {Wishbone Master} /i2c_slave_top_tb/uut/wb_master_cyc_o
add wave -noupdate -group {Wishbone Master} /i2c_slave_top_tb/uut/wb_master_we_o
add wave -noupdate -group {Wishbone Master} -radix hexadecimal /i2c_slave_top_tb/uut/wb_master_sel_o
add wave -noupdate -
group {Wishbone Master} -radix unsigned
/i2c_slave_top_tb/uut/wb_master_addr_o
add wave -noupdate -group {Wishbone Master} -radix hexadecimal /i2c_slave_top_tb/uut/wb_master_data_i
add wave -noupdate -group {Wishbone Master} -radix hexadecimal /i2c_slave_top_tb/uut/wb_master_data_o
add wave -noupdate -group {Wishbone Master} /i2c_slave_top_tb/uut/wb_master_ack_i
add wave -noupdate -group {Wishbone Master} /i2c_slave_top_tb/uut/wb_master_err_i
add wave -noupdate -group {Wishbone Master} /i2c_slave_top_tb/uut/wb_master_rty_i
add wave -noupdate -
divider Registers
add wave -noupdate -
expand -
group {Wishbone Slave} /i2c_slave_top_tb/uut/wb_slave_stb_i
add wave -noupdate -
expand -
group {Wishbone Slave} /i2c_slave_top_tb/uut/wb_slave_cyc_i
add wave -noupdate -
expand -
group {Wishbone Slave} /i2c_slave_top_tb/uut/wb_slave_we_i
add wave -noupdate -
expand -
group {Wishbone Slave} -radix hexadecimal /i2c_slave_top_tb/uut/wb_slave_sel_i
add wave -noupdate -
expand -group {Wishbone Slave} -radix hexadecimal
/i2c_slave_top_tb/uut/wb_slave_addr_i
add wave -noupdate -
expand -
group {Wishbone Slave} -radix hexadecimal /i2c_slave_top_tb/uut/wb_slave_data_o
add wave -noupdate -
expand -
group {Wishbone Slave} -radix hexadecimal /i2c_slave_top_tb/uut/wb_slave_data_i
add wave -noupdate -
expand -
group {Wishbone Slave} /i2c_slave_top_tb/uut/wb_slave_ack_o
add wave -noupdate -
expand -
group {Wishbone Slave} /i2c_slave_top_tb/uut/wb_slave_err_o
add wave -noupdate -
expand -
group {Wishbone Slave} /i2c_slave_top_tb/uut/wb_slave_rty_o
add wave -noupdate -
expand -
group {Wishbone Master} /i2c_slave_top_tb/uut/wb_master_stb_o
add wave -noupdate -
expand -
group {Wishbone Master} /i2c_slave_top_tb/uut/wb_master_cyc_o
add wave -noupdate -
expand -
group {Wishbone Master} /i2c_slave_top_tb/uut/wb_master_we_o
add wave -noupdate -
expand -
group {Wishbone Master} -radix hexadecimal /i2c_slave_top_tb/uut/wb_master_sel_o
add wave -noupdate -
expand -group {Wishbone Master} -radix hexadecimal
/i2c_slave_top_tb/uut/wb_master_addr_o
add wave -noupdate -
expand -
group {Wishbone Master} -radix hexadecimal /i2c_slave_top_tb/uut/wb_master_data_i
add wave -noupdate -
expand -
group {Wishbone Master} -radix hexadecimal /i2c_slave_top_tb/uut/wb_master_data_o
add wave -noupdate -
expand -
group {Wishbone Master} /i2c_slave_top_tb/uut/wb_master_ack_i
add wave -noupdate -
expand -
group {Wishbone Master} /i2c_slave_top_tb/uut/wb_master_err_i
add wave -noupdate -
expand -
group {Wishbone Master} /i2c_slave_top_tb/uut/wb_master_rty_i
add wave -noupdate -
expand -group {Wishbone Master} /i2c_slave_top_tb/uut/inst_i2c_regs/i2c_master_WB_BASIC_fsm
add wave -noupdate /i2c_slave_top_tb/uut/inst_i2c_slave_core/i2c_SLA_fsm
add wave -noupdate -divider Registers
add wave -noupdate -radix hexadecimal /i2c_slave_top_tb/uut/s_CTR0
add wave -noupdate -radix hexadecimal /i2c_slave_top_tb/uut/inst_i2c_slave_core/s_LT
add wave -noupdate -radix hexadecimal /i2c_slave_top_tb/uut/s_DRXA
add wave -noupdate -radix hexadecimal /i2c_slave_top_tb/uut/s_DRXB
add wave -noupdate -radix hexadecimal /i2c_slave_top_tb/uut/s_DTX
add wave -noupdate -radix hexadecimal /i2c_slave_top_tb/uut/s_pf_wb_data
add wave -noupdate -group i2c_regs /i2c_slave_top_tb/uut/inst_i2c_regs/i2c_master_WB_BASIC_fsm
add wave -noupdate -group i2c_regs /i2c_slave_top_tb/uut/inst_i2c_regs/CTR0_o
add wave -noupdate -group i2c_regs /i2c_slave_top_tb/uut/inst_i2c_regs/DTX_o
...
...
@@ -77,6 +80,10 @@ add wave -noupdate -expand -group byte_counter /i2c_slave_top_tb/uut/inst_i2c_sl
add wave -noupdate -expand -group byte_counter /i2c_slave_top_tb/uut/inst_i2c_slave_core/byte_counter_8/rst_i
add wave -noupdate -expand -group byte_counter /i2c_slave_top_tb/uut/inst_i2c_slave_core/byte_counter_8/en_i
add wave -noupdate -expand -group byte_counter -radix unsigned /i2c_slave_top_tb/uut/inst_i2c_slave_core/byte_counter_8/cnt_o
add wave -noupdate -group watchdog /i2c_slave_top_tb/uut/inst_i2c_slave_core/watchdog_counter_8/clk_i
add wave -noupdate -group watchdog /i2c_slave_top_tb/uut/inst_i2c_slave_core/watchdog_counter_8/rst_i
add wave -noupdate -group watchdog /i2c_slave_top_tb/uut/inst_i2c_slave_core/watchdog_counter_8/en_i
add wave -noupdate -group watchdog /i2c_slave_top_tb/uut/inst_i2c_slave_core/watchdog_counter_8/cnt_o
add wave -noupdate -divider {MCU signals}
add wave -noupdate /i2c_slave_top_tb/uut/pf_wb_addr_o
add wave -noupdate /i2c_slave_top_tb/uut/wr_done_o
...
...
@@ -90,12 +97,35 @@ add wave -noupdate -group i2c_driver -radix hexadecimal /i2c_slave_top_tb/i2c_dr
add wave -noupdate -group i2c_driver -radix hexadecimal /i2c_slave_top_tb/i2c_driver/wr_data_i
add wave -noupdate -group i2c_driver /i2c_slave_top_tb/i2c_driver/start_i
add wave -noupdate -group i2c_driver /i2c_slave_top_tb/i2c_driver/write_i
add wave -noupdate -group i2c_driver /i2c_slave_top_tb/i2c_driver/read_i
add wave -noupdate -group i2c_driver /i2c_slave_top_tb/i2c_driver/start_done_o
add wave -noupdate -group i2c_driver /i2c_slave_top_tb/i2c_driver/write_done_o
add wave -noupdate -group i2c_driver /i2c_slave_top_tb/i2c_driver/read_done_o
add wave -noupdate -radix hexadecimal /i2c_slave_top_tb/uut/inst_i2c_regs/s_CTR0
add wave -noupdate -radix hexadecimal /i2c_slave_top_tb/uut/inst_i2c_slave_core/s_DRX_slv
add wave -noupdate /i2c_slave_top_tb/wb_driver/wb_data_i
add wave -noupdate /i2c_slave_top_tb/wb_driver/wb_data_o
add wave -noupdate /i2c_slave_top_tb/wb_driver/data_o
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/wb_addr_o
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/wb_clk_i
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/wb_rst_i
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/wb_stb_o
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/wb_cyc_o
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/wb_sel_o
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/wb_we_o
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/wb_ack_i
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/wb_rty_i
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/wb_err_i
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/data_i
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/addr_i
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/write_i
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/write_done_o
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/read_i
add wave -noupdate -group wb_driver /i2c_slave_top_tb/wb_driver/read_done_o
add wave -noupdate /i2c_slave_top_tb/s_feedback_wb_bus
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {1
4705
0000 ps} 0}
configure wave -namecolwidth
193
WaveRestoreCursors {{Cursor 1} {1
03040
0000 ps} 0}
configure wave -namecolwidth
325
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -signalnamewidth 1
...
...
@@ -109,4 +139,4 @@ configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ps
update
WaveRestoreZoom {
1870304 ps} {194025244
ps}
WaveRestoreZoom {
765068158 ps} {1416341376
ps}
hdl/m25p32/project/waveform/wave.do
View file @
65ced44e
...
...
@@ -6,70 +6,76 @@ add wave -noupdate -expand -group SPI -radix hexadecimal /m25p32_top_tb/uut/prom
add wave -noupdate -expand -group SPI -radix hexadecimal /m25p32_top_tb/uut/prom_cclk_o
add wave -noupdate -expand -group m25p32_top -radix hexadecimal /m25p32_top_tb/uut/s_FMI
add wave -noupdate -expand -group m25p32_top -radix hexadecimal /m25p32_top_tb/uut/s_SR_m25p32
add wave -noupdate -expand -group m25p32_top -group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_we_i
add wave -noupdate -expand -group m25p32_top -group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_stb_i
add wave -noupdate -expand -group m25p32_top -group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_sel_i
add wave -noupdate -expand -group m25p32_top -group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_cyc_i
add wave -noupdate -expand -group m25p32_top -group Wishbone -radix hexadecimal -expand -subitemconfig {/m25p32_top_tb/uut/wb_addr_i(6) {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/wb_addr_i(5) {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/wb_addr_i(4) {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/wb_addr_i(3) {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/wb_addr_i(2) {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/wb_addr_i(1) {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/wb_addr_i(0) {-height 17 -radix hexadecimal}} /m25p32_top_tb/uut/wb_addr_i
add wave -noupdate -expand -group m25p32_top -group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_data_i
add wave -noupdate -expand -group m25p32_top -group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_data_o
add wave -noupdate -expand -group m25p32_top -group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_clk
add wave -noupdate -expand -group m25p32_top -group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_rst_i
add wave -noupdate -expand -group m25p32_top -group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_ack_o
add wave -noupdate -expand -group m25p32_top -group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_rty_o
add wave -noupdate -expand -group m25p32_top -group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_err_o
add wave -noupdate -
expand -
group m25p32_core /m25p32_top_tb/wb_clk
add wave -noupdate -
expand -
group m25p32_core -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/s_MEM_fsm
add wave -noupdate -
expand -
group m25p32_core -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/s_MEM_fsm_d0
add wave -noupdate -
expand -
group m25p32_core /m25p32_top_tb/uut/inst_m25p32_core/s_OP
add wave -noupdate -
expand -group m25p32_core -radix hexadecimal
/m25p32_top_tb/uut/inst_m25p32_core/s_SPI0
add wave -noupdate -
expand -
group m25p32_core -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/s_SPI1
add wave -noupdate -
expand -
group m25p32_core -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/s_SPI2
add wave -noupdate -
expand -
group m25p32_core -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/s_SPI3_slv
add wave -noupdate -expand -group m25p32_top -
expand -
group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_we_i
add wave -noupdate -expand -group m25p32_top -
expand -
group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_stb_i
add wave -noupdate -expand -group m25p32_top -
expand -
group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_sel_i
add wave -noupdate -expand -group m25p32_top -
expand -
group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_cyc_i
add wave -noupdate -expand -group m25p32_top -
expand -
group Wishbone -radix hexadecimal -expand -subitemconfig {/m25p32_top_tb/uut/wb_addr_i(6) {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/wb_addr_i(5) {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/wb_addr_i(4) {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/wb_addr_i(3) {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/wb_addr_i(2) {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/wb_addr_i(1) {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/wb_addr_i(0) {-height 17 -radix hexadecimal}} /m25p32_top_tb/uut/wb_addr_i
add wave -noupdate -expand -group m25p32_top -
expand -
group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_data_i
add wave -noupdate -expand -group m25p32_top -
expand -
group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_data_o
add wave -noupdate -expand -group m25p32_top -
expand -
group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_clk
add wave -noupdate -expand -group m25p32_top -
expand -
group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_rst_i
add wave -noupdate -expand -group m25p32_top -
expand -
group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_ack_o
add wave -noupdate -expand -group m25p32_top -
expand -
group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_rty_o
add wave -noupdate -expand -group m25p32_top -
expand -
group Wishbone -radix hexadecimal /m25p32_top_tb/uut/wb_err_o
add wave -noupdate -group m25p32_core /m25p32_top_tb/wb_clk
add wave -noupdate -group m25p32_core -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/s_MEM_fsm
add wave -noupdate -group m25p32_core -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/s_MEM_fsm_d0
add wave -noupdate -group m25p32_core /m25p32_top_tb/uut/inst_m25p32_core/s_OP
add wave -noupdate -
group m25p32_core -radix hexadecimal -expand -subitemconfig {/m25p32_top_tb/uut/inst_m25p32_core/s_SPI0.CPOL {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/inst_m25p32_core/s_SPI0.CPHA {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/inst_m25p32_core/s_SPI0.BREAD {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/inst_m25p32_core/s_SPI0.BDATA {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/inst_m25p32_core/s_SPI0.BADDR {-height 17 -radix hexadecimal} /m25p32_top_tb/uut/inst_m25p32_core/s_SPI0.BINST {-height 17 -radix hexadecimal}}
/m25p32_top_tb/uut/inst_m25p32_core/s_SPI0
add wave -noupdate -group m25p32_core -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/s_SPI1
add wave -noupdate -group m25p32_core -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/s_SPI2
add wave -noupdate -group m25p32_core -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/s_SPI3_slv
add wave -noupdate -group m25p32_regs -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_regs/s_FMI
add wave -noupdate -group m25p32_regs -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_regs/s_SR_m25p32
add wave -noupdate -
expand -
group spi_master_multifield /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/rst_i
add wave -noupdate -
expand -
group spi_master_multifield /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/clk_i
add wave -noupdate -
expand -
group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_i
add wave -noupdate -
expand -
group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_inst_reg_o
add wave -noupdate -
expand -
group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/addr_i
add wave -noupdate -
expand -
group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_addr_reg_o
add wave -noupdate -
expand -
group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/data_i
add wave -noupdate -
expand -
group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_data_reg_o
add wave -noupdate -
expand -
group spi_master_multifield /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_spi_clk_fsm_d0
add wave -noupdate -
expand -
group spi_master_multifield /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_STATUS
add wave -noupdate -
expand -
group spi_master_multifield /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_clk_fsm_d0
add wave -noupdate -
expand -group spi_master_multifiel
d /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_SPI0_core
add wave -noupdate -
expand -group spi_master_multifiel
d /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_SPI1_core
add wave -noupdate -
expand -group spi_master_multifiel
d /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_SPI2
add wave -noupdate -
expand -
group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/s_SPI3_slv
add wave -noupdate -
expand -
group spi_master_multifield /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/rd_SPI3_o
add wave -noupdate -
expand -
group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/reg_i
add wave -noupdate -
expand -
group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/clk
add wave -noupdate -
expand -
group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/load
add wave -noupdate -
expand -
group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/flush
add wave -noupdate -
expand -
group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/oen_i
add wave -noupdate -
expand -
group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/reg_o
add wave -noupdate -
expand -
group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/reg_int
add wave -noupdate -
expand -group spi_master_multifiel
d -group {Read counter} /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/spi_read_edge_counter/clk_i
add wave -noupdate -
expand -group spi_master_multifiel
d -group {Read counter} /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/spi_read_edge_counter/rst_i
add wave -noupdate -
expand -group spi_master_multifiel
d -group {Read counter} /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/spi_read_edge_counter/en_i
add wave -noupdate -
expand -group spi_master_multifiel
d -group {Read counter} -radix unsigned /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/spi_read_edge_counter/cnt_o
add wave -noupdate -group spi_master_multifield /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/rst_i
add wave -noupdate -group spi_master_multifield /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/clk_i
add wave -noupdate -group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_i
add wave -noupdate -group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_inst_reg_o
add wave -noupdate -group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/addr_i
add wave -noupdate -group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_addr_reg_o
add wave -noupdate -group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/data_i
add wave -noupdate -group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_data_reg_o
add wave -noupdate -group spi_master_multifield /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_spi_clk_fsm_d0
add wave -noupdate -group spi_master_multifield /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_STATUS
add wave -noupdate -group spi_master_multifield /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_clk_fsm_d0
add wave -noupdate -
group spi_master_multifield -expan
d /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_SPI0_core
add wave -noupdate -
group spi_master_multifield -expan
d /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_SPI1_core
add wave -noupdate -
group spi_master_multifield -expan
d /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/s_SPI2
add wave -noupdate -group spi_master_multifield -radix hexadecimal /m25p32_top_tb/uut/inst_m25p32_core/s_SPI3_slv
add wave -noupdate -group spi_master_multifield /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/rd_SPI3_o
add wave -noupdate -group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/reg_i
add wave -noupdate -group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/clk
add wave -noupdate -group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/load
add wave -noupdate -group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/flush
add wave -noupdate -group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/oen_i
add wave -noupdate -group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/reg_o
add wave -noupdate -group spi_master_multifield -group inst_FIFO /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/inst_fifo_i2c/reg_int
add wave -noupdate -
group spi_master_multifield -expan
d -group {Read counter} /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/spi_read_edge_counter/clk_i
add wave -noupdate -
group spi_master_multifield -expan
d -group {Read counter} /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/spi_read_edge_counter/rst_i
add wave -noupdate -
group spi_master_multifield -expan
d -group {Read counter} /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/spi_read_edge_counter/en_i
add wave -noupdate -
group spi_master_multifield -expan
d -group {Read counter} -radix unsigned /m25p32_top_tb/uut/inst_m25p32_core/inst_spi_master_core/spi_read_edge_counter/cnt_o
add wave -noupdate -group m25p32_top_tb -radix hexadecimal /m25p32_top_tb/s_page
add wave -noupdate -group m25p32_top_tb /m25p32_top_tb/s_SPI0
add wave -noupdate -group m25p32_top_tb /m25p32_top_tb/s_SPI1
add wave -noupdate -group m25p32_top_tb /m25p32_top_tb/s_SPI2
add wave -noupdate -group m25p32_top_tb -radix hexadecimal /m25p32_top_tb/s_SPI3
add wave -noupdate -group miso_tester /m25p32_top_tb/miso_tester/rst_i
add wave -noupdate -group miso_tester /m25p32_top_tb/miso_tester/STATUS_i
add wave -noupdate -group miso_tester /m25p32_top_tb/miso_tester/bytes_to_wr_i
add wave -noupdate -group miso_tester -radix hexadecimal /m25p32_top_tb/miso_tester/read_i
add wave -noupdate -group miso_tester /m25p32_top_tb/miso_tester/end_read_flag_o
add wave -noupdate -group miso_tester /m25p32_top_tb/miso_tester/spi_miso_o
add wave -noupdate -group miso_tester /m25p32_top_tb/miso_tester/spi_clk_i
add wave -noupdate -group miso_tester /m25p32_top_tb/miso_tester/s_spi_count
add wave -noupdate -expand -group miso_tester /m25p32_top_tb/miso_tester/rst_i
add wave -noupdate -expand -group miso_tester /m25p32_top_tb/miso_tester/STATUS_i
add wave -noupdate -expand -group miso_tester /m25p32_top_tb/miso_tester/bytes_to_wr_i
add wave -noupdate -expand -group miso_tester -radix hexadecimal /m25p32_top_tb/miso_tester/read_i
add wave -noupdate -expand -group miso_tester /m25p32_top_tb/miso_tester/end_read_flag_o
add wave -noupdate -expand -group miso_tester /m25p32_top_tb/miso_tester/spi_miso_o
add wave -noupdate -expand -group miso_tester /m25p32_top_tb/miso_tester/spi_clk_i
add wave -noupdate -expand -group miso_tester /m25p32_top_tb/miso_tester/s_spi_count
add wave -noupdate -expand -group mosi_tester /m25p32_top_tb/s_inst_check
add wave -noupdate -expand -group mosi_tester -radix hexadecimal /m25p32_top_tb/mosi_tester/s_addr_check
add wave -noupdate -expand -group mosi_tester -radix hexadecimal /m25p32_top_tb/mosi_tester/s_data_check
add wave -noupdate -radix hexadecimal /m25p32_top_tb/uut/s_SR_m25p32
add wave -noupdate -radix hexadecimal /m25p32_top_tb/s_read_SR_check
add wave -noupdate -radix hexadecimal /m25p32_top_tb/s_read
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {9
07425000
ps} 0}
WaveRestoreCursors {{Cursor 1} {9
11399192
ps} 0}
configure wave -namecolwidth 274
configure wave -valuecolwidth 88
configure wave -justifyvalue left
...
...
@@ -84,4 +90,4 @@ configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ps
update
WaveRestoreZoom {
906349380 ps} {909585368
ps}
WaveRestoreZoom {
0 ps} {979308750
ps}
hdl/m25p32/test/log/m25p32_top_tb.log
View file @
65ced44e
...
...
@@ -4,26 +4,3 @@
0 OK WRSR DATA SR register received matches with expected
0 -- WRDI End of TX: WRDI received
1 -- WREN Start of TX: WREN received
1 OK PP INST PP instruction received matches with expected
1 OK PP ADDR Address received matches with expected
1 -- WRDI End of TX: WRDI received
2 -- WREN Start of TX: WREN received
2 OK SE INST SE instruction received matches with expected
2 OK SE ADDR Address received matches with expected
2 -- WRDI End of TX: WRDI received
3 -- WREN Start of TX: WREN received
3 OK BE INST BE instruction received matches with expected
3 -- WRDI End of TX: WRDI received
4 -- WREN Start of TX: WREN received
4 OK RDSR INST RDSR instruction received matches with expected
4 -- WRDI End of TX: WRDI received
4 OK RDSR READ SR_m25p32 matches with expected
5 -- WREN Start of TX: WREN received
5 OK RDID INST RDID instruction received matches with expected
5 -- WRDI End of TX: WRDI received
5 OK RDID READ RDID matches with expected
6 -- WREN Start of TX: WREN received
6 OK READ INST READ instruction received matches with expected
6 OK READ ADDR Address received matches with expected
6 -- WRDI End of TX: WRDI received
6 OK READ READ READ matches with expected
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment