Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
C
Conv TTL Blocking
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
5
Issues
5
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Conv TTL Blocking
Commits
c1ff389d
Commit
c1ff389d
authored
Feb 02, 2017
by
Projects
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
clrerr.py: Script for clearing ERR register
parent
8a8b58fc
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
92 additions
and
0 deletions
+92
-0
clrerr.py
software/diag/clrerr.py
+92
-0
No files found.
software/diag/clrerr.py
0 → 100755
View file @
c1ff389d
#!/usr/bin/python
#===============================================================================
# CERN (BE-CO-HT)
# Clear bits in the error register
#===============================================================================
# author: Theodor Stana (t.stana@cern.ch)
# Maciej Suminski (maciej.suminski@cern.ch)
#
# date of creation: 2014-05-02
#
# version: 1.1
#
# description:
# Set the converter board errors register, typically for clearing set error
# bits. Note that typically to clear an error, one has to set it to logical
# one.
#
# dependencies:
# ../ei2c/ei2c.py
# ../ei2c/ei2cdefine.py
#
#===============================================================================
# GNU LESSER GENERAL PUBLIC LICENSE
#===============================================================================
# This source file is free software; you can redistribute it and/or modify it
# under the terms of the GNU Lesser General Public License as published by the
# Free Software Foundation; either version 2.1 of the License, or (at your
# option) any later version. This source is distributed in the hope that it
# will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty
# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
# See the GNU Lesser General Public License for more details. You should have
# received a copy of the GNU Lesser General Public License along with this
# source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
#===============================================================================
# last changes:
# 2014-05-02 Theodor Stana File created
# 2017-02-02 M. Suminski Updated mem map to match v4 gateware,
# renamed from setsr.py to seterr.py
#===============================================================================
# TODO: -
#===============================================================================
import
sys
sys
.
path
.
append
(
"../ei2c"
)
from
ei2c
import
*
import
ei2cdefine
sys
.
path
.
append
(
".."
)
import
convttl_regs
as
regs
if
__name__
==
"__main__"
:
# Get the IP, user and password for the ELMA crate from either user input,
# or ei2cdefine.py
if
(
ei2cdefine
.
ENABLED
):
ip
=
ei2cdefine
.
HNAME
user
=
ei2cdefine
.
USER
pwd
=
ei2cdefine
.
PWD
else
:
ip
=
raw_input
(
"ELMA crate IP or hostname : "
)
user
=
raw_input
(
"ELMA crate user name : "
)
pwd
=
raw_input
(
"ELMA crate password : "
)
testelma
=
EI2C
(
ip
,
user
,
pwd
)
testelma
.
open
()
# Ask for slot number
while
1
:
try
:
slot
=
raw_input
(
"Slot no.: "
)
slot
=
int
(
slot
)
break
except
TypeError
as
e
:
print
(
"Please input a decimal slot number."
)
except
SlotError
as
e
:
print
(
e
.
strerror
)
except
KeyboardInterrupt
:
sys
.
exit
();
except
:
print
(
"Unexpected error: "
,
sys
.
exc_info
()[
0
])
# Print which board is detected in the selected slot
bid
=
testelma
.
get_bid
(
slot
)
# Get error register value, set and re-print
v
=
testelma
.
read
(
slot
,
regs
.
ERR
)
print
(
"ERR (pre-set) : 0x
%08
x"
%
v
)
testelma
.
write
(
slot
,
regs
.
ERR
,
v
)
v
=
testelma
.
read
(
slot
,
regs
.
ERR
)
print
(
"ERR (post-set) : 0x
%08
x"
%
v
)
testelma
.
close
()
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment