Skip to content

C
Conv TTL Blocking
Commit c2cc437d authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana
Browse files
Options

pts hw guide completed wo additional doc

parent e97bd06d
Hide whitespace changes
Inline Side-by-side
Showing with 85 additions and 6 deletions
doc/pts/hw/hw-pts-conv-ttl-blo.tex
View file @ c2cc437d
......@@ -40,7 +40,7 @@
\hline
\multicolumn{1}{c}{\textbf{Date}} & \multicolumn{1}{c}{\textbf{Version}} & \multicolumn{1}{c}{\textbf{Change}} \\
\hline
28-06-2013 & 0.1 & First draft \\
01-07-2013 & 0.1 & First draft \\
\hline
\end{tabular}
}
......@@ -106,11 +106,90 @@ The ELMA crate within the PTS contains a system monitor (SysMon) board that moni
voltage levels, temperatures and controls fan speeds for the crate fans. The crate
can be accessed via Telnet to send commands to the VME boards inside the crate.
The CONV-TTL-BLO is placed on a VME slot within the ELMA crate; the SysMon will control
it via the I$^2$C lines on the VME P1 connector to run the tests. An RTM Interface
Tester board is placed on the P2 connector in the VME back-plane. This tester board
loops back signals relevant for the blocking pulse and RTM interface test.
The CONV-TTL-BLO is placed on a VME slot within the ELMA crate. The PTS firmware
uses hardware on the CONV-TTL-BLO board to test the board itself. The SysMon will
control the CONV-TTL-BLO via the I$^2$C lines on the VME P1 connector to run the tests.
An RTM Interface Tester board is the only extra hardware needed for the PTS. This
board is the subject of the next section.
%======================================================================================
% SEC: PTS system
%======================================================================================
\section{RTM interface tester}
\label{sec:rtm-tester}
The RTM Interface Tester board is a simple board used to loop back signals relevant in
the blocking pulse and RTM interface test. It is placed on the P2 connector in the VME
back-plane and it helps test
\begin{itemize}
\item that a minimum of 16~V are output by the CONV-TTL-BLO on the blocking outputs
\item the RTM detection lines
\item the rear-panel pulse LED lines are working properly
\end{itemize}
\textbf{\textit{Pay attention when using a general test system that the CONV-TTL-BLO RTM
Interface Tester is not plugged in when testing e.g., SVEC boards. If the SVEC
board should drive the wrong lines high, this might cause a permanent fault to
the SVEC AFPGA.}}
Table~\ref{tbl:rtm-sigs} lists the output channels that output to each input channel
on the blocking side of CONV-TTL-BLO.
\begin{table}[h]
\caption{Loopback connections on RTM Interface Tester}
\label{tbl:rtm-sigs}
\centerline
{
\begin{tabular}{c c}
\hline
\textbf{Input} & \textbf{Outputs} \\
\hline
I1 & O1 O2 O3 \\
I2 & O2 O3 O4 \\
I3 & O3 O4 O5 \\
I4 & O4 O5 O6 \\
I5 & O5 O6 O1 \\
I6 & O6 O1 O2 \\
\hline
\end{tabular}
}
\end{table}
\begin{figure}[h]
\centerline{\includegraphics[width=.5\textwidth]{fig/loopback}}
\caption{Loopback voltage divider}
\label{fig:loopback}
\end{figure}
Before looping it back to an input channel, the output blocking signal from the
CONV-TTL-BLO is passed through a voltage divider network (Figure~\ref{fig:loopback}).
The 150~$\Omega$ equivalent resistor forms a 1/4 voltage divider with the 50~$\Omega$
termination at the blocking input. Given the 4~V sensitivity of the blocking input,
this means that any signals lower than about 16~V at the blocking output of the
CONV-TTL-BLO will not be detected back at the input.
By looping back the rear-panel LED outputs onto the RTM detection lines, the rest
of the RTM interface is tested.
Appendix~\ref{app:sch} contains the full schematics of the RTM Interface Tester.
%==============================================================================
% Bibliography
%==============================================================================
\pagebreak
\begin{appendices}
\section{Schematics of the RTM Interface Tester}
\label{app:sch}
\begin{figure}[h]
\centerline{\includegraphics[scale=.9,angle=90]{fig/rtm-sch}}
\end{figure}
\end{appendices}
%==============================================================================
% Bibliography
......@@ -120,4 +199,4 @@ loops back signals relevant for the blocking pulse and RTM interface test.
\bibliography{hw-pts-conv-ttl-blo}
\end{document}
\ No newline at end of file
\end{document}
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment