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Conv TTL RS485 - Gateware
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Conv TTL RS485 - Gateware
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4425d5cf
Commit
4425d5cf
authored
Jan 06, 2015
by
Theodor-Adrian Stana
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doc: Updated HDL guide memory map and block diagram for v1.0 gateware
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conv-regs.tex
doc/hdlg/conv-regs.tex
+1359
-34
block-diagram.svg
doc/hdlg/fig/block-diagram.svg
+62
-17
hdlg-conv-ttl-rs485.tex
doc/hdlg/hdlg-conv-ttl-rs485.tex
+2
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doc/hdlg/conv-regs.tex
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doc/hdlg/fig/block-diagram.svg
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doc/hdlg/hdlg-conv-ttl-rs485.tex
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4425d5cf
...
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@@ -76,6 +76,7 @@ work, see \\
\hline
06-08-2014
&
0.1
&
First draft
\\
06-01-2015
&
0.2
&
Release for gateware v0.0
\\
06-01-2015
&
1.0
&
Updated memory map for gateware v1.0
\\
\hline
\end{tabular}
}
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@@ -343,6 +344,7 @@ $reg. index = \frac{addr}{4} + 1$
\hline
Board registers
&
0x000
&
0x0
{}
f
{}
f
&
Coverter board registers
\\
MultiBoot
&
0x100
&
0x11f
&
MultiBoot module
\\
One-wire master
&
0x200
&
0x2f
{}
f
&
One-wire master for DS18B20 thermometer module
\\
SDB descriptor
&
0xf00
&
0xf
{}
f
{}
f
&
SDB descriptor (see~
\cite
{
sdb
}
)
\\
\hline
\end{tabular}
...
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