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Conv TTL RS485
Commit fad5b210 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana
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doc: Corrected things in user guide 

- corrected small errors (readreg instead of writereg in "Remote reset"
  section, various typos
- added a little bit of info
- made "Revision history", "List of abbreviations" and "References"
  sections appear in the Contents and the bookmarks of the .pdf
- also made Contents appear in bookmarks, without it appearing in the
  actual Contents
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conv-ttl-rs485-gw @ c1f2d83b
Subproject commit 0eb92bce369caf898f90a30db30da7d00d8ffc32
Subproject commit c1f2d83b47ec44058c303d409ac20fca6402b878
doc/ug/cern-title.tex
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......@@ -9,7 +9,7 @@
\noindent \rule{\textwidth}{.1cm}
\hfill August 8, 2014
\hfill August 12, 2014
\vspace*{3cm}
......
doc/ug/fig/ex-invert-ttl.svg
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doc/ug/fig/ex-timing.svg
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doc/ug/ug-conv-ttl-rs485.tex
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......@@ -48,7 +48,8 @@
%------------------------------------------------------------------------------
% Revision history
%------------------------------------------------------------------------------
\thispagestyle{empty}
\pagebreak
\addcontentsline{toc}{section}{Revision history}
\section*{Revision history}
\centerline
......@@ -59,18 +60,19 @@
\multicolumn{1}{c}{\textbf{Date}} & \multicolumn{1}{c}{\textbf{Version}} & \multicolumn{1}{c}{\textbf{Change}} \\
\hline
08-08-2014 & 0.1 & First draft, gateware release v0.0 \\
12-08-2014 & 1.0 & First release, after small error corrections (\textit{writereg} instead of \textit{readreg}
in Section~\ref{sec:diag-remote-reset}, and typo in Section~\ref{sec:reprog-bitstreams}), and
addition of how to read gateware version in Section~\ref{sec:reprog-bitstreams} \\
\hline
\end{tabular}
}
\pagebreak
\pagenumbering{roman}
\setcounter{page}{1}
\tableofcontents
%------------------------------------------------------------------------------
% List of figs, tables
%------------------------------------------------------------------------------
\pagebreak
\pdfbookmark[1]{\contentsname}{toc}
\tableofcontents
\listoffigures
\listoftables
......@@ -78,7 +80,7 @@
% List of abbreviations
%------------------------------------------------------------------------------
\pagebreak
\section*{List of Abbreviations}
\section*{List of abbreviations}
\begin{tabular}{l l}
FPGA & Field-Programmable Gate Array \\
FM & Front Module (VME board) \\
......@@ -93,14 +95,12 @@
VME & VERSAmodule Eurocard \\
WR & White Rabbit \\
\end{tabular}
\pagebreak
\pagenumbering{arabic}
\setcounter{page}{1}
\addcontentsline{toc}{section}{List of abbreviations}
%==============================================================================
% SEC: Intro
%==============================================================================
\pagebreak
\section{Introduction}
\label{sec:intro}
......@@ -159,7 +159,7 @@ on gateware release v0.0 (see the gateware releases page~\cite{conv-ttl-rs485-gw
%------------------------------------------------------------------------------
\subsection*{Additional documentation}
\subsection{Additional documentation}
%------------------------------------------------------------------------------
\begin{itemize}
......@@ -748,7 +748,7 @@ An example of resetting a card in slot 11 using the Telnet commands is given bel
\begin{verbatim}
%>writereg 11 8 1
Done!
%>readreg 11 8 2
%>writereg 11 8 2
Not acknoledged!
\end{verbatim}
......@@ -906,7 +906,7 @@ The FPGA on-board the CONV-TTL-RS485 is configured by bitstreams downloaded from
on-board flash chip. There are two bitstreams relevant to the user.
The first is the application bitstream, which is the bitstream that runs when the
card is powered up. It is also the bitstream that the user loads loads to the
card is powered up. It is also the bitstream that the user loads to the
CONV-TTL-RS485 flash when using remote reprogramming.
The second bitstream is the Golden bitstream, which is a bitstream known to be safe in
......@@ -920,6 +920,9 @@ Note however that if the FPGA falls back to this Golden bitstream, even
if a new application bitstream is correctly loaded to the CONV-TTL-RS485 flash chip,
a power-cycle will be needed to run this new bitstream.
To detect which bitstream is currently running, read the GWVERS field in the
board's status register (SR -- see Appendix~\ref{app:conv-regs-sr}).
%--------------------------------------------------------------------------------------
% SUBSEC: Don't program bitstreams w/o the ICAP
%--------------------------------------------------------------------------------------
......@@ -998,9 +1001,9 @@ MultiBoot-enabled design.
\subsection{Timing distribution}
Due to the channel pass-through architecture of the pulse repetition logic, the
CONV-TTL-RS485 can be used as a timing distribution system. Figure~\ref{fig:ex-timing}
shows an example setup for this. Up to 18 timing signals can be distributed by the
CONV-TTL-RS485 to up to 256 nodes on the network.
CONV-TTL-RS485 can be used as a timing distribution system, to distribute up to 18
timing signals out of one CONV-TTL-RS485 system. Figure~\ref{fig:ex-timing}
shows an example setup for this.
\begin{figure}[h]
\centerline{\includegraphics[width=\textwidth]{fig/ex-timing}}
......@@ -1025,8 +1028,6 @@ general-purpose inverter channels can be used. Figure~\ref{fig:ex-invert-ttl} sh
setup for inverting TTL pulses into TTL-BAR on inverting channel A and repeating them
on front panel channel 6.
The inverter channel will add a 30~ns delay to the input TTL signal.
%==============================================================================
% APP: Memmap
%==============================================================================
......@@ -1082,5 +1083,6 @@ $reg. index = \frac{addr}{4} + 1$
\pagebreak
\bibliographystyle{ieeetr}
\bibliography{ug-conv-ttl-rs485}
\addcontentsline{toc}{section}{References}
\end{document}
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