Remove designs from master branch, they are now stored in EDMS

64646a11 · Grzegorz Daniluk · 3e3ed113 · 3e3ed113 · 3e3ed113 · 3e3ed113
Commit 64646a11 authored Jul 30, 2021 by Grzegorz Daniluk
131 changed files
--- a/pcb/cpcis_backplane/AIRMAX.lib
+++ b/pcb/cpcis_backplane/AIRMAX.lib
--- a/pcb/cpcis_backplane/CPCI Backplane-cache.lib
+++ b/pcb/cpcis_backplane/CPCI Backplane-cache.lib
--- a/pcb/cpcis_backplane/CPCI Backplane-rescue.dcm
+++ b/pcb/cpcis_backplane/CPCI Backplane-rescue.dcm
-EESchema-DOCLIB  Version 2.0
-#
-#End Doc Library
--- a/pcb/cpcis_backplane/CPCI Backplane-rescue.lib
+++ b/pcb/cpcis_backplane/CPCI Backplane-rescue.lib
-EESchema-LIBRARY Version 2.4
-#encoding utf-8
-#
-# P12V-power2-CPCI-Backplane-rescue
-#
-DEF P12V-power2-CPCI-Backplane-rescue #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -150 50 H I C CNN
-F1 "P12V-power2-CPCI-Backplane-rescue" 0 140 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
-X P12V 1 0 0 0 U 50 50 1 1 W N
-ENDDRAW
-ENDDEF
-#
-# P5V-power2-CPCI-Backplane-rescue
-#
-DEF P5V-power2-CPCI-Backplane-rescue #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -150 50 H I C CNN
-F1 "P5V-power2-CPCI-Backplane-rescue" 0 140 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
-X P5V 1 0 0 0 U 50 50 1 1 W N
-ENDDRAW
-ENDDEF
-#
-# Vext1-powerMG
-#
-DEF Vext1-powerMG #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -150 50 H I C CNN
-F1 "Vext1-powerMG" 0 140 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
-X Vext1 1 0 0 0 U 50 50 1 1 W N
-ENDDRAW
-ENDDEF
-#
-# Vext2-powerMG
-#
-DEF Vext2-powerMG #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -150 50 H I C CNN
-F1 "Vext2-powerMG" 0 140 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
-X Vext2 1 0 0 0 U 50 50 1 1 W N
-ENDDRAW
-ENDDEF
-#
-# WURTH_7461057-Fasteners_&_Fixings-CPCI-Backplane-rescue
-#
-DEF WURTH_7461057-Fasteners_&_Fixings-CPCI-Backplane-rescue BUSH 0 50 Y Y 1 L N
-F0 "BUSH" 150 100 50 H V L CNN
-F1 "WURTH_7461057-Fasteners_&_Fixings-CPCI-Backplane-rescue" 0 -145 50 H I L CNN
-F2 "Fasteners & Fixings:WURTH_7461057" 0 -220 50 H I L CNN
-F3 " " 0 -295 50 H I L CNN
-F4 "M3" 600 100 50 H V L CNN "Val"
-F5 "WURTH_7461057" 0 -370 50 H I L CNN "Part Number"
-F6 "Bush" 0 -445 50 H I L CNN "Library Ref"
-F7 "SchLib\\Fasteners & Fixings.SchLib" 0 -520 50 H I L CNN "Library Path"
-F8 "M3" 0 -595 50 H I L CNN "Comment"
-F9 "Standard" 0 -670 50 H I L CNN "Component Kind"
-F10 "Standard" 0 -745 50 H I L CNN "Component Type"
-F11 "6" 0 -820 50 H I L CNN "Pin Count"
-F12 " " 0 -895 50 H I L CNN "Case"
-F13 "PcbLib\\Fasteners & Fixings.PcbLib" 0 -970 50 H I L CNN "Footprint Path"
-F14 "WURTH_7461057" 0 -1045 50 H I L CNN "Footprint Ref"
-F15 "7x7x6mm REDCUBE Press-Fit with Internsl Threaded Hole M3,Two Rows Pin-Plate WP-BUTR" 0 -1120 50 H I L CNN "PackageDescription"
-F16 " " 0 -1195 50 H I L CNN "Family"
-F17 "Yes" 0 -1270 50 H I L CNN "Mounted"
-F18 "No" 0 -1345 50 H I L CNN "Socket"
-F19 "No" 0 -1420 50 H I L CNN "SMD"
-F20 "Yes" 0 -1495 50 H I L CNN "PressFit"
-F21 "No" 0 -1570 50 H I L CNN "Sense"
-F22 " " 0 -1645 50 H I L CNN "Sense Comment"
-F23 "None" 0 -1720 50 H I L CNN "Status"
-F24 " " 0 -1795 50 H I L CNN "Status Comment"
-F25 " " 0 -1870 50 H I L CNN "SCEM"
-F26 "REDCUBE Press-Fit Bush With Threaded Hole M3 and Two Rows Pin-Plate WP-BUTR" 0 -1945 50 H I L CNN "Part Description"
-F27 "WURTH" 0 -2020 50 H I L CNN "Manufacturer"
-F28 "7461057" 0 -2095 50 H I L CNN "Manufacturer Part Number"
-F29 "6mm" 0 -2170 50 H I L CNN "ComponentHeight"
-F30 " " 0 -2245 50 H I L CNN "Manufacturer1 Example"
-F31 " " 0 -2320 50 H I L CNN "Manufacturer1 Part Number"
-F32 " " 0 -2395 50 H I L CNN "Manufacturer1 ComponentHeight"
-F33 " " 0 -2470 50 H I L CNN "ComponentLink1Description"
-F34 " " 0 -2545 50 H I L CNN "ComponentLink2Description"
-F35 "CERN DEM JLC" 0 -2620 50 H I L CNN "Author"
-F36 "08/13/18 00:00:00" 0 -2695 50 H I L CNN "CreateDate"
-F37 "08/13/18 00:00:00" 0 -2770 50 H I L CNN "LatestRevisionDate"
-F38 "Fasteners & Fixings" 0 -2845 50 H I L CNN "Database Table Name"
-F39 "Eletro-mechanical.DbLib" 0 -2920 50 H I L CNN "Library Name"
-F40 "Fasteners & Fixings" 0 -2995 50 H I L CNN "Footprint Library"
-F41 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." 0 -3070 50 H I L CNN "License"
-DRAW
-P 2 0 1 10 0 50 100 50 N
-P 2 0 1 0 20 100 20 150 N
-P 2 0 1 0 25 80 25 150 N
-P 2 0 1 0 25 80 50 70 N
-P 2 0 1 0 75 80 25 80 N
-P 2 0 1 0 75 80 50 70 N
-P 2 0 1 0 75 80 75 150 N
-P 2 0 1 0 80 100 20 100 N
-P 2 0 1 0 80 100 80 150 N
-P 6 0 1 10 0 50 0 140 10 150 90 150 100 140 100 50 N
-X 1 1 0 0 50 U 0 0 0 1 B
-ENDDRAW
-ENDDEF
-#
-#End Library
--- a/pcb/cpcis_backplane/CPCI Backplane.bak
+++ b/pcb/cpcis_backplane/CPCI Backplane.bak
--- a/pcb/cpcis_backplane/CPCI Backplane.kicad_pcb
+++ b/pcb/cpcis_backplane/CPCI Backplane.kicad_pcb
--- a/pcb/cpcis_backplane/CPCI Backplane.pro
+++ b/pcb/cpcis_backplane/CPCI Backplane.pro
-update=31.03.2020 16:54:27
-version=1
-last_client=kicad
-[general]
-version=1
-RootSch=
-BoardNm=
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=
-[eeschema/libraries]
-[schematic_editor]
-version=1
-PageLayoutDescrFile=
-PlotDirectoryName=schematics/
-SubpartIdSeparator=0
-SubpartFirstId=65
-NetFmtName=
-SpiceAjustPassiveValues=0
-LabSize=50
-ERC_TestSimilarLabels=1
-[pcbnew]
-version=1
-PageLayoutDescrFile=
-LastNetListRead=
-CopperLayerCount=12
-BoardThickness=4
-AllowMicroVias=0
-AllowBlindVias=0
-RequireCourtyardDefinitions=0
-ProhibitOverlappingCourtyards=1
-MinTrackWidth=0.09999999999999999
-MinViaDiameter=0.4
-MinViaDrill=0.2
-MinMicroViaDiameter=0.2
-MinMicroViaDrill=0.09999999999999999
-MinHoleToHole=0.25
-TrackWidth1=0.102
-ViaDiameter1=0.75
-ViaDrill1=0.5
-dPairWidth1=0.102
-dPairGap1=0.127
-dPairViaGap1=0.25
-dPairWidth2=0.102
-dPairGap2=0.127
-dPairViaGap2=0.127
-dPairWidth3=0.12
-dPairGap3=0.15
-dPairViaGap3=0.15
-dPairWidth4=0.15
-dPairGap4=0.102
-dPairViaGap4=0.102
-SilkLineWidth=0.15
-SilkTextSizeV=0.7
-SilkTextSizeH=0.7
-SilkTextSizeThickness=0.15
-SilkTextItalic=0
-SilkTextUpright=1
-CopperLineWidth=0.2
-CopperTextSizeV=1.5
-CopperTextSizeH=1.5
-CopperTextThickness=0.3
-CopperTextItalic=0
-CopperTextUpright=1
-EdgeCutLineWidth=0.09999999999999999
-CourtyardLineWidth=0.05
-OthersLineWidth=0.15
-OthersTextSizeV=1
-OthersTextSizeH=1
-OthersTextSizeThickness=0.15
-OthersTextItalic=0
-OthersTextUpright=1
-SolderMaskClearance=0
-SolderMaskMinWidth=0
-SolderPasteClearance=0
-SolderPasteRatio=-0
-[pcbnew/Layer.F.Cu]
-Name=F.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In1.Cu]
-Name=Sig1.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In2.Cu]
-Name=GND2.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In3.Cu]
-Name=Sig2.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In4.Cu]
-Name=GND3.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In5.Cu]
-Name=Sig3.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In6.Cu]
-Name=GND4.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In7.Cu]
-Name=Sig4.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In8.Cu]
-Name=GND5.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In9.Cu]
-Name=Sig5.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In10.Cu]
-Name=GND6.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In11.Cu]
-Name=In11.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In12.Cu]
-Name=In12.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In13.Cu]
-Name=In13.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In14.Cu]
-Name=In14.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In15.Cu]
-Name=In15.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In16.Cu]
-Name=In16.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In17.Cu]
-Name=In17.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In18.Cu]
-Name=In18.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In19.Cu]
-Name=In19.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In20.Cu]
-Name=In20.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In21.Cu]
-Name=In21.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In22.Cu]
-Name=In22.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In23.Cu]
-Name=In23.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In24.Cu]
-Name=In24.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In25.Cu]
-Name=In25.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In26.Cu]
-Name=In26.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In27.Cu]
-Name=In27.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In28.Cu]
-Name=In28.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In29.Cu]
-Name=In29.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In30.Cu]
-Name=In30.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.B.Cu]
-Name=B.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.B.Adhes]
-Enabled=1
-[pcbnew/Layer.F.Adhes]
-Enabled=1
-[pcbnew/Layer.B.Paste]
-Enabled=1
-[pcbnew/Layer.F.Paste]
-Enabled=1
-[pcbnew/Layer.B.SilkS]
-Enabled=1
-[pcbnew/Layer.F.SilkS]
-Enabled=1
-[pcbnew/Layer.B.Mask]
-Enabled=1
-[pcbnew/Layer.F.Mask]
-Enabled=1
-[pcbnew/Layer.Dwgs.User]
-Enabled=1
-[pcbnew/Layer.Cmts.User]
-Enabled=1
-[pcbnew/Layer.Eco1.User]
-Enabled=1
-[pcbnew/Layer.Eco2.User]
-Enabled=1
-[pcbnew/Layer.Edge.Cuts]
-Enabled=1
-[pcbnew/Layer.Margin]
-Enabled=1
-[pcbnew/Layer.B.CrtYd]
-Enabled=1
-[pcbnew/Layer.F.CrtYd]
-Enabled=1
-[pcbnew/Layer.B.Fab]
-Enabled=1
-[pcbnew/Layer.F.Fab]
-Enabled=1
-[pcbnew/Layer.Rescue]
-Enabled=0
-[pcbnew/Netclasses]
-[pcbnew/Netclasses/Default]
-Name=Default
-Clearance=0.102
-TrackWidth=0.102
-ViaDiameter=0.75
-ViaDrill=0.5
-uViaDiameter=0.3
-uViaDrill=0.1
-dPairWidth=0.102
-dPairGap=0.127
-dPairViaGap=0.25
-[pcbnew/Netclasses/1]
-Name=CLK_diff
-Clearance=0.102
-TrackWidth=0.102
-ViaDiameter=0.75
-ViaDrill=0.5
-uViaDiameter=0.3
-uViaDrill=0.1
-dPairWidth=0.102
-dPairGap=0.127
-dPairViaGap=0.25
-[pcbnew/Netclasses/2]
-Name=Diff
-Clearance=0.102
-TrackWidth=0.102
-ViaDiameter=0.75
-ViaDrill=0.5
-uViaDiameter=0.3
-uViaDrill=0.1
-dPairWidth=0.102
-dPairGap=0.127
-dPairViaGap=0.25
-[pcbnew/Netclasses/3]
-Name=MGT
-Clearance=0.102
-TrackWidth=0.25
-ViaDiameter=0.75
-ViaDrill=0.5
-uViaDiameter=0.3
-uViaDrill=0.1
-dPairWidth=0.15
-dPairGap=0.102
-dPairViaGap=0.25
-[pcbnew/Netclasses/4]
-Name=high_curr
-Clearance=0.102
-TrackWidth=0.102
-ViaDiameter=0.75
-ViaDrill=0.5
-uViaDiameter=0.3
-uViaDrill=0.1
-dPairWidth=0.102
-dPairGap=0.127
-dPairViaGap=0.25
--- a/pcb/cpcis_backplane/CPCI Backplane.sch
+++ b/pcb/cpcis_backplane/CPCI Backplane.sch
--- a/pcb/cpcis_backplane/CPCI Backplane.sch-bak
+++ b/pcb/cpcis_backplane/CPCI Backplane.sch-bak
--- a/pcb/cpcis_backplane/CPCIS-Backplane.step
+++ b/pcb/cpcis_backplane/CPCIS-Backplane.step
--- a/pcb/cpcis_backplane/Power.bak
+++ b/pcb/cpcis_backplane/Power.bak
--- a/pcb/cpcis_backplane/Power.sch
+++ b/pcb/cpcis_backplane/Power.sch
--- a/pcb/cpcis_backplane/Power.sch-bak
+++ b/pcb/cpcis_backplane/Power.sch-bak
--- a/pcb/cpcis_backplane/Slot_1.bak
+++ b/pcb/cpcis_backplane/Slot_1.bak
--- a/pcb/cpcis_backplane/Slot_1.sch
+++ b/pcb/cpcis_backplane/Slot_1.sch
--- a/pcb/cpcis_backplane/Slot_1.sch-bak
+++ b/pcb/cpcis_backplane/Slot_1.sch-bak
--- a/pcb/cpcis_backplane/Slot_1b.bak
+++ b/pcb/cpcis_backplane/Slot_1b.bak
--- a/pcb/cpcis_backplane/Slot_1b.sch
+++ b/pcb/cpcis_backplane/Slot_1b.sch
--- a/pcb/cpcis_backplane/Slot_1b.sch-bak
+++ b/pcb/cpcis_backplane/Slot_1b.sch-bak
--- a/pcb/cpcis_backplane/Slot_periph.bak
+++ b/pcb/cpcis_backplane/Slot_periph.bak
--- a/pcb/cpcis_backplane/Slot_periph.sch
+++ b/pcb/cpcis_backplane/Slot_periph.sch
--- a/pcb/cpcis_backplane/Slot_periph.sch-bak
+++ b/pcb/cpcis_backplane/Slot_periph.sch-bak
--- a/pcb/cpcis_backplane/fp-info-cache
+++ b/pcb/cpcis_backplane/fp-info-cache
-18717252144585
-NetTie
-NetTie-2_SMD_Pad0.5mm
-Net tie, 2 pin, 0.5mm square SMD pads
-net tie
-0
-2
-2
-NetTie
-NetTie-2_SMD_Pad2.0mm
-Net tie, 2 pin, 2.0mm square SMD pads
-net tie
-0
-2
-2
-NetTie
-NetTie-2_THT_Pad0.3mm
-Net tie, 2 pin, 0.3mm round THT pads
-net tie
-0
-2
-2
-NetTie
-NetTie-2_THT_Pad1.0mm
-Net tie, 2 pin, 1.0mm round THT pads
-net tie
-0
-2
-2
-NetTie
-NetTie-3_SMD_Pad0.5mm
-Net tie, 3 pin, 0.5mm square SMD pads
-net tie
-0
-3
-3
-NetTie
-NetTie-3_SMD_Pad2.0mm
-Net tie, 3 pin, 2.0mm square SMD pads
-net tie
-0
-3
-3
-NetTie
-NetTie-3_THT_Pad0.3mm
-Net tie, 3 pin, 0.3mm round THT pads
-net tie
-0
-3
-3
-NetTie
-NetTie-3_THT_Pad1.0mm
-Net tie, 3 pin, 1.0mm round THT pads
-net tie
-0
-3
-3
-NetTie
-NetTie-4_SMD_Pad0.5mm
-Net tie, 4 pin, 0.5mm square SMD pads
-net tie
-0
-4
-4
-NetTie
-NetTie-4_SMD_Pad2.0mm
-Net tie, 4 pin, 2.0mm square SMD pads
-net tie
-0
-4
-4
-NetTie
-NetTie-4_THT_Pad0.3mm
-Net tie, 4 pin, 0.3mm round THT pads
-net tie
-0
-4
-4
-NetTie
-NetTie-4_THT_Pad1.0mm
-Net tie, 4 pin, 1.0mm round THT pads
-net tie
-0
-4
-4
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_Adhes.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_Adhes.gbr
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5)-3*
-G04 #@! TF.CreationDate,2020-03-19T20:41:10+01:00*
-G04 #@! TF.ProjectId,CPCI Backplane,43504349-2042-4616-936b-706c616e652e,rev?*
-G04 #@! TF.SameCoordinates,Original*
-G04 #@! TF.FileFunction,Glue,Bot*
-G04 #@! TF.FilePolarity,Positive*
-%FSLAX46Y46*%
-G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW (5.1.5)-3) date 2020-03-19 20:41:10*
-%MOMM*%
-%LPD*%
-G04 APERTURE LIST*
-G04 APERTURE END LIST*
-M02*
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_CrtYd.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_CrtYd.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_Cu.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_Cu.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_Fab.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_Fab.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_Mask.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_Mask.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_Paste.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_Paste.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_SilkS.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-B_SilkS.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-Cmts_User.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-Cmts_User.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-Dwgs_User.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-Dwgs_User.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-Eco1_User.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-Eco1_User.gbr
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5)-3*
-G04 #@! TF.CreationDate,2020-03-19T20:41:11+01:00*
-G04 #@! TF.ProjectId,CPCI Backplane,43504349-2042-4616-936b-706c616e652e,rev?*
-G04 #@! TF.SameCoordinates,Original*
-G04 #@! TF.FileFunction,Other,ECO1*
-%FSLAX46Y46*%
-G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW (5.1.5)-3) date 2020-03-19 20:41:11*
-%MOMM*%
-%LPD*%
-G04 APERTURE LIST*
-G04 APERTURE END LIST*
-M02*
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-Eco2_User.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-Eco2_User.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-Edge_Cuts.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-Edge_Cuts.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_Adhes.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_Adhes.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_CrtYd.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_CrtYd.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_Cu.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_Cu.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_Fab.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_Fab.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_Mask.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_Mask.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_Paste.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_Paste.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_SilkS.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-F_SilkS.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-GND2_Cu.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-GND2_Cu.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-GND3_Cu.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-GND3_Cu.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-GND4_Cu.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-GND4_Cu.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-GND5_Cu.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-GND5_Cu.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-GND6_Cu.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-GND6_Cu.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-Margin.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-Margin.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-NPTH.drl
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-NPTH.drl
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-PTH.drl
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-PTH.drl
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-Sig1_Cu.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-Sig1_Cu.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-Sig2_Cu.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-Sig2_Cu.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-Sig3_Cu.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-Sig3_Cu.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-Sig4_Cu.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-Sig4_Cu.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-Sig5_Cu.gbr
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-Sig5_Cu.gbr
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-bottom.pos
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-bottom.pos
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane-top.pos
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane-top.pos
--- a/pcb/cpcis_backplane/gerbers/CPCI Backplane.csv
+++ b/pcb/cpcis_backplane/gerbers/CPCI Backplane.csv
--- a/pcb/cpcis_backplane/pdf/CPCI Backplane.pdf
+++ b/pcb/cpcis_backplane/pdf/CPCI Backplane.pdf
--- a/pcb/cpcis_backplane/sym-lib-table
+++ b/pcb/cpcis_backplane/sym-lib-table
--- a/pcb/crate_front_panel/Crate-Front-Panel-cache.lib
+++ b/pcb/crate_front_panel/Crate-Front-Panel-cache.lib
--- a/pcb/crate_front_panel/Crate-Front-Panel.kicad_pcb
+++ b/pcb/crate_front_panel/Crate-Front-Panel.kicad_pcb
--- a/pcb/crate_front_panel/Crate-Front-Panel.lib
+++ b/pcb/crate_front_panel/Crate-Front-Panel.lib
--- a/pcb/crate_front_panel/Crate-Front-Panel.pro
+++ b/pcb/crate_front_panel/Crate-Front-Panel.pro
--- a/pcb/crate_front_panel/Crate-Front-Panel.sch
+++ b/pcb/crate_front_panel/Crate-Front-Panel.sch
--- a/pcb/crate_front_panel/Crate-Front-Panel.sch-bak
+++ b/pcb/crate_front_panel/Crate-Front-Panel.sch-bak
--- a/pcb/crate_front_panel/Crate-Front-Panel.step
+++ b/pcb/crate_front_panel/Crate-Front-Panel.step
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_Adhes.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_Adhes.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_CrtYd.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_CrtYd.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_Cu.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_Cu.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_Fab.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_Fab.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_Mask.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_Mask.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_Paste.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_Paste.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_SilkS.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-B_SilkS.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-Cmts_User.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-Cmts_User.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-Dwgs_User.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-Dwgs_User.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-Eco1_User.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-Eco1_User.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-Eco2_User.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-Eco2_User.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-Edge_Cuts.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-Edge_Cuts.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_Adhes.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_Adhes.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_CrtYd.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_CrtYd.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_Cu.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_Cu.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_Fab.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_Fab.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_Mask.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_Mask.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_Paste.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_Paste.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_SilkS.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-F_SilkS.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-Margin.gbr
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-Margin.gbr
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-NPTH.drl
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-NPTH.drl
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-PTH.drl
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-PTH.drl
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-bottom.pos
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-bottom.pos
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel-top.pos
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel-top.pos
--- a/pcb/crate_front_panel/gerbers/Crate-Front-Panel.csv
+++ b/pcb/crate_front_panel/gerbers/Crate-Front-Panel.csv
--- a/pcb/crate_front_panel/pdf/Crate-Front-Panel.pdf
+++ b/pcb/crate_front_panel/pdf/Crate-Front-Panel.pdf
--- a/pcb/power_backplane/Power Backplane-cache.lib
+++ b/pcb/power_backplane/Power Backplane-cache.lib
--- a/pcb/power_backplane/Power Backplane-rescue.dcm
+++ b/pcb/power_backplane/Power Backplane-rescue.dcm
--- a/pcb/power_backplane/Power Backplane-rescue.lib
+++ b/pcb/power_backplane/Power Backplane-rescue.lib
--- a/pcb/power_backplane/Power Backplane.kicad_pcb
+++ b/pcb/power_backplane/Power Backplane.kicad_pcb
--- a/pcb/power_backplane/Power Backplane.pro
+++ b/pcb/power_backplane/Power Backplane.pro
--- a/pcb/power_backplane/Power Backplane.sch
+++ b/pcb/power_backplane/Power Backplane.sch
--- a/pcb/power_backplane/Power Backplane.sch-bak
+++ b/pcb/power_backplane/Power Backplane.sch-bak
--- a/pcb/power_backplane/Power Backplane.step
+++ b/pcb/power_backplane/Power Backplane.step
--- a/pcb/power_backplane/_autosave-Power Backplane.pro
+++ b/pcb/power_backplane/_autosave-Power Backplane.pro
--- a/pcb/power_backplane/gerbers/Power Backplane-B_Adhes.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-B_Adhes.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-B_CrtYd.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-B_CrtYd.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-B_Fab.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-B_Fab.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-B_Mask.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-B_Mask.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-B_Paste.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-B_Paste.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-B_SilkS.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-B_SilkS.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-Bot_GND_Cu.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-Bot_GND_Cu.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-Cmts_User.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-Cmts_User.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-Dwgs_User.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-Dwgs_User.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-Eco1_User.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-Eco1_User.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-Eco2_User.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-Eco2_User.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-Edge_Cuts.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-Edge_Cuts.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-F_Adhes.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-F_Adhes.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-F_CrtYd.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-F_CrtYd.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-F_Fab.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-F_Fab.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-F_Mask.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-F_Mask.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-F_Paste.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-F_Paste.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-F_SilkS.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-F_SilkS.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-L2_Sig_Cu.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-L2_Sig_Cu.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-L3_Sig_Cu.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-L3_Sig_Cu.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-Margin.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-Margin.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-NPTH.drl
+++ b/pcb/power_backplane/gerbers/Power Backplane-NPTH.drl
--- a/pcb/power_backplane/gerbers/Power Backplane-PTH.drl
+++ b/pcb/power_backplane/gerbers/Power Backplane-PTH.drl
--- a/pcb/power_backplane/gerbers/Power Backplane-Top_PWR_Cu.gbr
+++ b/pcb/power_backplane/gerbers/Power Backplane-Top_PWR_Cu.gbr
--- a/pcb/power_backplane/gerbers/Power Backplane-bottom.pos
+++ b/pcb/power_backplane/gerbers/Power Backplane-bottom.pos
--- a/pcb/power_backplane/gerbers/Power Backplane-top.pos
+++ b/pcb/power_backplane/gerbers/Power Backplane-top.pos
--- a/pcb/power_backplane/gerbers/Power Backplane.csv
+++ b/pcb/power_backplane/gerbers/Power Backplane.csv
--- a/pcb/power_backplane/pdf/Power Backplane.pdf
+++ b/pcb/power_backplane/pdf/Power Backplane.pdf
--- a/pcb/power_backplane/sym-lib-table
+++ b/pcb/power_backplane/sym-lib-table