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Dimitris Lampridis authored
hdl: prevent FSM from going through the pre-trigger state, if there are no pre-trigger samples to be acquired. Fixes the error in the samples counter register when pre_trigger samples was zero.
4eaf8f24
hdl: prevent FSM from going through the pre-trigger state, if there are no pre-trigger samples to be acquired. Fixes the error in the samples counter register when pre_trigger samples was zero.
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Manifest.py | Loading commit data... | |
fmc_adc_100Ms_core.vhd | Loading commit data... | |
fmc_adc_100Ms_core_pkg.vhd | Loading commit data... | |
fmc_adc_100Ms_csr.vhd | Loading commit data... | |
fmc_adc_eic.vhd | Loading commit data... | |
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fmc_adc_mezzanine_pkg.vhd | Loading commit data... | |
offset_gain.vhd | Loading commit data... | |
offset_gain_s.vhd | Loading commit data... | |
offset_gain_s_tb.vhd | Loading commit data... | |
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