Commit 4ac10688 authored by Federico Vaga's avatar Federico Vaga

kernel: isolate FMC io functions

Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
parent 0a777e94
...@@ -419,13 +419,23 @@ static inline struct fa_dev *get_zfadc(struct device *dev) ...@@ -419,13 +419,23 @@ static inline struct fa_dev *get_zfadc(struct device *dev)
return NULL; return NULL;
} }
static inline u32 fa_ioread(struct fa_dev *fa, unsigned long addr)
{
return fmc_readl(fa->fmc, addr);
}
static inline void fa_iowrite(struct fa_dev *fa, u32 value, unsigned long addr)
{
fmc_writel(fa->fmc, value, addr);
}
static inline uint32_t fa_readl(struct fa_dev *fa, static inline uint32_t fa_readl(struct fa_dev *fa,
unsigned int base_off, unsigned int base_off,
const struct zfa_field_desc *field) const struct zfa_field_desc *field)
{ {
uint32_t cur; uint32_t cur;
cur = fmc_readl(fa->fmc, base_off+field->offset); cur = fa_ioread(fa, base_off+field->offset);
if (field->is_bitfield) { if (field->is_bitfield) {
/* apply mask and shift right accordlying to the mask */ /* apply mask and shift right accordlying to the mask */
cur &= field->mask; cur &= field->mask;
...@@ -446,7 +456,7 @@ static inline void fa_writel(struct fa_dev *fa, ...@@ -446,7 +456,7 @@ static inline void fa_writel(struct fa_dev *fa,
val = usr_val; val = usr_val;
/* Read current register value first if it's a bitfield */ /* Read current register value first if it's a bitfield */
if (field->is_bitfield) { if (field->is_bitfield) {
cur = fmc_readl(fa->fmc, base_off+field->offset); cur = fa_ioread(fa, base_off+field->offset);
/* */ /* */
cur &= ~field->mask; /* clear bits according to the mask */ cur &= ~field->mask; /* clear bits according to the mask */
val = usr_val * (field->mask & -(field->mask)); val = usr_val * (field->mask & -(field->mask));
...@@ -457,7 +467,7 @@ static inline void fa_writel(struct fa_dev *fa, ...@@ -457,7 +467,7 @@ static inline void fa_writel(struct fa_dev *fa,
val &= field->mask; val &= field->mask;
val |= cur; val |= cur;
} }
fmc_writel(fa->fmc, val, base_off+field->offset); fa_iowrite(fa, val, base_off+field->offset);
} }
/* Global variable exported by fa-core.c */ /* Global variable exported by fa-core.c */
......
...@@ -57,12 +57,12 @@ ...@@ -57,12 +57,12 @@
static void ow_writel(struct fa_dev *fa, uint32_t val, unsigned long reg) static void ow_writel(struct fa_dev *fa, uint32_t val, unsigned long reg)
{ {
fmc_writel(fa->fmc, val, fa->fa_ow_base + reg); fa_iowrite(fa, val, fa->fa_ow_base + reg);
} }
static uint32_t ow_readl(struct fa_dev *fa, unsigned long reg) static uint32_t ow_readl(struct fa_dev *fa, unsigned long reg)
{ {
return fmc_readl(fa->fmc, fa->fa_ow_base + reg); return fa_ioread(fa, fa->fa_ow_base + reg);
} }
static int ow_reset(struct fa_dev *fa, int port) static int ow_reset(struct fa_dev *fa, int port)
......
...@@ -41,19 +41,19 @@ int fa_spi_xfer(struct fa_dev *fa, int cs, int num_bits, ...@@ -41,19 +41,19 @@ int fa_spi_xfer(struct fa_dev *fa, int cs, int num_bits,
int err = 0; int err = 0;
/* Put out value (LSB-aligned) in the T0 register (bits 0..31) */ /* Put out value (LSB-aligned) in the T0 register (bits 0..31) */
fmc_writel(fa->fmc, tx, fa->fa_spi_base + FA_SPI_TX(0)); fa_iowrite(fa, tx, fa->fa_spi_base + FA_SPI_TX(0));
/* Configure SPI controller */ /* Configure SPI controller */
regval = FA_SPI_CTRL_ASS | /* Automatic Slave Select*/ regval = FA_SPI_CTRL_ASS | /* Automatic Slave Select*/
FA_SPI_CTRL_Tx_NEG | /* Change on falling edge */ FA_SPI_CTRL_Tx_NEG | /* Change on falling edge */
num_bits; /* In CHAR_LEN field */ num_bits; /* In CHAR_LEN field */
fmc_writel(fa->fmc, regval, fa->fa_spi_base + FA_SPI_CTRL); fa_iowrite(fa, regval, fa->fa_spi_base + FA_SPI_CTRL);
/* Set Chip Select */ /* Set Chip Select */
fmc_writel(fa->fmc, (1 << cs), fa->fa_spi_base + FA_SPI_CS); fa_iowrite(fa, (1 << cs), fa->fa_spi_base + FA_SPI_CS);
/* Start transfer */ /* Start transfer */
fmc_writel(fa->fmc, regval | FA_SPI_CTRL_GO, fa_iowrite(fa, regval | FA_SPI_CTRL_GO,
fa->fa_spi_base + FA_SPI_CTRL); fa->fa_spi_base + FA_SPI_CTRL);
/* Wait transfer complete */ /* Wait transfer complete */
while (fmc_readl(fa->fmc, fa->fa_spi_base + FA_SPI_CTRL) while (fa_ioread(fa, fa->fa_spi_base + FA_SPI_CTRL)
& FA_SPI_CTRL_BUSY) { & FA_SPI_CTRL_BUSY) {
if (jiffies > j) { if (jiffies > j) {
dev_err(&fa->fmc->dev, "SPI transfer error\n"); dev_err(&fa->fmc->dev, "SPI transfer error\n");
...@@ -62,12 +62,12 @@ int fa_spi_xfer(struct fa_dev *fa, int cs, int num_bits, ...@@ -62,12 +62,12 @@ int fa_spi_xfer(struct fa_dev *fa, int cs, int num_bits,
} }
} }
/* Transfer compleate, read data */ /* Transfer compleate, read data */
regval = fmc_readl(fa->fmc, fa->fa_spi_base + FA_SPI_RX(0)); regval = fa_ioread(fa, fa->fa_spi_base + FA_SPI_RX(0));
if (rx) if (rx)
*rx = regval; *rx = regval;
out: out:
/* Clear Chip Select */ /* Clear Chip Select */
fmc_writel(fa->fmc, 0, fa->fa_spi_base + FA_SPI_CTRL); fa_iowrite(fa, 0, fa->fa_spi_base + FA_SPI_CTRL);
return err; return err;
} }
...@@ -79,7 +79,7 @@ int fa_spi_init(struct fa_dev *fa) ...@@ -79,7 +79,7 @@ int fa_spi_init(struct fa_dev *fa)
int i; int i;
/* Divider must be 100, according to firmware guide */ /* Divider must be 100, according to firmware guide */
fmc_writel(fa->fmc, 100, fa->fa_spi_base + FA_SPI_DIV); fa_iowrite(fa, 100, fa->fa_spi_base + FA_SPI_DIV);
/* Force 2's complement data output (register 1, bit 5) */ /* Force 2's complement data output (register 1, bit 5) */
fa_spi_xfer(fa, FA_SPI_SS_ADC, 16, (1 << 8) | (1 << 5), &rx); fa_spi_xfer(fa, FA_SPI_SS_ADC, 16, (1 << 8) | (1 << 5), &rx);
......
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